@@ -100,150 +100,6 @@ orfs_flow(
100100 ]),
101101)
102102
103- filegroup (
104- name = "mock-array-constraints" ,
105- srcs = [
106- "designs/asap7/mock-array/constraints.sdc" ,
107- ],
108- visibility = [":__subpackages__" ],
109- )
110-
111- filegroup (
112- name = "mock-array-io" ,
113- srcs = [
114- "designs/asap7/mock-array/io.tcl" ,
115- ],
116- data = [
117- "designs/src/mock-array/util.tcl" ,
118- ],
119- visibility = [":__subpackages__" ],
120- )
121-
122- MOCK_ARRAY_FLOORPLAN_PLACE = {
123- "PLACE_PINS_ARGS" : "-annealing" ,
124- "IO_CONSTRAINTS" : "$(location :mock-array-io)" ,
125- "PLACE_DENSITY" : "0.30" ,
126- "DIE_AREA" : "0 0 358.56 388.8" ,
127- "CORE_AREA" : "2.16 2.16 356.40000000000003 386.64000000000004" ,
128- "MACRO_PLACE_HALO" : "0 2.16" ,
129- "RTLMP_BOUNDARY_WT" : "0" ,
130- "PDN_TCL" : "$(PLATFORM_DIR)/openRoad/pdn/BLOCKS_grid_strategy.tcl" ,
131- "MACRO_HALO_X" : "0.5" ,
132- "MACRO_HALO_Y" : "0.5" ,
133- "MACRO_BLOCKAGE_HALO" : "0" ,
134- "ADDITIONAL_FILES" : "$(locations :mock-array-io)" ,
135- }
136-
137- orfs_flow (
138- name = "MockArray" ,
139- macros = ["Element_generate_abstract" ],
140- stage_arguments = {
141- "synth" : {
142- "SDC_FILE" : "$(location :mock-array-constraints)" ,
143- },
144- "floorplan" : MOCK_ARRAY_FLOORPLAN_PLACE | {
145- },
146- "place" : MOCK_ARRAY_FLOORPLAN_PLACE | {
147- },
148- "cts" : {
149- "CTS_BUF_DISTANCE" : "60" ,
150- },
151- "route" : {
152- # works with 28 or more iterations as of writing, so give it a few more.
153- "GLOBAL_ROUTE_ARGS" : "-congestion_iterations 40 -verbose" ,
154- # If this design isn't quickly done in detailed routing, something is wrong.
155- # At time of adding this option, only 12 iterations were needed for 0
156- # violations.
157- "DETAILED_ROUTE_ARGS" : "-bottom_routing_layer M2 -top_routing_layer M7 -save_guide_updates -verbose 1 -droute_end_iter 15" ,
158- # since we are specifying DETAILED_ROUTE_ARGS, we need to communicate the
159- # same information to other stages in the flow.
160- "MIN_ROUTING_LAYER" : "M2" ,
161- "MAX_ROUTING_LAYER" : "M7" ,
162- },
163- "final" : {
164- "GDS_ALLOW_EMPTY" : "Element" ,
165- "PWR_NETS_VOLTAGEsS" : "" ,
166- "GND_NETS_VOLTAGES" : "" ,
167- },
168- },
169- stage_sources = {
170- "synth" : all_sources + [":mock-array-constraints" ] + [":mock-array-io" ],
171- "floorplan" : all_sources + [":mock-array-io" ],
172- "place" : all_sources + [":mock-array-io" ],
173- "cts" : all_sources ,
174- "final" : all_sources ,
175- },
176- verilog_files = glob (include = ["designs/src/mock-array/*.v" ]),
177- )
178-
179- filegroup (
180- name = "mock-array-element-io" ,
181- srcs = [
182- "designs/asap7/mock-array/Element/io.tcl" ,
183- ],
184- data = [
185- "designs/src/mock-array/util.tcl" ,
186- ],
187- visibility = [":__subpackages__" ],
188- )
189-
190- MOCK_ARRAY_ELEMENT_FLOORPLAN_PLACE = {
191- "IO_CONSTRAINTS" : "$(location :mock-array-element-io)" ,
192- "PLACE_PINS_ARGS" : "-annealing" ,
193- }
194-
195- MOCK_ARRAY_ELEMENT_ALL = {
196- "MOCK_ARRAY_ROWS" : "8" ,
197- "MOCK_ARRAY_COLS" : "8" ,
198- }
199-
200- mock_array_all_sources = ["designs/src/mock-array/util.tcl" ]
201-
202- orfs_flow (
203- name = "Element" ,
204- abstract_stage = "route" ,
205- arguments = {
206- "PLACE_DENSITY" : "0.82" ,
207- },
208- stage_arguments = {
209- "synth" : MOCK_ARRAY_ELEMENT_ALL | {
210- "SDC_FILE" : "$(location :mock-array-constraints)" ,
211- },
212- "floorplan" : MOCK_ARRAY_ELEMENT_ALL | MOCK_ARRAY_ELEMENT_FLOORPLAN_PLACE | {
213- "DIE_AREA" : "0 0 43.2 43.2" ,
214- "CORE_AREA" : "1.08 1.08 42.120000000000005 42.120000000000005" ,
215- "PDN_TCL" : "$(PLATFORM_DIR)/openRoad/pdn/BLOCK_grid_strategy.tcl" ,
216- },
217- "place" : MOCK_ARRAY_ELEMENT_ALL | MOCK_ARRAY_ELEMENT_FLOORPLAN_PLACE | {
218- },
219- "cts" : MOCK_ARRAY_ELEMENT_ALL | {
220- },
221- "route" : MOCK_ARRAY_ELEMENT_ALL | {
222- # If this design isn't quickly done in detailed routing, something is wrong.
223- # At time of adding this option, only 3 iterations were needed for 0
224- # violations.
225- "DETAILED_ROUTE_ARGS" : "-bottom_routing_layer M2 -top_routing_layer M5 -save_guide_updates -verbose 1 -droute_end_iter 10" ,
226- # since we are specifying DETAILED_ROUTE_ARGS, we need to communicate the
227- # same information to other stages in the flow.
228- "MIN_ROUTING_LAYER" : "M2" ,
229- "MAX_ROUTING_LAYER" : "M5" ,
230- },
231- "final" : MOCK_ARRAY_ELEMENT_ALL | {
232- "PWR_NETS_VOLTAGES" : "" ,
233- "GND_NETS_VOLTAGES" : "" ,
234- },
235- },
236- stage_sources = {
237- "synth" : mock_array_all_sources + [":mock-array-constraints" ],
238- "floorplan" : mock_array_all_sources + [":mock-array-element-io" ],
239- "place" : mock_array_all_sources + [":mock-array-element-io" ],
240- "cts" : mock_array_all_sources ,
241- "route" : mock_array_all_sources ,
242- "final" : mock_array_all_sources ,
243- },
244- verilog_files = glob (include = ["designs/src/mock-array/*.v" ]),
245- )
246-
247103filegroup (
248104 name = "ethmac_lvt_src" ,
249105 srcs = glob (include = ["designs/src/ethmac_lvt/*.v" ]),
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