flow/util: fix non-line length issues

Signed-off-by: Jack Luar <[email protected]>

Author: luarss

flow/util/cell-veneer/lefdef.tcl

@@ -13,6 +13,7 @@ proc relative_rectangle { rect offset } {
     [expr [lindex $rect 3] - [lindex $offset 1]]]
 }
 
+# tclint-disable-next-line command-args
 if [package vcompare 8.6 $tcl_version] {
     proc lmap {_var list body} {
         upvar 1 $_var var
@@ -26,11 +27,13 @@ namespace eval lef {
 variable lefOut stdout
 variable def_units 2000
 
+# tclint-disable-next-line redefined-builtin
 proc open { file_name } {
   variable lefOut
   set lefOut [::open $file_name w]
 }
 
+# tclint-disable-next-line redefined-builtin
 proc close { } {
   variable lefOut
   if { $lefOut != "stdout" } {
@@ -288,13 +291,13 @@ proc write_footer { } {
 #       - shape
 #       - ports: a list of lists of shapes that make up a physical connection
 #               - layer
-#               - rect 
+#               - rect
 #               - mask?
 #   - obstructions
 #       - layer: a dictionaries with layer_name as the key
-#           - rect 
+#           - rect
 #           - mask?
-#             
+#
 proc write { design } {
   set def_units [dict get $design units]
 
@@ -449,11 +452,13 @@ variable def_units
 variable defOut stdout
 variable designs {}
 
+# tclint-disable-next-line redefined-builtin
 proc open { file_name } {
   variable defOut
   set defOut [::open $file_name w]
 }
 
+# tclint-disable-next-line redefined-builtin
 proc close { } {
   variable defOut
   if { $defOut != "stdout" } {
@@ -499,32 +504,32 @@ proc out { args } {
 #               - shapes : list of rectangles (or polygons)
 #                   - (rect|polygon)
 #   - physical_viarules: dict with the name of the viarule as the key
-#       - rule        
-#       - cutsize     
-#       - layers      
-#       - cutspacing  
-#       - enclosure   
-#       - rowcol      
+#       - rule
+#       - cutsize
+#       - layers
+#       - cutspacing
+#       - enclosure
+#       - rowcol
 #   - components: dict with the instance name of the component as the key
 #       - inst_name
 #       - cell_name
 #       - (fixed|placed)?
 #       - orientation
 #   - nets: dict with the name of the net as the key
 #       - use: SIGNAL | POWER | GROUND
-#       - connections: list of instance pin pairs  
-#       - routes: list of dictionaries              
-#           - layer                                
-#           - points: list of points, where a point can be an XY location or the name of a VIA 
+#       - connections: list of instance pin pairs
+#       - routes: list of dictionaries
+#           - layer
+#           - points: list of points, where a point can be an XY location or the name of a VIA
 #   - special_nets: dict with the name of the net as the key
-#       - use: SIGNAL | POWER | GROUND                                    
-#       - connections: list of instance pin pairs  
-#       - routes: list of dictioaries              
-#           - layer                                
-#           - width                                
-#           - shape                                
+#       - use: SIGNAL | POWER | GROUND
+#       - connections: list of instance pin pairs
+#       - routes: list of dictioaries
+#           - layer
+#           - width
+#           - shape
 #           - points: list of points, where a point can be an XY location or the name of a VIA
-#                              
+#
 
 proc shift_point { point x y } {
   return [list [expr [lindex $point 0] + $x] [expr [lindex $point 1] + $y]]
@@ -727,8 +732,8 @@ proc write { design } {
 
   if { [dict exists $design rows] } {
     foreach idx [lsort -integer [dict keys $design rows]] {
-      out -nonewline "ROW ROW_$idx [dict keys $design rows $idx site] [dict keys $design rows $idx start] [dict keys $design rows $idx height] [dict keys $design rows $idx orientation]"
-      out " DO [dict keys $design rows $idx num_sites] BY 1 STEP [dict keys $design rows $idx site_width] 0 ;"
+      out -nonewline "ROW ROW_$idx [dict get $design rows $idx site] [dict get $design rows $idx start] [dict get $design rows $idx height] [dict get $design rows $idx orientation]"
+      out " DO [dict get $design rows $idx num_sites] BY 1 STEP [dict get $design rows $idx site_width] 0 ;"
     }
   }
 

flow/util/cell-veneer/pkgIndex.tcl

@@ -1,2 +1,3 @@
+# tclint-disable command-args
 package ifneeded lefdef 1.0.0 [list source [file join $dir lefdef.tcl]]
 package ifneeded wrapper 1.0.0 [list source [file join $dir wrap_stdcells.tcl]]

flow/util/cell-veneer/wrap_stdcells.tcl

@@ -193,7 +193,7 @@ proc move_m2_pins_to_edge { cell_name cell_data } {
   dict for {pin_name pin} [dict get $cell_data pins] {
     set wires {}
     foreach physical_pin $pin {
-      if { [dict get $physical_pin to] >= [expr $cell_width / 2.0] } {
+      if { [dict get $physical_pin to] >= ($cell_width / 2.0) } {
         if { [dict exists $cell_data blockages] } {
           if { [wrapper::clear_right $physical_pin [dict get $cell_data blockages]] } {
             set direction right
@@ -470,7 +470,7 @@ proc wrap_macro { cell_name } {
     # Need to check that the grid point we're trying to use is going to be accessible.
     # If it is not, then try the point 2 grid points higher
     if { [dict exists $grid_pins $grid_y] } {
-      if { [dict exists [expr $grid_y + 2]] } {
+      if { [dict exists $grid_pins [expr $grid_y + 2]] } {
         puts "Cell $cell_name"
         puts "Problem assigning pin grid - requested and upper grid points for $pin_name at $grid_y already allocated to [dict get $grid_pins $grid_y] and [dict get $grid_pins [expr $grid_y + 2]]"
         exit -1

flow/util/write_net_rc.tcl

@@ -46,7 +46,7 @@ proc write_rc_csv { filename } {
     set is_routing([$layer getNumber]) $routing
     set is_routing([$layer getNumber]) $routing
     puts -nonewline $stream " [$layer getName]"
-    if $routing {
+    if { $routing } {
       puts -nonewline $stream "(routing)"
     } else {
       # insert via resistance information
@@ -75,15 +75,15 @@ proc write_rc_csv { filename } {
       puts -nonewline $stream "[format %.3e $wire_res1],[format %.3e $wire_cap1],[format %.3e $wire_res2],[format %.3e $wire_cap2],[format %.3e $wire_res3],[format %.3e $wire_cap3]"
       set db_net [sta::sta_to_db_net $net]
 
-      if $use_drt_data {
+      if { $use_drt_data } {
         set layer_lengths [drt::route_layer_lengths [$db_net getWire]]
       } else {
         set layer_lengths [grt::route_layer_lengths $db_net]
       }
 
       for { set layer 0 } { $layer < [$tech getLayerCount] } { incr layer } {
         set length [lindex $layer_lengths $layer]
-        if $is_routing($layer) {
+        if { $is_routing($layer) } {
           puts -nonewline $stream ",[ord::dbu_to_microns $length]"
         } else {
           puts -nonewline $stream ",$length"

tclint.toml

@@ -5,10 +5,10 @@ exclude = [
     "flow/logs",
     "flow/designs",
     "flow/platforms",
-    "flow/util",
     "flow/scripts/*.tcl",
     "tools/OpenROAD",
     "tools/yosys",
+    "tools/yosys-slang",
 ]
 
 ignore = [