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Merge branch 'master' into synth-names-and-canonicalize
Signed-off-by: Eder Monteiro <[email protected]>
2 parents ea74a82 + c560f44 commit 9d6f9c0

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17 files changed

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flow/Makefile

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@@ -104,8 +104,9 @@
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# Default design
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DESIGN_CONFIG ?= ./designs/nangate45/gcd/config.mk
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# Default TNS_END_PERCENT value
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export TNS_END_PERCENT ?=5
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# Default TNS_END_PERCENT value for post CTS timing repair
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# Try fixing all violating endpoints by default (reduce to 5% for runtime)
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export TNS_END_PERCENT ?=100
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# If we are running headless use offscreen rendering for save_image
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ifndef DISPLAY
@@ -295,6 +296,7 @@ endif
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# 1 user explicit set with variable in Makefile or command line, for instance setting OPENROAD_EXE
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# 2 ORFS compiled tools: openroad, yosys
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export OPENROAD_EXE ?= $(abspath $(FLOW_HOME)/../tools/install/OpenROAD/bin/openroad)
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export OPENSTA_EXE ?= $(abspath $(FLOW_HOME)/../tools/install/OpenROAD/bin/sta)
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OPENROAD_ARGS = -no_init $(OR_ARGS)
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OPENROAD_CMD = $(OPENROAD_EXE) -exit $(OPENROAD_ARGS)

flow/designs/gf12/bp_single/config.mk

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@@ -3,6 +3,7 @@ export DESIGN_NAME = bsg_chip
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export PLATFORM = gf12
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export SKIP_GATE_CLONING = 1
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export TNS_END_PERCENT = 5
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# export VERILOG_FILES = $(PLATFORM_DIR)/bp/bsg_ac_black_parrot_single_core_v0/bsg_chip.sv2v.v
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export VERILOG_FILES = $(PLATFORM_DIR)/bp/bsg_ac_black_parrot_single_core_v0/yosys/synth_don_abc_script.v \

flow/designs/gf12/bp_single/config_mpl2.mk

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@@ -2,6 +2,9 @@ export DESIGN_NICKNAME = bp_single
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export DESIGN_NAME = bsg_chip
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export PLATFORM = gf12
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export SKIP_GATE_CLONING = 1
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export TNS_END_PERCENT = 5
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export SYNTH_HIERARCHICAL = 1
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export RTLMP_FLOW = True
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#

flow/designs/gf12/ca53/config.mk

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@@ -65,5 +65,6 @@ else
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export DESIGN_TYPE = CELL_NODEN
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endif
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export SKIP_PIN_SWAP = 1
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#export SKIP_PIN_SWAP = 1
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export SKIP_INCREMENTAL_REPAIR = 1
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export TNS_END_PERCENT = 5

flow/designs/gf12/jpeg/config.mk

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@@ -20,5 +20,6 @@ else
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export DESIGN_TYPE = CELL_NODEN
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endif
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export SKIP_PIN_SWAP = 1
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#export SKIP_PIN_SWAP = 1
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export SKIP_GATE_CLONING = 1
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