Skip to content

Commit 9deebe4

Browse files
committed
Makefile: EQUIVALENCE_CHECK cleanup
Signed-off-by: Øyvind Harboe <[email protected]>
1 parent ef9802c commit 9deebe4

File tree

2 files changed

+3
-2
lines changed

2 files changed

+3
-2
lines changed

flow/Makefile

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -144,6 +144,7 @@ export ROUTING_LAYER_ADJUSTMENT ?= 0.5
144144
export RECOVER_POWER ?= 0
145145
export SKIP_INCREMENTAL_REPAIR ?= 0
146146
export DETAILED_METRICS ?= 0
147+
export EQUIVALENCE_CHECK ?= 0
147148

148149
# If we are running headless use offscreen rendering for save_image
149150
ifndef DISPLAY

flow/scripts/cts.tcl

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -72,13 +72,13 @@ if {[info exist ::env(CTS_SNAPSHOTS)]} {
7272
}
7373

7474
if {[info exists ::env(SKIP_CTS_REPAIR_TIMING)] == 0 || $::env(SKIP_CTS_REPAIR_TIMING) == 0} {
75-
if {[info exists ::env(EQUIVALENCE_CHECK)] && $::env(EQUIVALENCE_CHECK) == 1} {
75+
if {$::env(EQUIVALENCE_CHECK)} {
7676
write_eqy_verilog 4_before_rsz.v
7777
}
7878

7979
repair_timing_helper
8080

81-
if {[info exists ::env(EQUIVALENCE_CHECK)] && $::env(EQUIVALENCE_CHECK) == 1} {
81+
if {$::env(EQUIVALENCE_CHECK)} {
8282
run_equivalence_test
8383
}
8484

0 commit comments

Comments
 (0)