Bump OR submodule

vvbandeira · vvbandeira · commit a396b6f0e3c5 · 2023-08-30T09:47:14.000-07:00
Signed-off-by: Vitor Bandeira &lt;vvbandeira@precisioninno.com&gt;
diff --git a/flow/designs/asap7/mock-alu/rules-base.json b/flow/designs/asap7/mock-alu/rules-base.json
@@ -44,7 +44,7 @@
         "compare": "<="
     },
     "finish__timing__drv__setup_violation_count": {
-        "value": 594,
+        "value": 1401,
         "compare": "<="
     },
     "finish__timing__drv__hold_violation_count": {
diff --git a/flow/designs/asap7/riscv32i/rules-base.json b/flow/designs/asap7/riscv32i/rules-base.json
@@ -44,7 +44,7 @@
         "compare": "<="
     },
     "finish__timing__drv__setup_violation_count": {
-        "value": 583,
+        "value": 711,
         "compare": "<="
     },
     "finish__timing__drv__hold_violation_count": {
diff --git a/flow/designs/gf180/riscv32i/rules-base.json b/flow/designs/gf180/riscv32i/rules-base.json
@@ -44,7 +44,7 @@
         "compare": "<="
     },
     "finish__timing__drv__setup_violation_count": {
-        "value": 348,
+        "value": 407,
         "compare": "<="
     },
     "finish__timing__drv__hold_violation_count": {
diff --git a/tools/OpenROAD b/tools/OpenROAD
@@ -1 +1 @@
-Subproject commit 318f3042c43d9ac0c4eea675fc5f0f709b58fcba
+Subproject commit 70db1404adbfa96c013130e3fd3aa2d9407fe516
