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lines changed Original file line number Diff line number Diff line change @@ -471,7 +471,7 @@ $(RESULTS_DIR)/2_5_floorplan_tapcell.odb: $(RESULTS_DIR)/2_4_floorplan_macro.odb
471471
472472# STEP 6: PDN generation
473473# -------------------------------------------------------------------------------
474- $(RESULTS_DIR ) /2_6_floorplan_pdn.odb : $(RESULTS_DIR ) /2_5_floorplan_tapcell.odb $(PDN_CFG ) $( PDN_TCL )
474+ $(RESULTS_DIR ) /2_6_floorplan_pdn.odb : $(RESULTS_DIR ) /2_5_floorplan_tapcell.odb $(PDN_TCL )
475475 ($( TIME_CMD) $( OPENROAD_CMD) $( SCRIPTS_DIR) /pdn.tcl -metrics $( LOG_DIR) /2_6_pdn.json) 2>&1 | tee $(LOG_DIR ) /2_6_pdn.log
476476
477477$(RESULTS_DIR ) /2_floorplan.odb : $(RESULTS_DIR ) /2_6_floorplan_pdn.odb
Original file line number Diff line number Diff line change 1+ # ###################################
2+ # global connections
3+ # ###################################
4+ add_global_connection -net {VDD} -inst_pattern {.*} -pin_pattern {^VDD$} -power
5+ add_global_connection -net {VDD} -inst_pattern {.*} -pin_pattern {^VDDPE$}
6+ add_global_connection -net {VDD} -inst_pattern {.*} -pin_pattern {^VDDCE$}
7+ add_global_connection -net {VDD} -inst_pattern {.*} -pin_pattern {VPWR}
8+ add_global_connection -net {VDD} -inst_pattern {.*} -pin_pattern {VPB}
9+ add_global_connection -net {VSS} -inst_pattern {.*} -pin_pattern {^VSS$} -ground
10+ add_global_connection -net {VSS} -inst_pattern {.*} -pin_pattern {^VSSE$}
11+ add_global_connection -net {VSS} -inst_pattern {.*} -pin_pattern {VGND}
12+ add_global_connection -net {VSS} -inst_pattern {.*} -pin_pattern {VNB}
13+ global_connect
14+ # ###################################
15+ # voltage domains
16+ # ###################################
17+ set_voltage_domain -name {CORE} -power {VDD} -ground {VSS}
18+ # ###################################
19+ # standard cell grid
20+ # ###################################
21+ define_pdn_grid -name {grid} -voltage_domains {CORE}
22+ add_pdn_stripe -grid {grid} -layer {met1} -width {0.48} -pitch {5.44} -offset {0} -followpins
23+ add_pdn_stripe -grid {grid} -layer {met4} -width {1.600} -pitch {27.140} -offset {13.570}
24+ add_pdn_connect -grid {grid} -layers {met1 met4}
Original file line number Diff line number Diff line change @@ -13,7 +13,7 @@ export VERILOG_FILES = \
1313
1414export SDC_FILE = ${TOP_DIR}/${DESIGN_NAME}/constraint.sdc
1515
16- export PDN_CFG = ${TOP_DIR}/${DESIGN_NAME}/pdn.cfg
16+ export PDN_TCL = ${TOP_DIR}/BLOCKS_pdn.tcl
1717
1818export ABC_DRIVER_CELL = sky130_fd_sc_hd__buf_1
1919export ABC_LOAD_IN_FF = 3
Load Diff This file was deleted.
Original file line number Diff line number Diff line change @@ -13,7 +13,7 @@ export VERILOG_FILES = \
1313
1414export SDC_FILE = ${TOP_DIR}/${DESIGN_NAME}/constraint.sdc
1515
16- export PDN_CFG = ${TOP_DIR}/${DESIGN_NAME}/pdn.cfg
16+ export PDN_TCL = ${TOP_DIR}/BLOCKS_pdn.tcl
1717
1818export ABC_DRIVER_CELL = sky130_fd_sc_hd__buf_1
1919export ABC_LOAD_IN_FF = 3
Load Diff This file was deleted.
Original file line number Diff line number Diff line change @@ -13,7 +13,7 @@ export VERILOG_FILES = \
1313
1414export SDC_FILE = ${TOP_DIR}/${DESIGN_NAME}/constraint.sdc
1515
16- export PDN_CFG = ${TOP_DIR}/${DESIGN_NAME}/pdn.cfg
16+ export PDN_TCL = ${TOP_DIR}/BLOCKS_pdn.tcl
1717
1818export ABC_DRIVER_CELL = sky130_fd_sc_hd__buf_1
1919export ABC_LOAD_IN_FF = 3
Load Diff This file was deleted.
Original file line number Diff line number Diff line change @@ -43,18 +43,13 @@ export VERILOG_FILES = \
4343export HAS_IO_CONSTRAINTS = 1
4444export ENABLE_DPO = 0
4545export MACRO_PLACE_CHANNEL = 160 160
46- export MACRO_PLACE_HALO = 160 160
46+ export MACRO_PLACE_HALO = 120 120
4747export DIE_AREA = 0.0 0.0 6800 6800
4848export CORE_AREA = 200 200 6600 6600
4949export SDC_FILE = ./designs/$(PLATFORM ) /$(DESIGN_NICKNAME ) /constraint.sdc
5050
51- export PDN_CFG = ./designs/$(PLATFORM ) /$(DESIGN_NICKNAME ) /pdn.cfg
52-
5351export FP_PDN_RAIL_WIDTH = 0.48
5452export FP_PDN_RAIL_OFFSET = 0
5553
5654export MIN_ROUTING_LAYER = met1
5755export MAX_ROUTING_LAYER = met5
58-
59- export PWR_NETS_VOLTAGES = ""
60- export GND_NETS_VOLTAGES = ""
Original file line number Diff line number Diff line change @@ -35,7 +35,7 @@ export VERILOG_FILES = \
3535
3636export SDC_FILE = ${TOP_DIR}/${DESIGN_NAME}/constraint.sdc
3737
38- export PDN_CFG = ${TOP_DIR}/${DESIGN_NAME}/pdn.cfg
38+ export PDN_TCL = ${TOP_DIR}/BLOCKS_pdn.tcl
3939
4040export ABC_DRIVER_CELL = sky130_fd_sc_hd__buf_1
4141export ABC_LOAD_IN_FF = 3
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