Merge remote-tracking branch 'origin/master' into secure-ratchet_priv

ravi-varadarajan · ravi-varadarajan · commit b1281744fbe3 · 2023-01-03T08:54:59.000-08:00
Signed-off-by: Ravi Varadarajan &lt;rvaradarajan@ucsd.edu&gt;
diff --git a/flow/designs/asap7/uart-blocks/config.mk b/flow/designs/asap7/uart-blocks/config.mk
@@ -10,8 +10,6 @@ export BLOCKS = uart_rx
 
 export VERILOG_FILES_BLACKBOX = ./designs/src/uart-no-param/uart_rx.v
 
-export ABC_CLOCK_PERIOD_IN_PS = 300000
-
 export CORE_UTILIZATION       = 10
 export CORE_ASPECT_RATIO      = 1
 export CORE_MARGIN            = 2
diff --git a/flow/designs/asap7/uart-blocks/uart_rx/config.mk b/flow/designs/asap7/uart-blocks/uart_rx/config.mk
@@ -6,8 +6,6 @@ export DESIGN_NICKNAME        = uart-blocks_uart_rx
 export VERILOG_FILES = ./designs/src/uart-no-param/*.v
 export SDC_FILE      = ./designs/$(PLATFORM)/uart-blocks/uart_rx/constraint.sdc
 
-export ABC_CLOCK_PERIOD_IN_PS = 650
-
 export CORE_UTILIZATION       = 30
 export CORE_ASPECT_RATIO      = 1
 export CORE_MARGIN            = 2
diff --git a/flow/designs/gf12/bp_single/metadata-base-ok.json b/flow/designs/gf12/bp_single/metadata-base-ok.json
diff --git a/flow/designs/gf12/bp_single/rules-base.json b/flow/designs/gf12/bp_single/rules-base.json
@@ -8,55 +8,55 @@
         "compare": "=="
     },
     "placeopt__design__instance__area": {
-        "value": 535034,
+        "value": 534337,
         "compare": "<="
     },
     "placeopt__design__instance__count__stdcell": {
-        "value": 545791,
+        "value": 544655,
         "compare": "<="
     },
     "detailedplace__design__violations": {
         "value": 0,
         "compare": "=="
     },
     "cts__timing__setup__ws": {
-        "value": -1173.26,
+        "value": -1156.25,
         "compare": ">="
     },
     "cts__timing__setup__ws__pre_repair": {
-        "value": -1292.75,
+        "value": -1270.84,
         "compare": ">="
     },
     "cts__timing__setup__ws__post_repair": {
-        "value": -1288.55,
+        "value": -1264.07,
         "compare": ">="
     },
     "cts__design__instance__count__setup_buffer": {
-        "value": 23736,
+        "value": 23681,
         "compare": "<="
     },
     "cts__design__instance__count__hold_buffer": {
-        "value": 23736,
+        "value": 23681,
         "compare": "<="
     },
     "globalroute__timing__setup__ws": {
         "value": -510.85,
         "compare": ">="
     },
     "detailedroute__route__wirelength": {
-        "value": 8702681,
+        "value": 8580816,
         "compare": "<="
     },
     "detailedroute__route__drc_errors": {
-        "value": 4,
+        "value": 6,
         "compare": "<="
     },
     "finish__timing__setup__ws": {
         "value": -129.72,
         "compare": ">="
     },
     "finish__design__instance__area": {
-        "value": 539048,
+        "value": 537578,
         "compare": "<="
     },
     "finish__timing__drv__max_slew_limit": {
diff --git a/flow/designs/gf12/coyote/config.mk b/flow/designs/gf12/coyote/config.mk
@@ -23,8 +23,6 @@ export ADDITIONAL_GDS  = $(PLATFORM_DIR)/gds/gf12_1rf_lg6_w80_bit.gds2 \
                          $(PLATFORM_DIR)/gds/gf12_2rf_lg6_w44_bit.gds2 \
                          $(PLATFORM_DIR)/gds/gf12_2rf_lg8_w64_bit.gds2
 
-export ABC_CLOCK_PERIOD_IN_PS = 1250
-
 export PLACE_DENSITY = 0.35
 
 export MACRO_WRAPPERS = ./designs/$(PLATFORM)/$(DESIGN_NICKNAME)/wrappers.tcl
diff --git a/flow/designs/gf12/tinyRocket/config.mk b/flow/designs/gf12/tinyRocket/config.mk
@@ -26,8 +26,6 @@ export ADDITIONAL_GDS = $(PLATFORM_DIR)/gds/gf12_1rf_lg6_w32_all.gds2 \
 export DIE_AREA    = 0 0 400.008 399.84
 export CORE_AREA   = 19.992 20.16 380.016 380.16
 
-export ABC_CLOCK_PERIOD_IN_PS = 1250
-
 export PLACE_DENSITY = 0.20
 
 export MACRO_WRAPPERS = ./designs/$(PLATFORM)/$(DESIGN_NICKNAME)/wrappers.tcl
diff --git a/flow/designs/gf55/aes/config.mk b/flow/designs/gf55/aes/config.mk
@@ -25,5 +25,3 @@ export DESIGN_TYPE = CELL
 else
 export DESIGN_TYPE = CELL_NODEN
 endif
-
-export ABC_CLOCK_PERIOD_IN_PS = 2300
diff --git a/flow/designs/intel16/aes/config.mk b/flow/designs/intel16/aes/config.mk
@@ -16,5 +16,3 @@ export CORE_AREA   = 1.26 1.89 248 248
 
 
 export PLACE_DENSITY = uniform
-
-export ABC_CLOCK_PERIOD_IN_PS = 2600
diff --git a/flow/designs/intel16/gcd/config.mk b/flow/designs/intel16/gcd/config.mk
@@ -13,4 +13,3 @@ export CORE_ASPECT_RATIO   = 1
 export CORE_MARGIN         = 1
 
 export PLACE_DENSITY = uniform
-export ABC_CLOCK_PERIOD_IN_PS = 1000
diff --git a/flow/designs/intel22/aes/config.mk b/flow/designs/intel22/aes/config.mk
@@ -16,5 +16,3 @@ export CORE_AREA   = 1.26 1.89 248 248
 
 
 export PLACE_DENSITY = uniform
-
-export ABC_CLOCK_PERIOD_IN_PS = 2600
diff --git a/flow/designs/intel22/gcd/config.mk b/flow/designs/intel22/gcd/config.mk
@@ -11,11 +11,7 @@ export PLATFORM               = intel22
 export VERILOG_FILES          = $(sort $(wildcard $(abspath $(DESIGN_HOME)/src/$(DESIGN))/*.v))
 export SDC_FILE               = $(DESIGN_DIR)/constraint.sdc
 
-export ABC_CLOCK_PERIOD_IN_PS = 400
-
 export PLACE_DENSITY          = 0.35
 
 export DIE_AREA               = 0 0 50 50
 export CORE_AREA              = 1.26 1.89 49 49
-
-export DESIGN_DIR DESIGN_PDK_HOME
diff --git a/flow/designs/intel22/ibex/config.mk b/flow/designs/intel22/ibex/config.mk
@@ -14,5 +14,3 @@ export CORE_ASPECT_RATIO = 1
 export CORE_MARGIN = 2
 
 export PLACE_DENSITY = uniform
-
-export ABC_CLOCK_PERIOD_IN_PS = 8000
diff --git a/flow/designs/intel22/jpeg/config.mk b/flow/designs/intel22/jpeg/config.mk
@@ -15,5 +15,3 @@ export CORE_ASPECT_RATIO = 1
 export CORE_MARGIN = 2
 
 export PLACE_DENSITY = uniform
-
-export ABC_CLOCK_PERIOD_IN_PS = 3800
diff --git a/flow/designs/sky130hd/chameleon_hier/DFFRAM_4K/config.mk b/flow/designs/sky130hd/chameleon_hier/DFFRAM_4K/config.mk
@@ -15,7 +15,6 @@ export SDC_FILE          = ${TOP_DIR}/${DESIGN_NAME}/constraint.sdc
 
 export PDN_CFG = ${TOP_DIR}/${DESIGN_NAME}/pdn.cfg
 
-export ABC_CLOCK_PERIOD_IN_PS = 10000
 export ABC_DRIVER_CELL = sky130_fd_sc_hd__buf_1
 export ABC_LOAD_IN_FF = 3
 
diff --git a/flow/designs/sky130hd/chameleon_hier/DMC_32x16HC/config.mk b/flow/designs/sky130hd/chameleon_hier/DMC_32x16HC/config.mk
@@ -15,7 +15,6 @@ export SDC_FILE = ${TOP_DIR}/${DESIGN_NAME}/constraint.sdc
 
 export PDN_CFG = ${TOP_DIR}/${DESIGN_NAME}/pdn.cfg
 
-export ABC_CLOCK_PERIOD_IN_PS = 10000
 export ABC_DRIVER_CELL = sky130_fd_sc_hd__buf_1
 export ABC_LOAD_IN_FF = 3
 
diff --git a/flow/designs/sky130hd/chameleon_hier/apb_sys_0/config.mk b/flow/designs/sky130hd/chameleon_hier/apb_sys_0/config.mk
@@ -15,7 +15,6 @@ export SDC_FILE = ${TOP_DIR}/${DESIGN_NAME}/constraint.sdc
 
 export PDN_CFG = ${TOP_DIR}/${DESIGN_NAME}/pdn.cfg
 
-export ABC_CLOCK_PERIOD_IN_PS = 10000
 export ABC_DRIVER_CELL = sky130_fd_sc_hd__buf_1
 export ABC_LOAD_IN_FF = 3
 
diff --git a/flow/designs/sky130hd/chameleon_hier/ibex_wrapper/config.mk b/flow/designs/sky130hd/chameleon_hier/ibex_wrapper/config.mk
@@ -37,7 +37,6 @@ export SDC_FILE          = ${TOP_DIR}/${DESIGN_NAME}/constraint.sdc
 
 export PDN_CFG = ${TOP_DIR}/${DESIGN_NAME}/pdn.cfg
 
-export ABC_CLOCK_PERIOD_IN_PS = 10000
 export ABC_DRIVER_CELL = sky130_fd_sc_hd__buf_1
 export ABC_LOAD_IN_FF = 3
 
diff --git a/flow/designs/sky130hd/coyote_tc/config.mk b/flow/designs/sky130hd/coyote_tc/config.mk
@@ -60,7 +60,6 @@ export ADDITIONAL_LEFS = $(IO_DIR)/lef/sky130_ef_io__gpiov2_pad_wrapped.lef \
 export DIE_AREA    = 0.0 0.0 5200 4609.14
 export CORE_AREA   = 210 210 4990 4389.14
 
-export ABC_CLOCK_PERIOD_IN_PS = 10000
 export ABC_DRIVER_CELL = sky130_fd_sc_hd__buf_1
 export ABC_LOAD_IN_FF = 3
 
diff --git a/flow/designs/sky130hd/microwatt/config.mk b/flow/designs/sky130hd/microwatt/config.mk
@@ -13,8 +13,6 @@ export CORE_AREA  = 10 10 2910 3510
 
 export PLACE_DENSITY ?= 0.20
 
-export ABC_CLOCK_PERIOD_IN_PS = 25000
-
 export microwatt_DIR = ./designs/$(PLATFORM)/$(DESIGN_NICKNAME)
 
 export ADDITIONAL_GDS  = $(wildcard $(microwatt_DIR)/gds/*.gds.gz)
diff --git a/flow/designs/sky130hd_fakestack/ariane136/config.mk b/flow/designs/sky130hd_fakestack/ariane136/config.mk
@@ -8,8 +8,6 @@ export RTLMP_FLOW = True
 
 export SDC_FILE      = ./designs/$(PLATFORM)/$(DESIGN_NICKNAME)/constraint.sdc
 
-export ABC_CLOCK_PERIOD_IN_PS = 4000
-
 export VERILOG_FILES = ./designs/src/$(DESIGN_NICKNAME)/ariane.sv2v.v \
                        ./designs/$(PLATFORM)/$(DESIGN_NICKNAME)/macros.v
 
diff --git a/flow/designs/sky130hs/coyote_tc/config.mk b/flow/designs/sky130hs/coyote_tc/config.mk
@@ -61,7 +61,6 @@ export ADDITIONAL_LEFS = $(IO_DIR)/lef/sky130_ef_io__gpiov2_pad_wrapped.lef \
 export DIE_AREA    = 0.0 0.0 5200 4609.14
 export CORE_AREA   = 210 210 4990 4389.14
 
-export ABC_CLOCK_PERIOD_IN_PS = 10000
 export ABC_DRIVER_CELL = sky130_fd_sc_hs__buf_1
 export ABC_LOAD_IN_FF = 3
 
diff --git a/flow/designs/sky130hs/riscv32i/config.mk b/flow/designs/sky130hs/riscv32i/config.mk
@@ -4,8 +4,6 @@ export PLATFORM    = sky130hs
 
 export VERILOG_FILES = $(sort $(wildcard ./designs/src/$(DESIGN_NICKNAME)/*.v))
 export SDC_FILE      = ./designs/$(PLATFORM)/$(DESIGN_NICKNAME)/constraint.sdc
-export ABC_CLOCK_PERIOD_IN_PS = 4000
-
 
 export CORE_UTILIZATION = 45
 export PLACE_DENSITY_LB_ADDON = 0.2

Original file line number	Diff line number	Diff line change
`@@ -16,5 +16,3 @@ export CORE_AREA = 1.26 1.89 248 248`
`16`	`16`
`17`	`17`
`18`	`18`	`export PLACE_DENSITY = uniform`
`19`		`-`
`20`		`-export ABC_CLOCK_PERIOD_IN_PS = 2600`
Original file line number	Diff line number	Diff line change
`@@ -13,4 +13,3 @@ export CORE_ASPECT_RATIO = 1`
`13`	`13`	`export CORE_MARGIN = 1`
`14`	`14`
`15`	`15`	`export PLACE_DENSITY = uniform`
`16`		`-export ABC_CLOCK_PERIOD_IN_PS = 1000`