Merge branch 'master' into secure-new_yosys_master

Signed-off-by: Eder Monteiro <[email protected]>

Author: eder-matheus

flow/designs/gf180/aes-hybrid/README

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+This is a test of hybrid rows.  In advanced finfet PDKs there may be
+rows of different heights.  GF180 is not such a process but we use it
+as a public proxy for one.  We use 9 and 7 track alternating rows to
+simulate the placement challenges.
+
+One problem with this approach is that the 9t cells have a wider power
+stripe than the 7t cells.  A modified set of 9t cells are used instead
+which have the power rails trimmed to not intefer with the 7t cells in
+adjacent rows.  The update cells are in
+adjusted-gf180mcu_5LM_1TM_9K_9t_sc.lef.  No modified gds or Liberty
+files are have been generated as they aren't essential to the testing
+goal.

flow/designs/gf180/aes-hybrid/adjusted-gf180mcu_5LM_1TM_9K_9t_sc.lef

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+export DESIGN_NICKNAME = aes-hybrid
+export DESIGN_NAME     = aes_cipher_top
+export PLATFORM        = gf180
+
+# See the README
+export SC_LEF = ./designs/$(PLATFORM)/$(DESIGN_NICKNAME)/adjusted-gf180mcu_5LM_1TM_9K_9t_sc.lef
+
+export BC_ADDITIONAL_LIB_FILES = gf180mcu_fd_sc_mcu7t$(POWER_OPTION)__ff_n40C_5v50.lib.gz
+
+export WC_ADDITIONAL_LIB_FILES = gf180mcu_fd_sc_mcu7t$(POWER_OPTION)__ss_125C_4v50.lib.gz
+
+export TC_ADDITIONAL_LIB_FILES = gf180mcu_fd_sc_mcu7t$(POWER_OPTION)__tt_025C_5v00.lib.gz
+
+export ADDITIONAL_LEFS = ./designs/$(PLATFORM)/$(DESIGN_NICKNAME)/hybrid_sites.lef \
+                         $(PLATFORM_DIR)/lef/gf180mcu_5LM_1TM_9K_7t_sc.lef
+export ADDITIONAL_LIBS = $(PLATFORM_DIR)/lib/$($(CORNER)_ADDITIONAL_LIB_FILES)
+#export ADDITIONAL_GDS  = $(wildcard $(PLATFORM_DIR)/gds/7t/*.gds)
+
+export PLACE_SITE      = sc9sc7
+
+export VERILOG_FILES   = $(sort $(wildcard ./designs/src/aes/*.v))
+export SDC_FILE        = ./designs/$(PLATFORM)/aes/constraint.sdc
+export ABC_AREA        = 1
+
+export CORE_UTILIZATION  = 30
+export CORE_ASPECT_RATIO = 1
+export CORE_MARGIN       = 2
+
+export PLACE_DENSITY = 0.40
+
+export ENABLE_DPO = 0
+export BALANCE_ROWS = 1
+
+export PDN_TCL = $(PLATFORM_DIR)/openROAD/pdn/pdn_grid_strategy_7t_6M.cfg
+
+ifneq ($(USE_FILL),)
+export DESIGN_TYPE = CELL
+else
+export DESIGN_TYPE = CELL_NODEN
+endif

flow/designs/gf180/aes-hybrid/config.mk

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+# Used to introduce the SITEs for hybrid rows
+
+VERSION 5.7 ;
+BUSBITCHARS "[]" ;
+DIVIDERCHAR "/" ;
+
+UNITS
+    DATABASE MICRONS 2000  ;
+    CAPACITANCE PICOFARADS 1 ;
+    CURRENT MILLIAMPS 1 ;
+    RESISTANCE OHMS 1 ;
+END UNITS
+
+# Copied from gf180mcu_5LM_1TM_9K_7t_tech.lef since we can't read two
+# tech LEFs
+SITE GF018hv5v_mcu_sc7
+  SYMMETRY X Y ;
+  CLASS core ;
+  SIZE 0.56 BY 3.92 ;
+END GF018hv5v_mcu_sc7
+
+# The hybrid site
+SITE sc9sc7
+  SYMMETRY X Y ;
+  CLASS core ;
+  SIZE 0.56 BY 8.96 ;
+  ROWPATTERN GF018hv5v_green_sc9 N GF018hv5v_mcu_sc7 FS ;
+END sc9sc7