1515 "cts__design__die__area" : 6214.96 ,
1616 "cts__design__die__area__post_repair" : 6214.96 ,
1717 "cts__design__die__area__pre_repair" : 6214.96 ,
18- "cts__design__instance__area" : 2747.13 ,
18+ "cts__design__instance__area" : 2767.93 ,
1919 "cts__design__instance__area__macros" : 0 ,
2020 "cts__design__instance__area__macros__post_repair" : 0 ,
2121 "cts__design__instance__area__macros__pre_repair" : 0 ,
2222 "cts__design__instance__area__post_repair" : 2521.95 ,
2323 "cts__design__instance__area__pre_repair" : 2521.95 ,
24- "cts__design__instance__area__stdcell" : 2747.13 ,
24+ "cts__design__instance__area__stdcell" : 2767.93 ,
2525 "cts__design__instance__area__stdcell__post_repair" : 2521.95 ,
2626 "cts__design__instance__area__stdcell__pre_repair" : 2521.95 ,
27- "cts__design__instance__count" : 25080 ,
27+ "cts__design__instance__count" : 25272 ,
2828 "cts__design__instance__count__hold_buffer" : 672.0 ,
2929 "cts__design__instance__count__macros" : 0 ,
3030 "cts__design__instance__count__macros__post_repair" : 0 ,
3131 "cts__design__instance__count__macros__pre_repair" : 0 ,
3232 "cts__design__instance__count__post_repair" : 22657 ,
3333 "cts__design__instance__count__pre_repair" : 22657 ,
34- "cts__design__instance__count__setup_buffer" : 1751 .0 ,
35- "cts__design__instance__count__stdcell" : 25080 ,
34+ "cts__design__instance__count__setup_buffer" : 1943 .0 ,
35+ "cts__design__instance__count__stdcell" : 25272 ,
3636 "cts__design__instance__count__stdcell__post_repair" : 22657 ,
3737 "cts__design__instance__count__stdcell__pre_repair" : 22657 ,
38- "cts__design__instance__displacement__max" : 9.075 ,
39- "cts__design__instance__displacement__mean" : 0.166 ,
40- "cts__design__instance__displacement__total" : 4163.36 ,
41- "cts__design__instance__utilization" : 0.493261 ,
38+ "cts__design__instance__displacement__max" : 8.952 ,
39+ "cts__design__instance__displacement__mean" : 0.173 ,
40+ "cts__design__instance__displacement__total" : 4373.89 ,
41+ "cts__design__instance__utilization" : 0.496995 ,
4242 "cts__design__instance__utilization__post_repair" : 0.452828 ,
4343 "cts__design__instance__utilization__pre_repair" : 0.452828 ,
44- "cts__design__instance__utilization__stdcell" : 0.493261 ,
44+ "cts__design__instance__utilization__stdcell" : 0.496995 ,
4545 "cts__design__instance__utilization__stdcell__post_repair" : 0.452828 ,
4646 "cts__design__instance__utilization__stdcell__pre_repair" : 0.452828 ,
4747 "cts__design__io" : 388 ,
4848 "cts__design__io__post_repair" : 388 ,
4949 "cts__design__io__pre_repair" : 388 ,
5050 "cts__design__violations" : 0 ,
51- "cts__power__internal__total" : 0.0293173 ,
52- "cts__power__internal__total__post_repair" : 0.0290712 ,
53- "cts__power__internal__total__pre_repair" : 0.0290712 ,
54- "cts__power__leakage__total" : 3.44914e-06 ,
55- "cts__power__leakage__total__post_repair" : 3.12442e-06 ,
56- "cts__power__leakage__total__pre_repair" : 3.12442e-06 ,
57- "cts__power__switching__total" : 0.0480246 ,
58- "cts__power__switching__total__post_repair" : 0.0507826 ,
59- "cts__power__switching__total__pre_repair" : 0.0507826 ,
60- "cts__power__total" : 0.0773453 ,
61- "cts__power__total__post_repair" : 0.0798569 ,
62- "cts__power__total__pre_repair" : 0.0798569 ,
63- "cts__route__wirelength__estimated" : 86119.9 ,
51+ "cts__route__wirelength__estimated" : 87116 ,
6452 "cts__timing__drv__hold_violation_count" : 0 ,
6553 "cts__timing__drv__hold_violation_count__post_repair" : 260 ,
6654 "cts__timing__drv__hold_violation_count__pre_repair" : 260 ,
8270 "cts__timing__drv__max_slew_limit" : 0.441886 ,
8371 "cts__timing__drv__max_slew_limit__post_repair" : 0.396489 ,
8472 "cts__timing__drv__max_slew_limit__pre_repair" : 0.396489 ,
85- "cts__timing__drv__setup_violation_count" : 233 ,
73+ "cts__timing__drv__setup_violation_count" : 226 ,
8674 "cts__timing__drv__setup_violation_count__post_repair" : 366 ,
8775 "cts__timing__drv__setup_violation_count__pre_repair" : 366 ,
88- "cts__timing__setup__tns" : -5132.21 ,
76+ "cts__timing__setup__tns" : -4163.14 ,
8977 "cts__timing__setup__tns__post_repair" : -25805.1 ,
9078 "cts__timing__setup__tns__pre_repair" : -25805.1 ,
91- "cts__timing__setup__ws" : -32.261 ,
79+ "cts__timing__setup__ws" : -28.1594 ,
9280 "cts__timing__setup__ws__post_repair" : -154.554 ,
9381 "cts__timing__setup__ws__pre_repair" : -154.554 ,
94- "detailedplace__cpu__total" : 25.39 ,
82+ "detailedplace__cpu__total" : 22.29 ,
9583 "detailedplace__design__core__area" : 5569.33 ,
9684 "detailedplace__design__die__area" : 6214.96 ,
9785 "detailedplace__design__instance__area" : 2496.66 ,
10795 "detailedplace__design__instance__utilization__stdcell" : 0.448288 ,
10896 "detailedplace__design__io" : 388 ,
10997 "detailedplace__design__violations" : 0 ,
110- "detailedplace__mem__peak" : 282476.0 ,
111- "detailedplace__power__internal__total" : 0.0286586 ,
112- "detailedplace__power__leakage__total" : 3.10401e-06 ,
113- "detailedplace__power__switching__total" : 0.0499538 ,
114- "detailedplace__power__total" : 0.0786155 ,
98+ "detailedplace__mem__peak" : 271944.0 ,
11599 "detailedplace__route__wirelength__estimated" : 75406.6 ,
116- "detailedplace__runtime__total" : " 0:25.59 " ,
100+ "detailedplace__runtime__total" : " 0:22.47 " ,
117101 "detailedplace__timing__drv__hold_violation_count" : 0 ,
118102 "detailedplace__timing__drv__max_cap" : 0 ,
119103 "detailedplace__timing__drv__max_cap_limit" : 0.700653 ,
125109 "detailedplace__timing__setup__tns" : -25316.9 ,
126110 "detailedplace__timing__setup__ws" : -150.58 ,
127111 "detailedroute__route__drc_errors" : 0 ,
128- "detailedroute__route__drc_errors__iter:1" : 11466 ,
129- "detailedroute__route__drc_errors__iter:2" : 3551 ,
130- "detailedroute__route__drc_errors__iter:3" : 3387 ,
131- "detailedroute__route__drc_errors__iter:4" : 159 ,
132- "detailedroute__route__drc_errors__iter:5" : 11 ,
133- "detailedroute__route__drc_errors__iter:6" : 1 ,
134- "detailedroute__route__drc_errors__iter:7" : 0 ,
135- "detailedroute__route__net" : 24515 ,
112+ "detailedroute__route__drc_errors__iter:1" : 8077 ,
113+ "detailedroute__route__drc_errors__iter:2" : 1008 ,
114+ "detailedroute__route__drc_errors__iter:3" : 800 ,
115+ "detailedroute__route__drc_errors__iter:4" : 1 ,
116+ "detailedroute__route__drc_errors__iter:5" : 0 ,
117+ "detailedroute__route__net" : 24707 ,
136118 "detailedroute__route__net__special" : 2 ,
137- "detailedroute__route__vias" : 214629 ,
119+ "detailedroute__route__vias" : 218990 ,
138120 "detailedroute__route__vias__multicut" : 0 ,
139- "detailedroute__route__vias__singlecut" : 214629 ,
140- "detailedroute__route__wirelength" : 102756 ,
141- "detailedroute__route__wirelength__iter:1" : 103916 ,
142- "detailedroute__route__wirelength__iter:2" : 103157 ,
143- "detailedroute__route__wirelength__iter:3" : 102899 ,
144- "detailedroute__route__wirelength__iter:4" : 102765 ,
145- "detailedroute__route__wirelength__iter:5" : 102758 ,
146- "detailedroute__route__wirelength__iter:6" : 102757 ,
147- "detailedroute__route__wirelength__iter:7" : 102756 ,
148- "finish__clock__skew__hold" : 22.407 ,
149- "finish__clock__skew__setup" : 21.8537 ,
150- "finish__cpu__total" : 51.09 ,
121+ "detailedroute__route__vias__singlecut" : 218990 ,
122+ "detailedroute__route__wirelength" : 104187 ,
123+ "detailedroute__route__wirelength__iter:1" : 105086 ,
124+ "detailedroute__route__wirelength__iter:2" : 104343 ,
125+ "detailedroute__route__wirelength__iter:3" : 104186 ,
126+ "detailedroute__route__wirelength__iter:4" : 104187 ,
127+ "detailedroute__route__wirelength__iter:5" : 104187 ,
128+ "finish__clock__skew__hold" : 19.7598 ,
129+ "finish__clock__skew__setup" : 19.2045 ,
130+ "finish__cpu__total" : 49.76 ,
151131 "finish__design__core__area" : 5569.33 ,
152132 "finish__design__die__area" : 6214.96 ,
153- "finish__design__instance__area" : 2902.06 ,
133+ "finish__design__instance__area" : 2767.93 ,
154134 "finish__design__instance__area__macros" : 0 ,
155- "finish__design__instance__area__stdcell" : 2902.06 ,
156- "finish__design__instance__count" : 28622 ,
135+ "finish__design__instance__area__stdcell" : 2767.93 ,
136+ "finish__design__instance__count" : 25272 ,
157137 "finish__design__instance__count__macros" : 0 ,
158- "finish__design__instance__count__stdcell" : 28622 ,
159- "finish__design__instance__utilization" : 0.521079 ,
160- "finish__design__instance__utilization__stdcell" : 0.521079 ,
138+ "finish__design__instance__count__stdcell" : 25272 ,
139+ "finish__design__instance__utilization" : 0.496995 ,
140+ "finish__design__instance__utilization__stdcell" : 0.496995 ,
161141 "finish__design__io" : 388 ,
162- "finish__mem__peak" : 1540596.0 ,
163- "finish__power__internal__total" : 0.0331168 ,
164- "finish__power__leakage__total" : 3.44914e-06 ,
165- "finish__power__switching__total" : 0.0543455 ,
166- "finish__power__total" : 0.0874658 ,
167- "finish__runtime__total" : " 0:51.85" ,
142+ "finish__mem__peak" : 1450300.0 ,
143+ "finish__runtime__total" : " 0:50.55" ,
168144 "finish__timing__drv__hold_violation_count" : 1.0 ,
169145 "finish__timing__drv__max_cap" : 0 ,
170- "finish__timing__drv__max_cap_limit" : 0.688269 ,
146+ "finish__timing__drv__max_cap_limit" : 0.697248 ,
171147 "finish__timing__drv__max_fanout" : 0 ,
172148 "finish__timing__drv__max_fanout_limit" : 1e+30 ,
173149 "finish__timing__drv__max_slew" : 0 ,
174- "finish__timing__drv__max_slew_limit" : 0.150098 ,
150+ "finish__timing__drv__max_slew_limit" : 0.0391043 ,
175151 "finish__timing__drv__setup_violation_count" : 1.0 ,
176- "finish__timing__setup__tns" : -637.202 ,
177- "finish__timing__setup__ws" : -31.8784 ,
178- "finish__timing__wns_percent_delay" : -5.840273 ,
152+ "finish__timing__setup__tns" : -36.9993 ,
153+ "finish__timing__setup__ws" : -9.90319 ,
154+ "finish__timing__wns_percent_delay" : -1.862498 ,
179155 "floorplan__cpu__total" : 1.99 ,
180156 "floorplan__design__core__area" : 5569.33 ,
181157 "floorplan__design__die__area" : 6214.96 ,
188164 "floorplan__design__instance__utilization" : 0.382168 ,
189165 "floorplan__design__instance__utilization__stdcell" : 0.382168 ,
190166 "floorplan__design__io" : 388 ,
191- "floorplan__mem__peak" : 192080.0 ,
192- "floorplan__power__internal__total" : 0.0265706 ,
193- "floorplan__power__leakage__total" : 2.52794e-06 ,
194- "floorplan__power__switching__total" : 0.0343783 ,
195- "floorplan__power__total" : 0.0609514 ,
196- "floorplan__runtime__total" : " 0:02.12" ,
167+ "floorplan__mem__peak" : 190260.0 ,
168+ "floorplan__runtime__total" : " 0:02.09" ,
197169 "floorplan__timing__setup__tns" : -210064 ,
198170 "floorplan__timing__setup__ws" : -1777.33 ,
199- "globalplace__cpu__total" : 17.8 ,
171+ "globalplace__cpu__total" : 14.71 ,
200172 "globalplace__design__core__area" : 5569.33 ,
201173 "globalplace__design__die__area" : 6214.96 ,
202174 "globalplace__design__instance__area" : 2152.62 ,
208180 "globalplace__design__instance__utilization" : 0.386514 ,
209181 "globalplace__design__instance__utilization__stdcell" : 0.386514 ,
210182 "globalplace__design__io" : 388 ,
211- "globalplace__mem__peak" : 264036.0 ,
212- "globalplace__power__internal__total" : 0.0270376 ,
213- "globalplace__power__leakage__total" : 2.52794e-06 ,
214- "globalplace__power__switching__total" : 0.0426728 ,
215- "globalplace__power__total" : 0.0697129 ,
216- "globalplace__runtime__total" : " 0:17.97" ,
183+ "globalplace__mem__peak" : 253436.0 ,
184+ "globalplace__runtime__total" : " 0:14.87" ,
217185 "globalplace__timing__setup__tns" : -452852 ,
218186 "globalplace__timing__setup__ws" : -2978.32 ,
219187 "globalroute__antenna__violating__nets" : 0 ,
220188 "globalroute__antenna__violating__pins" : 0 ,
221- "globalroute__clock__skew__hold" : 15.557 ,
222- "globalroute__clock__skew__setup" : 15.557 ,
189+ "globalroute__clock__skew__hold" : 15.3291 ,
190+ "globalroute__clock__skew__setup" : 15.3291 ,
223191 "globalroute__design__core__area" : 5569.33 ,
224192 "globalroute__design__die__area" : 6214.96 ,
225- "globalroute__design__instance__area" : 2902.06 ,
193+ "globalroute__design__instance__area" : 2767.93 ,
226194 "globalroute__design__instance__area__macros" : 0 ,
227- "globalroute__design__instance__area__stdcell" : 2902.06 ,
228- "globalroute__design__instance__count" : 28622 ,
195+ "globalroute__design__instance__area__stdcell" : 2767.93 ,
196+ "globalroute__design__instance__count" : 25272 ,
229197 "globalroute__design__instance__count__macros" : 0 ,
230- "globalroute__design__instance__count__stdcell" : 28622 ,
231- "globalroute__design__instance__utilization" : 0.521079 ,
232- "globalroute__design__instance__utilization__stdcell" : 0.521079 ,
198+ "globalroute__design__instance__count__stdcell" : 25272 ,
199+ "globalroute__design__instance__utilization" : 0.496995 ,
200+ "globalroute__design__instance__utilization__stdcell" : 0.496995 ,
233201 "globalroute__design__io" : 388 ,
234- "globalroute__power__internal__total" : 0.0330565 ,
235- "globalroute__power__leakage__total" : 3.44914e-06 ,
236- "globalroute__power__switching__total" : 0.0552817 ,
237- "globalroute__power__total" : 0.0883417 ,
238- "globalroute__timing__clock__slack" : -50.517 ,
202+ "globalroute__timing__clock__slack" : -45.246 ,
239203 "globalroute__timing__drv__hold_violation_count" : 1 ,
240204 "globalroute__timing__drv__max_cap" : 0 ,
241205 "globalroute__timing__drv__max_cap_limit" : 0.680997 ,
242206 "globalroute__timing__drv__max_fanout" : 0 ,
243207 "globalroute__timing__drv__max_fanout_limit" : 1e+30 ,
244208 "globalroute__timing__drv__max_slew" : 0 ,
245- "globalroute__timing__drv__max_slew_limit" : 0.390903 ,
246- "globalroute__timing__drv__setup_violation_count" : 244 ,
247- "globalroute__timing__setup__tns" : -7657.01 ,
248- "globalroute__timing__setup__ws" : -50.5168 ,
249- "placeopt__cpu__total" : 17.8 ,
209+ "globalroute__timing__drv__max_slew_limit" : 0.390369 ,
210+ "globalroute__timing__drv__setup_violation_count" : 236 ,
211+ "globalroute__timing__setup__tns" : -6608.77 ,
212+ "globalroute__timing__setup__ws" : -45.2463 ,
213+ "placeopt__cpu__total" : 14.71 ,
250214 "placeopt__design__core__area" : 5569.33 ,
251215 "placeopt__design__core__area__pre_opt" : 5569.33 ,
252216 "placeopt__design__die__area" : 6214.96 ,
269233 "placeopt__design__instance__utilization__stdcell__pre_opt" : 0.386514 ,
270234 "placeopt__design__io" : 388 ,
271235 "placeopt__design__io__pre_opt" : 388 ,
272- "placeopt__mem__peak" : 264036.0 ,
273- "placeopt__power__internal__total" : 0.0284753 ,
274- "placeopt__power__internal__total__pre_opt" : 0.0270376 ,
275- "placeopt__power__leakage__total" : 3.10401e-06 ,
276- "placeopt__power__leakage__total__pre_opt" : 2.52794e-06 ,
277- "placeopt__power__switching__total" : 0.0497863 ,
278- "placeopt__power__switching__total__pre_opt" : 0.0426728 ,
279- "placeopt__power__total" : 0.0782646 ,
280- "placeopt__power__total__pre_opt" : 0.0697129 ,
281- "placeopt__runtime__total" : " 0:17.97" ,
236+ "placeopt__mem__peak" : 253436.0 ,
237+ "placeopt__runtime__total" : " 0:14.87" ,
282238 "placeopt__timing__drv__hold_violation_count" : 0 ,
283239 "placeopt__timing__drv__max_cap" : 0 ,
284240 "placeopt__timing__drv__max_cap_limit" : 0.702318 ,
292248 "placeopt__timing__setup__ws" : -149.852 ,
293249 "placeopt__timing__setup__ws__pre_opt" : -2978.32 ,
294250 "run__flow__design" : " aes" ,
295- "run__flow__generate_date" : " 2023-03-21 08:52 " ,
251+ "run__flow__generate_date" : " 2023-05-02 23:41 " ,
296252 "run__flow__metrics_version" : " Metrics_2.1.2" ,
297253 "run__flow__openroad_commit" : " N/A" ,
298- "run__flow__openroad_version" : " v2.0-7328-g3dc4848b3 " ,
254+ "run__flow__openroad_version" : " v2.0-7988-g20b907452 " ,
299255 "run__flow__platform" : " asap7" ,
300256 "run__flow__platform__capacitance_units" : " 1fF" ,
301257 "run__flow__platform__current_units" : " 1mA" ,
304260 "run__flow__platform__resistance_units" : " 1kohm" ,
305261 "run__flow__platform__time_units" : " 1ps" ,
306262 "run__flow__platform__voltage_units" : " 1v" ,
307- "run__flow__platform_commit" : " 2119b0c73a8bdc2b452a99b59a6a2310a10ce02b " ,
308- "run__flow__scripts_commit" : " 2119b0c73a8bdc2b452a99b59a6a2310a10ce02b " ,
309- "run__flow__uuid" : " ab7c7aea-d814-4390-80c8-2e29f45287d9 " ,
263+ "run__flow__platform_commit" : " ab7d0039f546c75ffa8b40f15670fe45abd1c398 " ,
264+ "run__flow__scripts_commit" : " ab7d0039f546c75ffa8b40f15670fe45abd1c398 " ,
265+ "run__flow__uuid" : " 88178e1f-05ce-4a26-ae34-95cabc3169ae " ,
310266 "run__flow__variant" : " base" ,
311- "synth__cpu__total" : 129.36 ,
267+ "synth__cpu__total" : 127.21 ,
312268 "synth__design__instance__area__stdcell" : 2240.12952 ,
313269 "synth__design__instance__count__stdcell" : 22235.0 ,
314- "synth__mem__peak" : 708124 .0 ,
315- "synth__runtime__total" : " 2:12.41 " ,
316- "total_time" : " 0:04:07.910000 "
270+ "synth__mem__peak" : 705060 .0 ,
271+ "synth__runtime__total" : " 2:10.05 " ,
272+ "total_time" : " 0:03:54.900000 "
317273}
0 commit comments