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LucasYukiLucasYuki
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Merge remote-tracking branch 'private/master' into secure-gpl-binSize-float
2 parents c3e3a9f + 6fb3f3e commit d768118

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11 files changed

+286
-173
lines changed

11 files changed

+286
-173
lines changed

‎flow/BUILD.bazel‎

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Original file line numberDiff line numberDiff line change
@@ -1,5 +1,4 @@
11
load("@bazel-orfs//:openroad.bzl", "orfs_flow")
2-
load("@rules_python//python:pip.bzl", "compile_pip_requirements")
32

43
filegroup(
54
name = "constraints-gcd",
@@ -101,158 +100,8 @@ orfs_flow(
101100
]),
102101
)
103102

104-
filegroup(
105-
name = "mock-array-constraints",
106-
srcs = [
107-
"designs/asap7/mock-array/constraints.sdc",
108-
],
109-
visibility = [":__subpackages__"],
110-
)
111-
112-
filegroup(
113-
name = "mock-array-io",
114-
srcs = [
115-
"designs/asap7/mock-array/io.tcl",
116-
],
117-
data = [
118-
"designs/src/mock-array/util.tcl",
119-
],
120-
visibility = [":__subpackages__"],
121-
)
122-
123-
MOCK_ARRAY_FLOORPLAN_PLACE = {
124-
"PLACE_PINS_ARGS": "-annealing",
125-
"IO_CONSTRAINTS": "$(location :mock-array-io)",
126-
"PLACE_DENSITY": "0.30",
127-
"DIE_AREA": "0 0 358.56 388.8",
128-
"CORE_AREA": "2.16 2.16 356.40000000000003 386.64000000000004",
129-
"MACRO_PLACE_HALO": "0 2.16",
130-
"RTLMP_BOUNDARY_WT": "0",
131-
"PDN_TCL": "$(PLATFORM_DIR)/openRoad/pdn/BLOCKS_grid_strategy.tcl",
132-
"MACRO_HALO_X": "0.5",
133-
"MACRO_HALO_Y": "0.5",
134-
"MACRO_BLOCKAGE_HALO": "0",
135-
"ADDITIONAL_FILES": "$(locations :mock-array-io)",
136-
}
137-
138-
orfs_flow(
139-
name = "MockArray",
140-
macros = ["Element_generate_abstract"],
141-
stage_arguments = {
142-
"synth": {
143-
"SDC_FILE": "$(location :mock-array-constraints)",
144-
},
145-
"floorplan": MOCK_ARRAY_FLOORPLAN_PLACE | {
146-
},
147-
"place": MOCK_ARRAY_FLOORPLAN_PLACE | {
148-
},
149-
"cts": {
150-
"CTS_BUF_DISTANCE": "60",
151-
},
152-
"route": {
153-
# works with 28 or more iterations as of writing, so give it a few more.
154-
"GLOBAL_ROUTE_ARGS": "-congestion_iterations 40 -verbose",
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# If this design isn't quickly done in detailed routing, something is wrong.
156-
# At time of adding this option, only 12 iterations were needed for 0
157-
# violations.
158-
"DETAILED_ROUTE_ARGS": "-bottom_routing_layer M2 -top_routing_layer M7 -save_guide_updates -verbose 1 -droute_end_iter 15",
159-
# since we are specifying DETAILED_ROUTE_ARGS, we need to communicate the
160-
# same information to other stages in the flow.
161-
"MIN_ROUTING_LAYER": "M2",
162-
"MAX_ROUTING_LAYER": "M7",
163-
},
164-
"final": {
165-
"GDS_ALLOW_EMPTY": "Element",
166-
"PWR_NETS_VOLTAGEsS": "",
167-
"GND_NETS_VOLTAGES": "",
168-
},
169-
},
170-
stage_sources = {
171-
"synth": all_sources + [":mock-array-constraints"] + [":mock-array-io"],
172-
"floorplan": all_sources + [":mock-array-io"],
173-
"place": all_sources + [":mock-array-io"],
174-
"cts": all_sources,
175-
"final": all_sources,
176-
},
177-
verilog_files = glob(include = ["designs/src/mock-array/*.v"]),
178-
)
179-
180-
filegroup(
181-
name = "mock-array-element-io",
182-
srcs = [
183-
"designs/asap7/mock-array/Element/io.tcl",
184-
],
185-
data = [
186-
"designs/src/mock-array/util.tcl",
187-
],
188-
visibility = [":__subpackages__"],
189-
)
190-
191-
MOCK_ARRAY_ELEMENT_FLOORPLAN_PLACE = {
192-
"IO_CONSTRAINTS": "$(location :mock-array-element-io)",
193-
"PLACE_PINS_ARGS": "-annealing",
194-
}
195-
196-
MOCK_ARRAY_ELEMENT_ALL = {
197-
"MOCK_ARRAY_ROWS": "8",
198-
"MOCK_ARRAY_COLS": "8",
199-
}
200-
201-
mock_array_all_sources = ["designs/src/mock-array/util.tcl"]
202-
203-
orfs_flow(
204-
name = "Element",
205-
abstract_stage = "route",
206-
arguments = {
207-
"PLACE_DENSITY": "0.82",
208-
},
209-
stage_arguments = {
210-
"synth": MOCK_ARRAY_ELEMENT_ALL | {
211-
"SDC_FILE": "$(location :mock-array-constraints)",
212-
},
213-
"floorplan": MOCK_ARRAY_ELEMENT_ALL | MOCK_ARRAY_ELEMENT_FLOORPLAN_PLACE | {
214-
"DIE_AREA": "0 0 43.2 43.2",
215-
"CORE_AREA": "1.08 1.08 42.120000000000005 42.120000000000005",
216-
"PDN_TCL": "$(PLATFORM_DIR)/openRoad/pdn/BLOCK_grid_strategy.tcl",
217-
},
218-
"place": MOCK_ARRAY_ELEMENT_ALL | MOCK_ARRAY_ELEMENT_FLOORPLAN_PLACE | {
219-
},
220-
"cts": MOCK_ARRAY_ELEMENT_ALL | {
221-
},
222-
"route": MOCK_ARRAY_ELEMENT_ALL | {
223-
# If this design isn't quickly done in detailed routing, something is wrong.
224-
# At time of adding this option, only 3 iterations were needed for 0
225-
# violations.
226-
"DETAILED_ROUTE_ARGS": "-bottom_routing_layer M2 -top_routing_layer M5 -save_guide_updates -verbose 1 -droute_end_iter 10",
227-
# since we are specifying DETAILED_ROUTE_ARGS, we need to communicate the
228-
# same information to other stages in the flow.
229-
"MIN_ROUTING_LAYER": "M2",
230-
"MAX_ROUTING_LAYER": "M5",
231-
},
232-
"final": MOCK_ARRAY_ELEMENT_ALL | {
233-
"PWR_NETS_VOLTAGES": "",
234-
"GND_NETS_VOLTAGES": "",
235-
},
236-
},
237-
stage_sources = {
238-
"synth": mock_array_all_sources + [":mock-array-constraints"],
239-
"floorplan": mock_array_all_sources + [":mock-array-element-io"],
240-
"place": mock_array_all_sources + [":mock-array-element-io"],
241-
"cts": mock_array_all_sources,
242-
"route": mock_array_all_sources,
243-
"final": mock_array_all_sources,
244-
},
245-
verilog_files = glob(include = ["designs/src/mock-array/*.v"]),
246-
)
247-
248103
filegroup(
249104
name = "ethmac_lvt_src",
250105
srcs = glob(include = ["designs/src/ethmac_lvt/*.v"]),
251106
visibility = [":__subpackages__"],
252107
)
253-
254-
compile_pip_requirements(
255-
name = "requirements",
256-
src = "util/requirements.in",
257-
requirements_txt = "util/requirements_lock.txt",
258-
)

‎flow/designs/asap7/ethmac_lvt/BUILD.bazel‎

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,59 @@
1+
load("@bazel-orfs//:sweep.bzl", "orfs_sweep")
2+
load("//util:plot_congestion.bzl", "plot_congestion")
3+
4+
# Format densities, rounding to 2 decimal places.
5+
SWEEPS = {
6+
"PLACE_DENSITY": [str(0.60 + x * 0.01 + 0.005)[:4] for x in range(20)],
7+
"CORE_UTILIZATION": [str(40 + x * 5) for x in range(4)],
8+
}
9+
10+
SWEEP = "PLACE_DENSITY"
11+
12+
orfs_sweep(
13+
name = "ethmac_lvt",
14+
arguments = {
15+
# Faster builds
16+
"SKIP_INCREMENTAL_REPAIR": "1",
17+
"GPL_TIMING_DRIVEN": "0",
18+
# Various
19+
"SDC_FILE": "$(location :constraint.sdc)",
20+
"ABC_AREA": "1",
21+
"CORE_UTILIZATION": "40",
22+
"CORE_ASPECT_RATIO": "1",
23+
"CORE_MARGIN": "2",
24+
"PLACE_DENSITY": "0.60",
25+
"ASAP7_USELVT": "1",
26+
"RECOVER_POWER": "1",
27+
"ADDITIONAL_LIBS": "$(LIB_DIR)/asap7sc7p5t_AO_RVT_FF_nldm_211120.lib.gz \
28+
$(LIB_DIR)/asap7sc7p5t_INVBUF_RVT_FF_nldm_220122.lib.gz \
29+
$(LIB_DIR)/asap7sc7p5t_OA_RVT_FF_nldm_211120.lib.gz \
30+
$(LIB_DIR)/asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.lib.gz \
31+
$(LIB_DIR)/asap7sc7p5t_SEQ_RVT_FF_nldm_220123.lib",
32+
"ADDITIONAL_GDS": "$(PLATFORM_DIR)/gds/asap7sc7p5t_28_R_220121a.gds",
33+
"ADDITIONAL_LEFS": "$(PLATFORM_DIR)/lef/asap7sc7p5t_28_R_1x_220121a.lef",
34+
},
35+
other_variants = {"base": {}},
36+
sources = {
37+
"SDC_FILE": [":constraint.sdc"],
38+
},
39+
sweep = {
40+
value: {
41+
"arguments": {
42+
SWEEP: value,
43+
},
44+
"previous_stage": {
45+
"floorplan": "ethmac_lvt_synth",
46+
},
47+
}
48+
for value in SWEEPS[SWEEP]
49+
},
50+
top = "ethmac",
51+
verilog_files = ["//:ethmac_lvt_src"],
52+
)
53+
54+
plot_congestion(
55+
name = "plot",
56+
srcs = [":ethmac_lvt_{value}_grt".format(value = value) for value in SWEEPS[SWEEP]],
57+
argument = SWEEP,
58+
values = SWEEPS[SWEEP],
59+
)

‎flow/designs/asap7/mock-array/BUILD.bazel‎

Lines changed: 122 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,122 @@
1+
load("@bazel-orfs//:openroad.bzl", "orfs_flow")
2+
load("@bazel-orfs//:sweep.bzl", "orfs_sweep")
3+
load("//util:plot_congestion.bzl", "plot_congestion")
4+
5+
# Format densities, rounding to 2 decimal places.
6+
SWEEPS = {
7+
"PLACE_DENSITY": [str(0.82 + x * 0.01 + 0.005)[:4] for x in range(10)],
8+
}
9+
10+
SWEEP = "PLACE_DENSITY"
11+
12+
filegroup(
13+
name = "mock-array-constraints",
14+
srcs = [
15+
"constraints.sdc",
16+
],
17+
visibility = [":__subpackages__"],
18+
)
19+
20+
filegroup(
21+
name = "mock-array-io",
22+
srcs = [
23+
"io.tcl",
24+
],
25+
data = [
26+
"//designs/src/mock-array:util.tcl",
27+
],
28+
visibility = [":__subpackages__"],
29+
)
30+
31+
orfs_flow(
32+
name = "MockArray",
33+
arguments = {
34+
"PLACE_PINS_ARGS": "-annealing",
35+
"IO_CONSTRAINTS": "$(location :mock-array-io)",
36+
"PLACE_DENSITY": "0.30",
37+
"DIE_AREA": "0 0 358.56 388.8",
38+
"CORE_AREA": "2.16 2.16 356.40000000000003 386.64000000000004",
39+
"MACRO_PLACE_HALO": "0 2.16",
40+
"RTLMP_BOUNDARY_WT": "0",
41+
"PDN_TCL": "$(PLATFORM_DIR)/openRoad/pdn/BLOCKS_grid_strategy.tcl",
42+
"MACRO_HALO_X": "0.5",
43+
"MACRO_HALO_Y": "0.5",
44+
"MACRO_BLOCKAGE_HALO": "0",
45+
"SDC_FILE": "$(location :mock-array-constraints)",
46+
"MAX_ROUTING_LAYER": "M9",
47+
"GDS_ALLOW_EMPTY": "Element",
48+
"PWR_NETS_VOLTAGEsS": "",
49+
"GND_NETS_VOLTAGES": "",
50+
},
51+
macros = ["Element_generate_abstract"],
52+
stage_sources = {
53+
"synth": [":mock-array-constraints"] + [":mock-array-io"],
54+
"floorplan": [":mock-array-io"],
55+
"place": [":mock-array-io"],
56+
},
57+
verilog_files = ["//designs/src/mock-array:verilog"],
58+
)
59+
60+
filegroup(
61+
name = "mock-array-element-io",
62+
srcs = [
63+
"Element/io.tcl",
64+
],
65+
data = [
66+
"//designs/src/mock-array:util.tcl",
67+
],
68+
visibility = [":__subpackages__"],
69+
)
70+
71+
mock_array_all_sources = ["//designs/src/mock-array:util.tcl"]
72+
73+
orfs_sweep(
74+
name = "Element",
75+
abstract_stage = "route",
76+
arguments = {
77+
"PLACE_DENSITY": "0.82",
78+
"MOCK_ARRAY_ROWS": "8",
79+
"MOCK_ARRAY_COLS": "8",
80+
"DETAILED_ROUTE_END_ITERATION": "6",
81+
"MIN_ROUTING_LAYER": "M2",
82+
"MAX_ROUTING_LAYER": "M5",
83+
"IO_PLACER_H": "M2 M4",
84+
"IO_PLACER_V": "M3 M5",
85+
"PLACE_PINS_ARGS": "-annealing",
86+
"GND_NETS_VOLTAGES": "",
87+
"PWR_NETS_VOLTAGES": "",
88+
"SDC_FILE": "$(location :mock-array-constraints)",
89+
"IO_CONSTRAINTS": "$(location :mock-array-element-io)",
90+
"DIE_AREA": "0 0 43.2 43.2",
91+
"CORE_AREA": "1.08 1.08 42.120000000000005 42.120000000000005",
92+
"PDN_TCL": "$(PLATFORM_DIR)/openRoad/pdn/BLOCK_grid_strategy.tcl",
93+
},
94+
other_variants = {"base": {}},
95+
stage_sources = {
96+
"synth": mock_array_all_sources + [":mock-array-constraints"],
97+
"floorplan": mock_array_all_sources + [":mock-array-element-io"],
98+
"place": mock_array_all_sources + [":mock-array-element-io"],
99+
"cts": mock_array_all_sources,
100+
"route": mock_array_all_sources,
101+
"final": mock_array_all_sources,
102+
},
103+
sweep = {
104+
value: {
105+
"arguments": {
106+
SWEEP: value,
107+
},
108+
"previous_stage": {
109+
"floorplan": "Element_synth",
110+
},
111+
}
112+
for value in SWEEPS[SWEEP]
113+
},
114+
verilog_files = ["//designs/src/mock-array:verilog"],
115+
)
116+
117+
plot_congestion(
118+
name = "plot",
119+
srcs = [":Element_{value}_grt".format(value = value) for value in SWEEPS[SWEEP]],
120+
argument = SWEEP,
121+
values = SWEEPS[SWEEP],
122+
)

‎flow/designs/src/mock-array/BUILD.bazel‎

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,7 @@
1+
exports_files(["util.tcl"] + glob(["*.v"]))
2+
3+
filegroup(
4+
name = "verilog",
5+
srcs = glob(["*.v"]),
6+
visibility = ["//visibility:public"],
7+
)

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