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mock-array: fix clock period to be 250ps in .vcd
Signed-off-by: Øyvind Harboe <[email protected]>
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flow/designs/asap7/mock-array/simulate.sh

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@@ -18,6 +18,7 @@ cp $FLOW_HOME/results/asap7/mock-array_Element/base/6_final.v $POST_DIR/MockArra
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# Run simulation and have Verilator write the output files to the objects area
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verilator -Wall --cc \
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--timescale 1ps/1ps \
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-Wno-DECLFILENAME \
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-Wno-UNUSEDSIGNAL \
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-Wno-PINMISSING \

flow/designs/src/mock-array/simulate.cpp

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@@ -80,7 +80,7 @@ int main(int argc, char** argv) {
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for (int k = 0; k < 2; k++) {
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top->eval();
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vcd->dump(tick++);
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vcd->dump(tick++ * 125);
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top->clock = !top->clock;
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}
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}

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