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After the don't use change the mapping to standard cells is denser. For
the area coming out of synthesis we have
Chip area for module '\cva6': 14649.248080
of which used for sequential elements: 3027.420360 (20.67%)
vs previously
Chip area for module '\cva6': 17152.298740
of which used for sequential elements: 3027.420360 (17.65%)
At the same time RD placement struggles with the new netlist. We can
lower the placement density to work around and still fit into the
original die size.
Signed-off-by: Martin Povišer <[email protected]>
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