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eder-matheuseder-matheus
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Merge branch 'master' into clock_layer_range
Signed-off-by: Eder Monteiro <[email protected]>
2 parents 04090ad + 0273570 commit f389e13

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30 files changed

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30 files changed

+5556
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lines changed

‎flow/designs/asap7/cva6/config.mk‎

Lines changed: 60 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -2,49 +2,94 @@ export PLATFORM = asap7
22

33
export DESIGN_NAME = cva6
44

5+
# Some files are listed specifically vs. sorted wildcard to control the order
6+
# (makes Verific happy)
57
export SRC_HOME = $(DESIGN_HOME)/src/$(DESIGN_NICKNAME)
68
export VERILOG_FILES = $(sort $(wildcard $(SRC_HOME)/common/local/util/*.sv)) \
9+
$(SRC_HOME)/core/include/config_pkg.sv \
10+
$(SRC_HOME)/core/include/cv32a65x_config_pkg.sv \
11+
$(SRC_HOME)/core/include/riscv_pkg.sv \
12+
$(SRC_HOME)/core/include/ariane_pkg.sv \
13+
$(SRC_HOME)/core/include/build_config_pkg.sv \
14+
$(SRC_HOME)/core/include/std_cache_pkg.sv \
15+
$(SRC_HOME)/core/include/wt_cache_pkg.sv \
16+
$(sort $(wildcard $(SRC_HOME)/vendor/pulp-platform/common_cells/src/*.sv)) \
17+
$(SRC_HOME)/core/cvfpu/src/fpnew_pkg.sv \
18+
$(sort $(wildcard $(SRC_HOME)/vendor/pulp-platform/axi/src/*.sv)) \
19+
$(SRC_HOME)/core/cvfpu/src/fpnew_cast_multi.sv \
20+
$(SRC_HOME)/core/cvfpu/src/fpnew_classifier.sv \
21+
$(SRC_HOME)/core/cvfpu/src/fpnew_divsqrt_multi.sv \
22+
$(SRC_HOME)/core/cvfpu/src/fpnew_fma.sv \
23+
$(SRC_HOME)/core/cvfpu/src/fpnew_fma_multi.sv \
24+
$(SRC_HOME)/core/cvfpu/src/fpnew_noncomp.sv \
25+
$(SRC_HOME)/core/cvfpu/src/fpnew_opgroup_block.sv \
26+
$(SRC_HOME)/core/cvfpu/src/fpnew_opgroup_fmt_slice.sv \
27+
$(SRC_HOME)/core/cvfpu/src/fpnew_opgroup_multifmt_slice.sv \
28+
$(SRC_HOME)/core/cvfpu/src/fpnew_rounding.sv \
29+
$(SRC_HOME)/core/cvfpu/src/fpnew_top.sv \
730
$(sort $(wildcard $(SRC_HOME)/core/*.sv)) \
831
$(sort $(wildcard $(SRC_HOME)/core/pmp/src/*.sv)) \
32+
$(SRC_HOME)/core/cache_subsystem/hpdcache/rtl/src/hpdcache_pkg.sv \
33+
$(SRC_HOME)/core/cache_subsystem/hpdcache/rtl/src/hpdcache.sv \
34+
$(SRC_HOME)/core/cache_subsystem/hpdcache/rtl/src/hpdcache_amo.sv \
35+
$(SRC_HOME)/core/cache_subsystem/hpdcache/rtl/src/hpdcache_cmo.sv \
36+
$(SRC_HOME)/core/cache_subsystem/hpdcache/rtl/src/hpdcache_core_arbiter.sv \
37+
$(SRC_HOME)/core/cache_subsystem/hpdcache/rtl/src/hpdcache_ctrl.sv \
38+
$(SRC_HOME)/core/cache_subsystem/hpdcache/rtl/src/hpdcache_ctrl_pe.sv \
39+
$(SRC_HOME)/core/cache_subsystem/hpdcache/rtl/src/hpdcache_flush.sv \
40+
$(SRC_HOME)/core/cache_subsystem/hpdcache/rtl/src/hpdcache_memctrl.sv \
41+
$(SRC_HOME)/core/cache_subsystem/hpdcache/rtl/src/hpdcache_miss_handler.sv \
42+
$(SRC_HOME)/core/cache_subsystem/hpdcache/rtl/src/hpdcache_mshr.sv \
43+
$(SRC_HOME)/core/cache_subsystem/hpdcache/rtl/src/hpdcache_rtab.sv \
44+
$(SRC_HOME)/core/cache_subsystem/hpdcache/rtl/src/hpdcache_uncached.sv \
45+
$(SRC_HOME)/core/cache_subsystem/hpdcache/rtl/src/hpdcache_victim_plru.sv \
46+
$(SRC_HOME)/core/cache_subsystem/hpdcache/rtl/src/hpdcache_victim_random.sv \
47+
$(SRC_HOME)/core/cache_subsystem/hpdcache/rtl/src/hpdcache_victim_sel.sv \
48+
$(SRC_HOME)/core/cache_subsystem/hpdcache/rtl/src/hpdcache_wbuf.sv \
49+
$(SRC_HOME)/core/cache_subsystem/hpdcache/rtl/src/hwpf_stride/hwpf_stride_pkg.sv \
50+
$(SRC_HOME)/core/cache_subsystem/hpdcache/rtl/src/hwpf_stride/hwpf_stride.sv \
51+
$(SRC_HOME)/core/cache_subsystem/hpdcache/rtl/src/hwpf_stride/hwpf_stride_arb.sv \
52+
$(SRC_HOME)/core/cache_subsystem/hpdcache/rtl/src/hwpf_stride/hwpf_stride_wrapper.sv \
953
$(sort $(wildcard $(SRC_HOME)/core/cache_subsystem/*.sv)) \
1054
$(sort $(wildcard $(SRC_HOME)/core/cache_subsystem/hpdcache/rtl/src/common/*.sv)) \
1155
$(sort $(wildcard $(SRC_HOME)/core/cache_subsystem/hpdcache/rtl/src/common/macros/blackbox/*.sv)) \
12-
$(sort $(wildcard $(SRC_HOME)/core/cache_subsystem/hpdcache/rtl/src/*.sv)) \
13-
$(sort $(wildcard $(SRC_HOME)/core/cache_subsystem/hpdcache/rtl/src/hwpf_stride/*.sv)) \
1456
$(sort $(wildcard $(SRC_HOME)/core/cache_subsystem/hpdcache/rtl/src/utils/*.sv)) \
15-
$(sort $(wildcard $(SRC_HOME)/core/cache_subsystem/*.sv)) \
1657
$(sort $(wildcard $(SRC_HOME)/core/cva6_mmu/*.sv)) \
17-
$(sort $(wildcard $(SRC_HOME)/core/cvfpu/src/*.sv)) \
18-
$(sort $(wildcard $(SRC_HOME)/core/cvfpu/src/fpu_div_sqrt_mvp/hdl/*.sv)) \
58+
$(SRC_HOME)/core/cvfpu/src/fpu_div_sqrt_mvp/hdl/defs_div_sqrt_mvp.sv \
59+
$(SRC_HOME)/core/cvfpu/src/fpu_div_sqrt_mvp/hdl/control_mvp.sv \
60+
$(SRC_HOME)/core/cvfpu/src/fpu_div_sqrt_mvp/hdl/div_sqrt_top_mvp.sv \
61+
$(SRC_HOME)/core/cvfpu/src/fpu_div_sqrt_mvp/hdl/iteration_div_sqrt_mvp.sv \
62+
$(SRC_HOME)/core/cvfpu/src/fpu_div_sqrt_mvp/hdl/norm_div_sqrt_mvp.sv \
63+
$(SRC_HOME)/core/cvfpu/src/fpu_div_sqrt_mvp/hdl/nrbd_nrsc_mvp.sv \
64+
$(SRC_HOME)/core/cvfpu/src/fpu_div_sqrt_mvp/hdl/preprocess_mvp.sv \
1965
$(SRC_HOME)/core/cvxif_example/include/cvxif_instr_pkg.sv \
20-
$(sort $(wildcard $(SRC_HOME)/core/cvxif_example/*.sv)) \
2166
$(sort $(wildcard $(SRC_HOME)/core/frontend/*.sv)) \
22-
$(sort $(wildcard $(SRC_HOME)/core/include/*.sv)) \
23-
$(sort $(wildcard $(SRC_HOME)/vendor/pulp-platform/axi/src/*.sv)) \
24-
$(sort $(wildcard $(SRC_HOME)/vendor/pulp-platform/common_cells/src/*.sv)) \
2567
$(SRC_HOME)/vendor/pulp-platform/tech_cells_generic/src/rtl/tc_sram.sv \
26-
$(PLATFORM_DIR)/verilog/fakeram7_256x32.sv
68+
$(PLATFORM_DIR)/verilog/fakeram7_256x256.sv
2769

2870
export VERILOG_INCLUDE_DIRS = $(DESIGN_HOME)/src/$(DESIGN_NICKNAME)/core/include \
2971
$(DESIGN_HOME)/src/$(DESIGN_NICKNAME)/core/cvfpu/src/common_cells/include \
3072
$(DESIGN_HOME)/src/$(DESIGN_NICKNAME)/core/cache_subsystem/hpdcache/rtl/include
3173

3274
export VERILOG_DEFINES += -D HPDCACHE_ASSERT_OFF
3375

34-
export ADDITIONAL_LEFS = $(PLATFORM_DIR)/lef/fakeram7_256x32.lef
76+
export ADDITIONAL_LEFS = $(PLATFORM_DIR)/lef/fakeram7_256x256.lef
3577

36-
export ADDITIONAL_LIBS = $(PLATFORM_DIR)/lib/NLDM/fakeram7_256x32.lib
78+
export ADDITIONAL_LIBS = $(PLATFORM_DIR)/lib/NLDM/fakeram7_256x256.lib
3779

3880
export SDC_FILE = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NAME)/constraint.sdc
3981

40-
export DIE_AREA = 0 0 250 250
41-
export CORE_AREA = 1.08 1.08 240 240
42-
82+
export DIE_AREA = 0 0 350 350
83+
export CORE_AREA = 1.08 1.08 340 340
4384
export PLACE_DENSITY = 0.50
85+
export MACRO_HALO = 5 5
4486

4587
# a smoketest for this option, there are a
4688
# few last gasp iterations
4789
export SKIP_LAST_GASP ?= 1
4890

91+
ifeq ($(SYNTH_HIERARCHICAL),1)
92+
export SYNTH_MINIMUM_KEEP_SIZE ?= 40000
93+
endif
4994

5095
export SYNTH_HDL_FRONTEND = slang

‎flow/designs/asap7/cva6/rules-base.json‎

Lines changed: 11 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -1,39 +1,38 @@
11
{
22
"synth__design__instance__area__stdcell": {
3-
"value": 16477.72,
3+
"value": 40692.1,
44
"compare": "<="
55
},
66
"constraints__clocks__count": {
77
"value": 1,
88
"compare": "=="
99
},
1010
"placeopt__design__instance__area": {
11-
12-
"value": 19790,
11+
"value": 45043,
1312
"compare": "<="
1413
},
1514
"placeopt__design__instance__count__stdcell": {
16-
"value": 130789,
15+
"value": 164118,
1716
"compare": "<="
1817
},
1918
"detailedplace__design__violations": {
2019
"value": 0,
2120
"compare": "=="
2221
},
2322
"cts__design__instance__count__setup_buffer": {
24-
"value": 11373,
23+
"value": 14271,
2524
"compare": "<="
2625
},
2726
"cts__design__instance__count__hold_buffer": {
28-
"value": 11373,
27+
"value": 14271,
2928
"compare": "<="
3029
},
3130
"globalroute__antenna_diodes_count": {
3231
"value": 0,
3332
"compare": "<="
3433
},
3534
"detailedroute__route__wirelength": {
36-
"value": 1466793,
35+
"value": 1618999,
3736
"compare": "<="
3837
},
3938
"detailedroute__route__drc_errors": {
@@ -49,23 +48,23 @@
4948
"compare": "<="
5049
},
5150
"finish__timing__setup__ws": {
52-
"value": -176.32,
51+
"value": -216.36,
5352
"compare": ">="
5453
},
5554
"finish__design__instance__area": {
56-
"value": 20112,
55+
"value": 45315,
5756
"compare": "<="
5857
},
5958
"finish__timing__drv__setup_violation_count": {
60-
"value": 5686,
59+
"value": 7136,
6160
"compare": "<="
6261
},
6362
"finish__timing__drv__hold_violation_count": {
64-
"value": 100,
63+
"value": 105,
6564
"compare": "<="
6665
},
6766
"finish__timing__wns_percent_delay": {
68-
"value": -17.83,
67+
"value": -20.43,
6968
"compare": ">="
7069
}
7170
}

‎flow/designs/gf12/bp_single/fastroute.tcl‎

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -5,5 +5,3 @@ set_global_routing_layer_adjustment K1-K4 0.45
55

66
set_routing_layers -signal $::env(MIN_ROUTING_LAYER)-$::env(MAX_ROUTING_LAYER) -clock K1-$::env(MAX_ROUTING_LAYER)
77

8-
set_macro_extension 1
9-

‎flow/designs/gf12/ca53/fastroute.tcl‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4,4 +4,4 @@ set_global_routing_layer_adjustment C4-K4 0.5
44
#set_global_routing_layer_adjustment H1-H2 0.5
55

66
set_routing_layers -signal M2-$::env(MAX_ROUTING_LAYER) -clock K1-$::env(MAX_ROUTING_LAYER)
7-
set_macro_extension 2
7+

‎flow/designs/ihp-sg13g2/aes/rules-base.json‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -28,7 +28,7 @@
2828
"compare": "<="
2929
},
3030
"globalroute__antenna_diodes_count": {
31-
"value": 282,
31+
"value": 0,
3232
"compare": "<="
3333
},
3434
"detailedroute__route__wirelength": {
@@ -40,15 +40,15 @@
4040
"compare": "<="
4141
},
4242
"detailedroute__antenna__violating__nets": {
43-
"value": 38,
43+
"value": 0,
4444
"compare": "<="
4545
},
4646
"detailedroute__antenna_diodes_count": {
47-
"value": 5,
47+
"value": 24,
4848
"compare": "<="
4949
},
5050
"finish__timing__setup__ws": {
51-
"value": -0.28,
51+
"value": -0.13,
5252
"compare": ">="
5353
},
5454
"finish__design__instance__area": {

‎flow/designs/ihp-sg13g2/gcd/rules-base.json‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -52,7 +52,7 @@
5252
"compare": ">="
5353
},
5454
"finish__design__instance__area": {
55-
"value": 27357,
55+
"value": 27303,
5656
"compare": "<="
5757
},
5858
"finish__timing__drv__setup_violation_count": {

‎flow/designs/ihp-sg13g2/i2c-gpio-expander/rules-base.json‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -28,7 +28,7 @@
2828
"compare": "<="
2929
},
3030
"globalroute__antenna_diodes_count": {
31-
"value": 22,
31+
"value": 0,
3232
"compare": "<="
3333
},
3434
"detailedroute__route__wirelength": {
@@ -40,7 +40,7 @@
4040
"compare": "<="
4141
},
4242
"detailedroute__antenna__violating__nets": {
43-
"value": 1,
43+
"value": 0,
4444
"compare": "<="
4545
},
4646
"detailedroute__antenna_diodes_count": {
@@ -52,7 +52,7 @@
5252
"compare": ">="
5353
},
5454
"finish__design__instance__area": {
55-
"value": 44306,
55+
"value": 44275,
5656
"compare": "<="
5757
},
5858
"finish__timing__drv__setup_violation_count": {

‎flow/designs/ihp-sg13g2/ibex/rules-base.json‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -28,7 +28,7 @@
2828
"compare": "<="
2929
},
3030
"globalroute__antenna_diodes_count": {
31-
"value": 1178,
31+
"value": 12,
3232
"compare": "<="
3333
},
3434
"detailedroute__route__wirelength": {
@@ -40,11 +40,11 @@
4040
"compare": "<="
4141
},
4242
"detailedroute__antenna__violating__nets": {
43-
"value": 55,
43+
"value": 0,
4444
"compare": "<="
4545
},
4646
"detailedroute__antenna_diodes_count": {
47-
"value": 5,
47+
"value": 26,
4848
"compare": "<="
4949
},
5050
"finish__timing__setup__ws": {

‎flow/designs/ihp-sg13g2/jpeg/rules-base.json‎

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
{
22
"synth__design__instance__area__stdcell": {
3-
"value": 1512439.93,
3+
"value": 1507968.61,
44
"compare": "<="
55
},
66
"constraints__clocks__count": {
@@ -12,7 +12,7 @@
1212
"compare": "<="
1313
},
1414
"placeopt__design__instance__count__stdcell": {
15-
"value": 88060,
15+
"value": 87671,
1616
"compare": "<="
1717
},
1818
"detailedplace__design__violations": {
@@ -28,7 +28,7 @@
2828
"compare": "<="
2929
},
3030
"globalroute__antenna_diodes_count": {
31-
"value": 1714,
31+
"value": 27,
3232
"compare": "<="
3333
},
3434
"detailedroute__route__wirelength": {
@@ -40,31 +40,31 @@
4040
"compare": "<="
4141
},
4242
"detailedroute__antenna__violating__nets": {
43-
"value": 110,
43+
"value": 0,
4444
"compare": "<="
4545
},
4646
"detailedroute__antenna_diodes_count": {
47-
"value": 5,
47+
"value": 160,
4848
"compare": "<="
4949
},
5050
"finish__timing__setup__ws": {
51-
"value": -2.18,
51+
"value": 0.0,
5252
"compare": ">="
5353
},
5454
"finish__design__instance__area": {
55-
"value": 2610834,
55+
"value": 2605152,
5656
"compare": "<="
5757
},
5858
"finish__timing__drv__setup_violation_count": {
59-
"value": 3829,
59+
"value": 3812,
6060
"compare": "<="
6161
},
6262
"finish__timing__drv__hold_violation_count": {
6363
"value": 10,
6464
"compare": "<="
6565
},
6666
"finish__timing__wns_percent_delay": {
67-
"value": -30.54,
67+
"value": -10.0,
6868
"compare": ">="
6969
}
7070
}

‎flow/designs/ihp-sg13g2/riscv32i/rules-base.json‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -28,7 +28,7 @@
2828
"compare": "<="
2929
},
3030
"globalroute__antenna_diodes_count": {
31-
"value": 362,
31+
"value": 4,
3232
"compare": "<="
3333
},
3434
"detailedroute__route__wirelength": {
@@ -40,15 +40,15 @@
4040
"compare": "<="
4141
},
4242
"detailedroute__antenna__violating__nets": {
43-
"value": 20,
43+
"value": 0,
4444
"compare": "<="
4545
},
4646
"detailedroute__antenna_diodes_count": {
47-
"value": 5,
47+
"value": 33,
4848
"compare": "<="
4949
},
5050
"finish__timing__setup__ws": {
51-
"value": -0.65,
51+
"value": -0.4,
5252
"compare": ">="
5353
},
5454
"finish__design__instance__area": {
@@ -64,7 +64,7 @@
6464
"compare": "<="
6565
},
6666
"finish__timing__wns_percent_delay": {
67-
"value": -18.36,
67+
"value": -12.48,
6868
"compare": ">="
6969
}
7070
}

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