Skip to content

Commit f3fe294

Browse files
committed
asap7: fix ADDER_MAP_FILE default handling with ASAP7_USELVT and ASAP7_USESLVT
fixes #2990 Signed-off-by: Øyvind Harboe <[email protected]>
1 parent 4004072 commit f3fe294

File tree

1 file changed

+6
-1
lines changed

1 file changed

+6
-1
lines changed

flow/platforms/asap7/config.mk

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -80,7 +80,6 @@ export DONT_USE_CELLS += SDF* ICG*
8080
# Yosys mapping files
8181
export LATCH_MAP_FILE = $(PLATFORM_DIR)/yoSys/cells_latch_R.v
8282
export CLKGATE_MAP_FILE = $(PLATFORM_DIR)/yoSys/cells_clkgate_R.v
83-
export ADDER_MAP_FILE ?= $(PLATFORM_DIR)/yoSys/cells_adders_R.v
8483
export SYNTH_MINIMUM_KEEP_SIZE ?= 1000
8584

8685
export ABC_DRIVER_CELL = BUFx2_ASAP7_75t_R
@@ -153,6 +152,12 @@ export KLAYOUT_DRC_FILE = $(PLATFORM_DIR)/drc/asap7.lydrc
153152
# OpenRCX extRules
154153
export RCX_RULES = $(PLATFORM_DIR)/rcx_patterns.rules
155154

155+
ifeq ($(ASAP7_USELVT),)
156+
ifeq ($(ASAP7_USESLVT),)
157+
export ADDER_MAP_FILE ?= $(PLATFORM_DIR)/yoSys/cells_adders_R.v
158+
endif
159+
endif
160+
156161
# XS - defining function for using LVT
157162
ifeq ($(ASAP7_USELVT), 1)
158163
export TIEHI_CELL_AND_PORT = TIEHIx1_ASAP7_75t_L H

0 commit comments

Comments
 (0)