Merge pull request #1624 from The-OpenROAD-Project-staging/aes-mbff

Add asap7/aes-mbff test case

Author: maliberty

flow/designs/asap7/aes-mbff/config.mk

@@ -0,0 +1,18 @@
+export PLATFORM               = asap7
+
+export DESIGN_NAME            = aes_cipher_top
+export DESIGN_NICKNAME        = aes-mbff
+
+export VERILOG_FILES = $(sort $(wildcard ./designs/src/aes/*.v))
+export SDC_FILE      = ./designs/$(PLATFORM)/aes/constraint.sdc
+
+export ABC_AREA               = 1
+
+export CORE_UTILIZATION         = 40
+export CORE_ASPECT_RATIO        = 1
+export CORE_MARGIN              = 2
+export PLACE_DENSITY            = 0.65
+export TNS_END_PERCENT          = 100
+
+export CLUSTER_FLOPS            = 1
+export ENABLE_DPO               = 0

flow/designs/asap7/aes-mbff/constraint.sdc

@@ -0,0 +1,13 @@
+set clk_name  clk
+set clk_port_name clk
+set clk_period 400 
+set clk_io_pct 0.2
+
+set clk_port [get_ports $clk_port_name]
+
+create_clock -name $clk_name -period $clk_period $clk_port
+
+set non_clock_inputs [lsearch -inline -all -not -exact [all_inputs] $clk_port]
+
+set_input_delay  [expr $clk_period * $clk_io_pct] -clock $clk_name $non_clock_inputs 
+set_output_delay [expr $clk_period * $clk_io_pct] -clock $clk_name [all_outputs]

flow/designs/asap7/aes-mbff/metadata-base-ok.json

@@ -0,0 +1,58 @@
+{
+    "synth__design__instance__area__stdcell": {
+        "value": 2576.15,
+        "compare": "<="
+    },
+    "constraints__clocks__count": {
+        "value": 1,
+        "compare": "=="
+    },
+    "placeopt__design__instance__area": {
+        "value": 2869,
+        "compare": "<="
+    },
+    "placeopt__design__instance__count__stdcell": {
+        "value": 25144,
+        "compare": "<="
+    },
+    "detailedplace__design__violations": {
+        "value": 0,
+        "compare": "=="
+    },
+    "cts__design__instance__count__setup_buffer": {
+        "value": 3048,
+        "compare": "<="
+    },
+    "cts__design__instance__count__hold_buffer": {
+        "value": 2186,
+        "compare": "<="
+    },
+    "detailedroute__route__wirelength": {
+        "value": 126061,
+        "compare": "<="
+    },
+    "detailedroute__route__drc_errors": {
+        "value": 0,
+        "compare": "<="
+    },
+    "finish__timing__setup__ws": {
+        "value": -81.55,
+        "compare": ">="
+    },
+    "finish__design__instance__area": {
+        "value": 3287,
+        "compare": "<="
+    },
+    "finish__timing__drv__setup_violation_count": {
+        "value": 1093,
+        "compare": "<="
+    },
+    "finish__timing__drv__hold_violation_count": {
+        "value": 100,
+        "compare": "<="
+    },
+    "finish__timing__wns_percent_delay": {
+        "value": -16.45,
+        "compare": ">="
+    }
+}

flow/designs/asap7/aes-mbff/rules-base.json

@@ -42,12 +42,13 @@ export TC_DFF_LIB_FILE        = $(PLATFORM_DIR)/lib/asap7sc7p5t_SEQ_RVT_TT_nldm_
 ifdef CLUSTER_FLOPS
   # Add the multi-bit FF for clustering.  These are single corner libraries.
   export ADDITIONAL_LIBS     += $(PLATFORM_DIR)/lib/asap7sc7p5t_DFFHQNH2V2X_RVT_TT_nldm_FAKE.lib \
-                                $(PLATFORM_DIR)/lib/asap7sc7p5t_DFFHQNV2X_RVT_TT_nldm_FAKE.lib \
-                                $(PLATFORM_DIR)/lib/asap7sc7p5t_DFFHQNV4X_RVT_TT_nldm_FAKE.lib
+                                $(PLATFORM_DIR)/lib/asap7sc7p5t_DFFHQNV2X_RVT_TT_nldm_FAKE.lib
+#                               $(PLATFORM_DIR)/lib/asap7sc7p5t_DFFHQNV4X_RVT_TT_nldm_FAKE.lib
 
   export ADDITIONAL_LEFS     += $(PLATFORM_DIR)/lef/asap7sc7p5t_DFFHQNH2V2X.lef \
-                                $(PLATFORM_DIR)/lef/asap7sc7p5t_DFFHQNV2X.lef \
-                                $(PLATFORM_DIR)/lef/asap7sc7p5t_DFFHQNV4X.lef
+                                $(PLATFORM_DIR)/lef/asap7sc7p5t_DFFHQNV2X.lef
+#                               $(PLATFORM_DIR)/lef/asap7sc7p5t_DFFHQNV4X.lef
+  export PLACE_SITE          += asap7sc7p5t_pg
 endif
 
 
@@ -85,7 +86,7 @@ export MIN_BUF_CELL_AND_PORTS  = BUFx2_ASAP7_75t_R A Y
 
 # Placement site for core cells
 # This can be found in the technology lef
-export PLACE_SITE              = asap7sc7p5t
+export PLACE_SITE              += asap7sc7p5t
 
 export MAKE_TRACKS             = $(PLATFORM_DIR)/openRoad/make_tracks.tcl
 

flow/platforms/asap7/config.mk

@@ -43,14 +43,14 @@ if {[info exists ::env(FLOORPLAN_DEF)]} {
   initialize_floorplan -utilization $::env(CORE_UTILIZATION) \
                        -aspect_ratio $aspect_ratio \
                        -core_space $core_margin \
-                       -site $::env(PLACE_SITE)
+                       -sites $::env(PLACE_SITE)
 
 # Initialize floorplan using DIE_AREA/CORE_AREA
 # ----------------------------------------------------------------------------
 } else {
   initialize_floorplan -die_area $::env(DIE_AREA) \
                        -core_area $::env(CORE_AREA) \
-                       -site $::env(PLACE_SITE)
+                       -sites $::env(PLACE_SITE)
 }
 
 if { [info exists ::env(MAKE_TRACKS)] } {

flow/scripts/floorplan.tcl

@@ -52,6 +52,7 @@ pipeline {
             name 'TEST_SLUG';
             values "docker build",
                    "aes asap7",
+                   "aes-mbff asap7",
                    "aes_lvt asap7",
                    "ethmac asap7",
                    "ethmac_lvt asap7",

jenkins/public_nightly.Jenkinsfile

@@ -30,6 +30,7 @@ pipeline {
             name 'TEST_SLUG';
             values "docker build",
                    "aes asap7",
+                   "aes-mbff asap7",
                    "aes_lvt asap7",
                    "ethmac asap7",
                    "ethmac_lvt asap7",

jenkins/public_tests_all.Jenkinsfile

@@ -30,6 +30,7 @@ pipeline {
             name 'TEST_SLUG';
             values "docker build",
                    "aes asap7",
+                   "aes-mbff asap7",
                    "aes_lvt asap7",
                    "ethmac asap7",
                    "ethmac_lvt asap7",