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Merge pull request #7803 from The-OpenROAD-Project-staging/rsz-fix-check-driver-arc-slew
rsz: Fix driver slew repair after sta change
2 parents a8caafb + 82f06e6 commit 10d49c9

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2 files changed

+13
-21
lines changed

2 files changed

+13
-21
lines changed

src/rsz/src/RepairDesign.cc

Lines changed: 13 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -18,6 +18,7 @@
1818
#include "ResizerObserver.hh"
1919
#include "db_sta/dbNetwork.hh"
2020
#include "rsz/Resizer.hh"
21+
#include "sta/ClkNetwork.hh"
2122
#include "sta/Corner.hh"
2223
#include "sta/Fuzzy.hh"
2324
#include "sta/Graph.hh"
@@ -732,7 +733,6 @@ bool RepairDesign::performGainBuffering(Net* net,
732733

733734
void RepairDesign::checkDriverArcSlew(const Corner* corner,
734735
const Instance* inst,
735-
const Edge* edge,
736736
const TimingArc* arc,
737737
float load_cap,
738738
float limit,
@@ -744,11 +744,15 @@ void RepairDesign::checkDriverArcSlew(const Corner* corner,
744744
Pin* in_pin = network_->findPin(inst, arc->from()->name());
745745

746746
if (model && in_pin) {
747-
Vertex* vertex = graph_->pinLoadVertex(in_pin);
748-
// edgeFromSlew returns the graph slew value for the pin, or the ideal
749-
// clock slew if applicable
747+
const bool use_ideal_clk_slew
748+
= arc->set()->role()->genericRole() == TimingRole::regClkToQ()
749+
&& clk_network_->isIdealClock(in_pin);
750750
Slew in_slew
751-
= graph_delay_calc_->edgeFromSlew(vertex, in_rf, edge, dcalc_ap);
751+
= use_ideal_clk_slew
752+
? clk_network_->idealClkSlew(
753+
in_pin, in_rf, dcalc_ap->slewMinMax())
754+
: graph_->slew(
755+
graph_->pinLoadVertex(in_pin), in_rf, dcalc_ap->index());
752756
const Pvt* pvt = dcalc_ap->operatingConditions();
753757

754758
ArcDelay arc_delay;
@@ -791,26 +795,15 @@ bool RepairDesign::repairDriverSlew(const Corner* corner, const Pin* drvr_pin)
791795

792796
if (limit_exists) {
793797
float limit_w_margin = maxSlewMargined(limit);
794-
795-
VertexInEdgeIterator edge_iter(graph_->pinDrvrVertex(drvr_pin),
796-
graph_);
797-
while (edge_iter.hasNext()) {
798-
Edge* edge = edge_iter.next();
799-
TimingArcSet* arc_set = edge->timingArcSet();
798+
for (TimingArcSet* arc_set : size_cell->timingArcSets()) {
800799
const TimingRole* role = arc_set->role();
801800
if (!role->isTimingCheck() && role != TimingRole::tristateDisable()
802801
&& role != TimingRole::tristateEnable()
803802
&& role != TimingRole::clockTreePathMin()
804803
&& role != TimingRole::clockTreePathMax()) {
805-
TimingArcSet* size_arc_set = size_cell->findTimingArcSet(arc_set);
806-
for (TimingArc* arc : size_arc_set->arcs()) {
807-
checkDriverArcSlew(corner,
808-
inst,
809-
edge,
810-
arc,
811-
load_cap,
812-
limit_w_margin,
813-
violation);
804+
for (TimingArc* arc : arc_set->arcs()) {
805+
checkDriverArcSlew(
806+
corner, inst, arc, load_cap, limit_w_margin, violation);
814807
}
815808
}
816809
}

src/rsz/src/RepairDesign.hh

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -93,7 +93,6 @@ class RepairDesign : dbStaState
9393

9494
void checkDriverArcSlew(const Corner* corner,
9595
const Instance* inst,
96-
const Edge* edge,
9796
const TimingArc* arc,
9897
float load_cap,
9998
float limit,

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