Merge branch 'master' into rsz-improved-slew-fixing

Author: maliberty

.gemini/config.yaml

@@ -0,0 +1,8 @@
+memory_config:
+  disabled: false
+code_review:
+  pull_request_opened:
+    help: false
+    summary: false
+    code_review: true
+    include_drafts: true

MODULE.bazel

@@ -146,7 +146,7 @@ bazel_dep(name = "bazel-orfs")
 # To bump version, run: bazelisk run @bazel-orfs//:bump
 git_override(
     module_name = "bazel-orfs",
-    commit = "287262398210ecc368e8cee1fbefddb02ac2e2f3",
+    commit = "1e862b169d97dc0fec5db106559640886e7fd7d0",
     remote = "https://github.com/The-OpenROAD-Project/bazel-orfs.git",
 )
 
@@ -155,10 +155,10 @@ orfs = use_extension("@bazel-orfs//:extension.bzl", "orfs_repositories")
 # To bump version, run: bazelisk run @bazel-orfs//:bump
 orfs.default(
     # Official image https://hub.docker.com/r/openroad/orfs/tags
-    image = "docker.io/openroad/orfs:v3.0-4350-g4e47ad013",
+    image = "docker.io/openroad/orfs:v3.0-4367-g79b6a48ab",
     # Use OpenROAD of this repo instead of from the docker image
     openroad = "//:openroad",
-    sha256 = "2e09979b7ab7f8e797b50ad8baec1e26d66205ea5bd6ec1b4ddfc7b4e924eb2b",
+    sha256 = "0d0dd3d8d346360a71f6325ce776a984c5a6296fc6e51956b53f136e1dd13462",
 )
 use_repo(orfs, "com_github_nixos_patchelf_download")
 use_repo(orfs, "docker_orfs")

MODULE.bazel.lock

@@ -496,6 +496,7 @@ void OpenRoad::read3Dbx(const std::string& filename)
   odb::ThreeDBlox parser(logger_, db_, sta_);
   parser.readDbx(filename);
   parser.check();
+  db_->triggerPostRead3Dbx(db_->getChip());
 }
 
 void OpenRoad::read3DBloxBMap(const std::string& filename)

src/OpenRoad.cc

@@ -320,9 +320,14 @@ proc cpu_count { } {
   return [ord::cpu_count]
 }
 
-sta::define_cmd_args "global_connect" {}
-proc global_connect { } {
-  [ord::get_db_block] globalConnect
+sta::define_cmd_args "global_connect" { [-force] [-verbose] }
+proc global_connect { args } {
+  sta::parse_key_args "global_connect" args \
+    keys {} \
+    flags {-force -verbose}
+
+  sta::check_argc_eq0 "add_global_connection" $args
+  [ord::get_db_block] globalConnect [info exists flags(-force)] [info exists flags(-verbose)]
 }
 
 sta::define_cmd_args "clear_global_connect" {}

src/OpenRoad.tcl

@@ -263,9 +263,16 @@ add_global_connection -net VSS -pin_pattern {^VSSE$}
 The `global_connect` command is used to connect power and ground pins on design instances to the appropriate supplies.
 
 ```
-global_connect
+global_connect [-force] [-verbose]
 ```
 
+##### Options
+
+| Switch Name | Description |
+| ----- | ----- |
+| `-force` | If specified, global connections will overwrite existing connections |
+| `-verbose` | If specified, report the number of connections made and skipped. |
+
 #### Clear global connection rules
 
 The `clear_global_connect` command is used remove all defined global connection rules.

src/README.md

@@ -950,7 +950,7 @@ std::vector<TechChar::SolutionData> TechChar::createPatterns(
   odb::dbNet* net = nullptr;
   // clang-format off
   debugPrint(logger_, CTS, "tech char", 1, "*createPatterns for #nodes = {}"
-             " #topologies = {}", setupWirelength, numberOfNodes, numberOfTopologies);
+             " #topologies = {}", numberOfNodes, numberOfTopologies);
   // clang-format on
   // For each possible topology...
   for (unsigned solutionCounterInt = 0; solutionCounterInt < numberOfTopologies;
@@ -1051,9 +1051,6 @@ std::vector<TechChar::SolutionData> TechChar::createPatterns(
     tmp << "OUT";
     debugPrint(logger_, CTS, "tech char", 1, tmp.str());
     topology.outPort = outPortPin;
-    if (isPureWire) {
-      topology.instVector.push_back(nullptr);
-    }
     topology.isPureWire = isPureWire;
     topology.netVector.push_back(net);
     topology.nodesWithoutBufVector.push_back(nodesWithoutBuf);
@@ -1478,6 +1475,7 @@ std::vector<TechChar::ResultData> TechChar::characterizationPostProcess()
   unsigned maxResultCapacitance = 0;
   unsigned minResultSlew = std::numeric_limits<unsigned>::max();
   unsigned maxResultSlew = 0;
+
   std::vector<ResultData> convertedSolutions;
   for (ResultData solution : selectedSolutions) {
     if (solution.pinSlew <= options_->getMaxCharSlew()) {
@@ -1530,6 +1528,7 @@ std::vector<TechChar::ResultData> TechChar::characterizationPostProcess()
       convertedSolutions.push_back(convertedResult);
     }
   }
+
   // Sets the min and max values and returns the result vector.
   minSlew_ = minResultSlew;
   maxSlew_ = maxResultSlew;
@@ -1631,10 +1630,10 @@ void TechChar::create()
                  masterNames_.size(), solution.instVector.size());
       // clang-format on
       // For each possible buffer combination (different sizes).
-      unsigned buffersUpdate
+      unsigned buffersCombinations
           = getBufferingCombo(masterNames_.size(), solution.instVector.size());
 
-      if (buffersUpdate == 0) {
+      if (buffersCombinations == 0) {
         continue;
       }
 
@@ -1697,12 +1696,13 @@ void TechChar::create()
           }
         }
         // If the solution is not a pure-wire, update the buffer topologies.
-        if (!solution.isPureWire) {
+        if (!solution.isPureWire && buffersCombinations > 1) {
           updateBufferTopologies(solution);
         }
-        // For pure-wire solution buffersUpdate == 1, so it only runs once.
-        buffersUpdate--;
-      } while (buffersUpdate != 0);
+        // For pure-wire solution buffersCombinations == 1, so it only runs
+        // once.
+        buffersCombinations--;
+      } while (buffersCombinations != 0);
     }
     openStaChar_.reset(nullptr);
   }

src/cts/src/TechChar.cpp

@@ -415,7 +415,7 @@ DbInstanceNetIterator::DbInstanceNetIterator(const Instance* instance,
 
       // Keep track of flat nets that are already represented by a mod_net
       // to avoid returning both.
-      std::set<dbNet*> handled_flat_nets;
+      std::unordered_set<dbNet*> handled_flat_nets;
       for (dbModNet* mod_net : mod_nets) {
         dbNet* flat_net = network_->findRelatedDbNet(mod_net);
         if (flat_net) {
@@ -425,7 +425,7 @@ DbInstanceNetIterator::DbInstanceNetIterator(const Instance* instance,
 
       // Collect dbNets from children dbInsts' pins that are not already
       // handled.
-      std::set<dbNet*> flat_nets_set;
+      std::unordered_set<dbNet*> flat_nets_set;
       for (dbInst* child_inst : module->getInsts()) {
         for (dbITerm* iterm : child_inst->getITerms()) {
           dbNet* flat_net = iterm->getNet();
@@ -447,6 +447,9 @@ DbInstanceNetIterator::DbInstanceNetIterator(const Instance* instance,
         }
       }
       flat_nets_vec_.assign(flat_nets_set.begin(), flat_nets_set.end());
+      // Sort these nets so their order is determinisitc
+      std::ranges::sort(
+          flat_nets_vec_, {}, [](auto const* net1) { return net1->getId(); });
     }
   } else {
     //

src/dbSta/src/dbNetwork.cc

@@ -572,13 +572,14 @@ void TritonRoute::initDesign()
       || db_->getChip()->getBlock() == nullptr) {
     logger_->error(utl::DRT, 151, "Database, chip or block not initialized.");
   }
+  const bool design_exists = getDesign()->getTopBlock() != nullptr;
   io::Parser parser(db_, getDesign(), logger_, router_cfg_.get());
-  if (getDesign()->getTopBlock() != nullptr) {
+  if (design_exists) {
     parser.updateDesign();
-    return;
+  } else {
+    parser.readTechAndLibs(db_);
+    parser.readDesign(db_);
   }
-  parser.readTechAndLibs(db_);
-  parser.readDesign(db_);
   auto tech = getDesign()->getTech();
 
   if (!router_cfg_->VIAINPIN_BOTTOMLAYER_NAME.empty()) {
@@ -628,9 +629,11 @@ void TritonRoute::initDesign()
                     router_cfg_->REPAIR_PDN_LAYER_NAME);
     }
   }
-  parser.postProcess();
-  db_callback_->addOwner(db_->getChip()->getBlock());
-  initGraphics();
+  if (!design_exists) {
+    parser.postProcess();
+    db_callback_->addOwner(db_->getChip()->getBlock());
+    initGraphics();
+  }
 }
 
 void TritonRoute::initGraphics()
@@ -1277,7 +1280,7 @@ void TritonRoute::setUnidirectionalLayer(const std::string& layerName)
                    "Non-routing layer {} can't be set unidirectional",
                    layerName);
   }
-  design_->getTech()->setUnidirectionalLayer(dbLayer);
+  router_cfg_->unidirectional_layers_.insert(dbLayer);
 }
 
 void TritonRoute::setParams(const ParamStruct& params)

src/drt/src/TritonRoute.cpp

@@ -59,10 +59,6 @@ class frTechObject
   {
     return viaRuleGenerates_;
   }
-  bool hasUnidirectionalLayer(odb::dbTechLayer* dbLayer) const
-  {
-    return unidirectional_layers_.find(dbLayer) != unidirectional_layers_.end();
-  }
   bool hasMaxSpacingConstraints() const
   {
     for (const auto& layer : layers_) {
@@ -126,10 +122,6 @@ class frTechObject
     }
     return nullptr;
   }
-  void setUnidirectionalLayer(odb::dbTechLayer* dbLayer)
-  {
-    unidirectional_layers_.insert(dbLayer);
-  }
 
   // forbidden length table related
   bool isVia2ViaForbiddenLen(int tableLayerIdx,
@@ -406,8 +398,6 @@ class frTechObject
   ByLayer<std::array<bool, 4>> viaForbiddenThrough_;
   bool hasVia2viaMinStep_ = false;
   bool hasCornerSpacingConstraint_ = false;
-  // unidirectional layers
-  std::set<odb::dbTechLayer*> unidirectional_layers_;
 
   friend class FlexRP;
 };