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Merge pull request #8350 from antmicro/cgt-cleanup
cgt: cut: Cleanup/lint fixes
2 parents c85af5f + e39cc59 commit 1f974c3

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9 files changed

+28
-38
lines changed

9 files changed

+28
-38
lines changed

src/cgt/include/cgt/ClockGating.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -143,8 +143,8 @@ class ClockGating
143143
// Helper for inserting new instances/nets into a network.
144144
NetworkBuilder network_builder_;
145145

146-
Logger* logger_;
147-
sta::dbSta* sta_;
146+
Logger* logger_ = nullptr;
147+
sta::dbSta* sta_ = nullptr;
148148
std::unique_ptr<cut::AbcLibraryFactory> abc_factory_;
149149
std::unique_ptr<cut::AbcLibrary> abc_library_;
150150
};

src/cgt/src/ClockGating.cpp

Lines changed: 7 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -375,13 +375,6 @@ void ClockGating::run()
375375
abc_factory_->AddDbSta(sta_);
376376
abc_library_ = std::make_unique<cut::AbcLibrary>(abc_factory_->Build());
377377

378-
abc::Abc_SclInstallGenlib(abc_library_->abc_library(),
379-
/*Slew=*/0,
380-
/*Gain=*/0,
381-
/*fUseAll=*/0,
382-
/*nGatesMin=*/0);
383-
abc::Mio_LibraryTransferCellIds();
384-
385378
dump("pre");
386379

387380
std::vector<sta::Instance*> instances;
@@ -519,7 +512,7 @@ void ClockGating::run()
519512
continue;
520513
}
521514

522-
correct_conds = gate_cond_cover;
515+
correct_conds = std::move(gate_cond_cover);
523516
searchClockGates(instance,
524517
correct_conds,
525518
correct_conds.begin(),
@@ -664,10 +657,11 @@ void ClockGating::searchClockGates(sta::Instance* const instance,
664657
abc::Abc_Ntk_t& abc_network,
665658
const bool clk_enable)
666659
{
667-
if (end - begin < 2) {
660+
size_t half_len = (end - begin) / 2;
661+
if (half_len == 0) {
668662
return;
669663
}
670-
auto mid = begin + (end - begin) / 2;
664+
auto mid = begin + half_len;
671665
auto combined_candidate_names
672666
= combinedGatingCondNames(sta_->getDbNetwork(), mid, end, clk_enable);
673667
debugPrint(
@@ -691,6 +685,7 @@ void ClockGating::searchClockGates(sta::Instance* const instance,
691685
"Clock gating signals: '{}' can be dropped",
692686
combined_candidate_names);
693687
good_gate_conds.erase(mid, end);
688+
mid = begin + half_len;
694689
} else if (end - mid > 1) {
695690
debugPrint(logger_,
696691
CGT,
@@ -832,6 +827,8 @@ static abc::Abc_Obj_t* regDataFunctionToAbc(sta::dbNetwork* const network,
832827
case sta::FuncExpr::op_or:
833828
case sta::FuncExpr::op_xor:
834829
expr_stack.push_back(expr->right());
830+
expr_stack.push_back(expr->left());
831+
break;
835832
case sta::FuncExpr::op_not:
836833
expr_stack.push_back(expr->left());
837834
break;

src/cgt/test/aes_nangate45.ok

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3,8 +3,6 @@
33
[WARNING CUT-0021] Leakage power doesn't exist for cell LOGIC0_X1
44
[WARNING CUT-0021] Leakage power doesn't exist for cell LOGIC1_X1
55
Derived GENLIB library "NangateOpenCellLibrary" with 92 gates.
6-
Warning: Detected 2 multi-output gates (for example, "FA_X1").
7-
SC library cannot be found.
86
[INFO CGT-0003] Clock gating instance 0/562
97
[INFO CGT-0004] Accepted clock enable '_13148_ | _04712_ | _04712_ | _00499_ | _05106_ | _05208_' for instance dcnt\[0\]$_SDFFE_PN0P_
108
[INFO CGT-0004] Accepted clock enable '_13151_ | _11055_ | _07150_ | _09231_ | _11144_ | _05152_ | _07152_ | _04670_' for instance ld_r$_DFF_P_

src/cgt/test/countdown_asap7.ok

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -11,8 +11,6 @@
1111
[INFO ODB-0227] LEF file: asap7/asap7_tech_1x_201209.lef, created 30 layers, 9 vias
1212
[INFO ODB-0227] LEF file: asap7/asap7sc7p5t_28_R_1x_220121a.lef, created 212 library cells
1313
Derived GENLIB library "asap7sc7p5t_AO_RVT_FF_nldm_211120" with 169 gates.
14-
Warning: Detected 2 multi-output gates (for example, "FAx1_ASAP7_75t_R").
15-
SC library cannot be found.
1614
[INFO CGT-0003] Clock gating instance 0/3
1715
[INFO CGT-0004] Accepted clock enable '_05_ | _02_ | _01_ | _10_ | _03_' for instance val\[0\]$_DFF_PP1_
1816
No differences found.

src/cgt/test/ibex_sky130hd.ok

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,6 @@
11
[INFO ODB-0227] LEF file: sky130hd/sky130hd.tlef, created 13 layers, 25 vias
22
[INFO ODB-0227] LEF file: sky130hd/sky130hd_std_cell.lef, created 437 library cells
33
Derived GENLIB library "sky130_fd_sc_hd__ss_n40C_1v40" with 317 gates.
4-
Warning: Detected 9 multi-output gates (for example, "sky130_fd_sc_hd__fa_1").
5-
SC library cannot be found.
64
[INFO CGT-0003] Clock gating instance 0/946
75
[INFO CGT-0004] Accepted clock enable 'ex_block_i.gen_multdiv_fast.multdiv_i.md_state_q\[5\] | _03749_ | _03000_ | _04094_ | _03636_ | _04093_' for instance _20290_
86
[INFO CGT-0004] Accepted clock enable 'cs_registers_i.mcountinhibit_q\[0\] | _05037_ | _04531_ | _04533_ | _04495_ | _04405_ | _05854_ | _04404_' for instance cs_registers_i.mcountinhibit_q\[0\]$_DFFE_PN0P_

src/cut/include/cut/logic_cut.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -18,9 +18,9 @@ namespace cut {
1818
class LogicCut
1919
{
2020
public:
21-
LogicCut(std::vector<sta::Net*>& primary_inputs,
22-
std::vector<sta::Net*>& primary_outputs,
23-
sta::InstanceSet& cut_instances)
21+
LogicCut(std::vector<sta::Net*>&& primary_inputs,
22+
std::vector<sta::Net*>&& primary_outputs,
23+
sta::InstanceSet&& cut_instances)
2424
: primary_inputs_(std::move(primary_inputs)),
2525
primary_outputs_(std::move(primary_outputs)),
2626
cut_instances_(std::move(cut_instances))

src/cut/src/blif.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -534,7 +534,7 @@ bool Blif::readBlif(const char* file_name, odb::dbBlock* block)
534534
auto port_ = network_->libertyPort(pin_);
535535
if (port_->isClock()) {
536536
mtermName = mTerm->getName();
537-
netName = connection;
537+
netName = std::move(connection);
538538
break;
539539
}
540540
}

src/cut/src/logic_extractor.cpp

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -385,7 +385,9 @@ LogicCut LogicExtractorFactory::BuildLogicCut(AbcLibrary& abc_network)
385385
std::vector<sta::Net*> primary_output_nets
386386
= ConvertIoPinsToNets(filtered_primary_outputs);
387387

388-
return LogicCut(primary_input_nets, primary_output_nets, cut_instances);
388+
return LogicCut(std::move(primary_input_nets),
389+
std::move(primary_output_nets),
390+
std::move(cut_instances));
389391
}
390392

391393
} // namespace cut

src/cut/test/cpp/TestAbc.cc

Lines changed: 12 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -75,7 +75,7 @@ class AbcTest : public ::testing::Test
7575
sta_ = std::unique_ptr<sta::dbSta>(sta::makeDbSta());
7676
sta_->initVars(Tcl_CreateInterp(), db_.get(), &logger_);
7777
auto path = std::filesystem::canonical("./Nangate45/Nangate45_typ.lib");
78-
library_ = sta_->readLiberty(path.string().c_str(),
78+
library_ = sta_->readLiberty(path.c_str(),
7979
sta_->findCorner("default"),
8080
/*min_max=*/sta::MinMaxAll::all(),
8181
/*infer_latches=*/false);
@@ -87,10 +87,9 @@ class AbcTest : public ::testing::Test
8787
= std::filesystem::canonical("./Nangate45/Nangate45_tech.lef");
8888
auto stdcell_lef
8989
= std::filesystem::canonical("./Nangate45/Nangate45_stdcell.lef");
90-
odb::dbTech* tech
91-
= lef_reader.createTech("nangate45", tech_lef.string().c_str());
90+
odb::dbTech* tech = lef_reader.createTech("nangate45", tech_lef.c_str());
9291
odb::dbLib* lib
93-
= lef_reader.createLib(tech, "nangate45", stdcell_lef.string().c_str());
92+
= lef_reader.createLib(tech, "nangate45", stdcell_lef.c_str());
9493

9594
sta_->postReadLef(/*tech=*/nullptr, lib);
9695

@@ -174,7 +173,7 @@ class AbcTestSky130 : public AbcTest
174173
sta_->initVars(Tcl_CreateInterp(), db_.get(), &logger_);
175174
auto path = std::filesystem::canonical(
176175
"./sky130/sky130_fd_sc_hd__ss_n40C_1v40.lib");
177-
library_ = sta_->readLiberty(path.string().c_str(),
176+
library_ = sta_->readLiberty(path.c_str(),
178177
sta_->findCorner("default"),
179178
/*min_max=*/sta::MinMaxAll::all(),
180179
/*infer_latches=*/false);
@@ -185,10 +184,8 @@ class AbcTestSky130 : public AbcTest
185184
auto tech_lef = std::filesystem::canonical("./sky130/sky130hd.tlef");
186185
auto stdcell_lef
187186
= std::filesystem::canonical("./sky130/sky130hd_std_cell.lef");
188-
odb::dbTech* tech
189-
= lef_reader.createTech("sky130", tech_lef.string().c_str());
190-
odb::dbLib* lib
191-
= lef_reader.createLib(tech, "sky130", stdcell_lef.string().c_str());
187+
odb::dbTech* tech = lef_reader.createTech("sky130", tech_lef.c_str());
188+
odb::dbLib* lib = lef_reader.createLib(tech, "sky130", stdcell_lef.c_str());
192189

193190
sta_->postReadLef(/*tech=*/nullptr, lib);
194191

@@ -220,7 +217,7 @@ class AbcTestAsap7 : public AbcTest
220217

221218
for (const std::string& liberty_path : liberty_paths) {
222219
auto path = std::filesystem::canonical(liberty_path);
223-
library_ = sta_->readLiberty(path.string().c_str(),
220+
library_ = sta_->readLiberty(path.c_str(),
224221
sta_->findCorner("default"),
225222
/*min_max=*/sta::MinMaxAll::all(),
226223
/*infer_latches=*/false);
@@ -233,10 +230,8 @@ class AbcTestAsap7 : public AbcTest
233230
= std::filesystem::canonical("./asap7/asap7_tech_1x_201209.lef");
234231
auto stdcell_lef
235232
= std::filesystem::canonical("./asap7/asap7sc7p5t_28_R_1x_220121a.lef");
236-
odb::dbTech* tech
237-
= lef_reader.createTech("asap7", tech_lef.string().c_str());
238-
odb::dbLib* lib
239-
= lef_reader.createLib(tech, "asap7", stdcell_lef.string().c_str());
233+
odb::dbTech* tech = lef_reader.createTech("asap7", tech_lef.c_str());
234+
odb::dbLib* lib = lef_reader.createLib(tech, "asap7", stdcell_lef.c_str());
240235

241236
sta_->postReadLef(/*tech=*/nullptr, lib);
242237

@@ -667,7 +662,9 @@ TEST_F(AbcTestSky130, EnsureThatSky130MultiOutputConstCellsAreMapped)
667662
std::vector<sta::Net*> primary_outputs = {flop_net};
668663
sta::InstanceSet cut_instances(network);
669664
cut_instances.insert(flop_input_instance);
670-
LogicCut cut(primary_inputs, primary_outputs, cut_instances);
665+
LogicCut cut(std::move(primary_inputs),
666+
std::move(primary_outputs),
667+
std::move(cut_instances));
671668

672669
// Create abc network that matches the underlying LogicCut
673670
utl::UniquePtrWithDeleter<abc::Abc_Ntk_t> abc_network(

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