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1- remove child and tech from readDef API
2- move dbTech from dbBlock to dbChip. 3- Update dbChip and dbBlock creation APIs. 4- Update Tcl scripts and tests to reflect these changes. Signed-off-by: osamahammad21 <[email protected]>
1 parent 288052e commit 21cfad6

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51 files changed

+167
-298
lines changed

include/ord/Design.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -126,8 +126,7 @@ class Design
126126
void readDef(const std::string& file_name,
127127
bool continue_on_errors = false,
128128
bool floorplan_init = false,
129-
bool incremental = false,
130-
bool child = false);
129+
bool incremental = false);
131130
void link(const std::string& design_name);
132131

133132
void readDb(std::istream& stream);

include/ord/OpenRoad.hh

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -186,12 +186,10 @@ class OpenRoad
186186
bool make_library);
187187

188188
void readDef(const char* filename,
189-
odb::dbTech* tech,
190189
odb::dbChip* chip,
191190
bool continue_on_errors,
192191
bool floorplan_init,
193-
bool incremental,
194-
bool child);
192+
bool incremental);
195193

196194
void writeLef(const char* filename);
197195

src/Design.cc

Lines changed: 4 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -54,8 +54,7 @@ void Design::readVerilog(const std::string& file_name)
5454
void Design::readDef(const std::string& file_name,
5555
bool continue_on_errors, // = false
5656
bool floorplan_init, // = false
57-
bool incremental, // = false
58-
bool child // = false
57+
bool incremental // = false
5958
)
6059
{
6160
if (floorplan_init && incremental) {
@@ -69,15 +68,10 @@ void Design::readDef(const std::string& file_name,
6968
}
7069
auto chip = tech_->getDB()->getChip();
7170
if (chip == nullptr) {
72-
chip = odb::dbChip::create(tech_->getDB());
71+
chip = odb::dbChip::create(tech_->getDB(), tech_->getDB()->getTech());
7372
}
74-
getOpenRoad()->readDef(file_name.c_str(),
75-
tech_->getDB()->getTech(),
76-
chip,
77-
continue_on_errors,
78-
floorplan_init,
79-
incremental,
80-
child);
73+
getOpenRoad()->readDef(
74+
file_name.c_str(), chip, continue_on_errors, floorplan_init, incremental);
8175
}
8276

8377
void Design::link(const std::string& design_name)

src/OpenRoad.cc

Lines changed: 3 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -325,14 +325,12 @@ void OpenRoad::readLef(const char* filename,
325325
}
326326

327327
void OpenRoad::readDef(const char* filename,
328-
dbTech* tech,
329328
dbChip* chip,
330329
bool continue_on_errors,
331330
bool floorplan_init,
332-
bool incremental,
333-
bool child)
331+
bool incremental)
334332
{
335-
if (!floorplan_init && !incremental && !child && chip && chip->getBlock()) {
333+
if (!floorplan_init && !incremental && chip && chip->getBlock()) {
336334
logger_->info(ORD, 48, "Loading an additional DEF.");
337335
}
338336

@@ -350,12 +348,7 @@ void OpenRoad::readDef(const char* filename,
350348
if (continue_on_errors) {
351349
def_reader.continueOnErrors();
352350
}
353-
if (child) {
354-
auto parent = db_->getChip()->getBlock();
355-
def_reader.createBlock(parent, search_libs, filename, tech);
356-
} else {
357-
def_reader.readChip(search_libs, filename, tech, chip);
358-
}
351+
def_reader.readChip(search_libs, filename, chip);
359352
}
360353

361354
static odb::defout::Version stringToDefVersion(const string& version)

src/OpenRoad.i

Lines changed: 2 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -304,27 +304,15 @@ read_lef_cmd(const char *filename,
304304

305305
void
306306
read_def_cmd(const char *filename,
307-
const char* tech_name,
308307
bool continue_on_errors,
309308
bool floorplan_init,
310309
bool incremental,
311-
bool child,
312310
odb::dbChip* chip)
313311
{
314312
OpenRoad *ord = getOpenRoad();
315313
auto* db = ord->getDb();
316-
dbTech* tech;
317-
if (tech_name[0] != '\0') {
318-
tech = db->findTech(tech_name);
319-
} else {
320-
tech = db->getTech();
321-
}
322-
if (!tech) {
323-
auto logger = getLogger();
324-
logger->error(utl::ORD, 52, "Technology {} not found", tech_name);
325-
}
326-
ord->readDef(filename, tech, chip, continue_on_errors,
327-
floorplan_init, incremental, child);
314+
ord->readDef(filename, chip, continue_on_errors,
315+
floorplan_init, incremental);
328316
}
329317

330318
void

src/OpenRoad.tcl

Lines changed: 14 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -38,7 +38,7 @@ proc read_lef { args } {
3838
ord::read_lef_cmd $filename $lib_name $tech_name $make_tech $make_lib
3939
}
4040

41-
sta::define_cmd_args "read_def" {[-floorplan_initialize|-incremental|-child]\
41+
sta::define_cmd_args "read_def" {[-floorplan_initialize|-incremental]\
4242
[-continue_on_errors]\
4343
[-tech name] \
4444
[-chip chip_name] \
@@ -47,7 +47,7 @@ sta::define_cmd_args "read_def" {[-floorplan_initialize|-incremental|-child]\
4747
proc read_def { args } {
4848
sta::parse_key_args "read_def" args keys {-tech -chip} \
4949
flags {-floorplan_initialize -incremental \
50-
-order_wires -continue_on_errors -child}
50+
-order_wires -continue_on_errors}
5151
sta::check_argc_eq1 "read_def" $args
5252
set filename [file nativename [lindex $args 0]]
5353
if { ![file exists $filename] } {
@@ -56,22 +56,26 @@ proc read_def { args } {
5656
if { ![file readable $filename] || ![file isfile $filename] } {
5757
utl::error "ORD" 4 "$filename is not readable."
5858
}
59-
set tech_name ""
6059
if { [info exists keys(-tech)] } {
6160
set tech_name $keys(-tech)
61+
set tech [[ord::get_db] findTech $tech_name]
62+
if { $tech == "NULL" } {
63+
utl::error ORD 52 "Technology $tech_name not found."
64+
}
6265
} elseif { ![ord::db_has_tech] } {
6366
utl::error "ORD" 5 "No technology has been read."
67+
} else {
68+
set tech [[ord::get_db] getTech]
6469
}
6570
if { [info exists flags(-order_wires)] } {
6671
utl::warn "ORD" 33 "-order_wires is deprecated."
6772
}
6873
set continue_on_errors [info exists flags(-continue_on_errors)]
6974
set floorplan_init [info exists flags(-floorplan_initialize)]
7075
set incremental [info exists flags(-incremental)]
71-
set child [info exists flags(-child)]
72-
if { $floorplan_init + $incremental + $child > 1 } {
73-
utl::error ORD 16 "Options -incremental, -floorplan_initialization,\
74-
and -child are mutually exclusive."
76+
if { $floorplan_init + $incremental > 1 } {
77+
utl::error ORD 16 "Options -incremental and -floorplan_initialization\
78+
are mutually exclusive."
7579
}
7680
if { [info exists keys(-chip)] } {
7781
set chip [[ord::get_db] findChip $keys(-chip)]
@@ -80,13 +84,13 @@ proc read_def { args } {
8084
}
8185
} else {
8286
if { [[ord::get_db] getChip] == "NULL" } {
83-
set chip [odb::dbChip_create [ord::get_db]]
87+
set chip [odb::dbChip_create [ord::get_db] $tech]
8488
} else {
8589
set chip [[ord::get_db] getChip]
8690
}
8791
}
88-
ord::read_def_cmd $filename $tech_name $continue_on_errors $floorplan_init \
89-
$incremental $child $chip
92+
ord::read_def_cmd $filename $continue_on_errors $floorplan_init \
93+
$incremental $chip
9094
}
9195

9296
sta::define_cmd_args "write_def" {[-version version] filename}

src/cts/test/array.tcl

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@ read_lef array_tile.lef
1919

2020
set db [ord::get_db]
2121
set tech [ord::get_db_tech]
22-
set chip [odb::dbChip_create $db]
22+
set chip [odb::dbChip_create $db $tech]
2323
set block [odb::dbBlock_create $chip "top"]
2424
$block setDefUnits 2000
2525

src/cts/test/array_dummy.tcl

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@ read_lef array_tile.lef
1919

2020
set db [ord::get_db]
2121
set tech [ord::get_db_tech]
22-
set chip [odb::dbChip_create $db]
22+
set chip [odb::dbChip_create $db $tech]
2323
set block [odb::dbBlock_create $chip "top"]
2424
$block setDefUnits 2000
2525

src/cts/test/array_full_flow.tcl

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@ read_lef array_tile.lef
1919

2020
set db [ord::get_db]
2121
set tech [ord::get_db_tech]
22-
set chip [odb::dbChip_create $db]
22+
set chip [odb::dbChip_create $db $tech]
2323
set block [odb::dbBlock_create $chip "top"]
2424
$block setDefUnits 2000
2525

src/cts/test/array_ins_delay.tcl

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@ read_lef array_tile.lef
1919

2020
set db [ord::get_db]
2121
set tech [ord::get_db_tech]
22-
set chip [odb::dbChip_create $db]
22+
set chip [odb::dbChip_create $db $tech]
2323
set block [odb::dbBlock_create $chip "top"]
2424
$block setDefUnits 2000
2525

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