fix fake ram liberty to be within reason

jjcherry56 · jjcherry56 · commit 33aa7018524a · 2020-05-25T16:16:31.000-07:00
diff --git a/test/Nangate45/fakeram45_1024x32.lib b/test/Nangate45/fakeram45_1024x32.lib
@@ -29,7 +29,7 @@ library(fakeram45_1024x32) {
     default_input_pin_cap : 0.0;
     default_output_pin_cap : 0.0;
     default_input_pin_cap : 0.0;
-    default_max_transition : 0.0;
+    default_max_transition : 0.2;
 
     default_operating_conditions : tt_1.0_25.0;
     default_leakage_power_density : 0.0;
@@ -103,11 +103,11 @@ cell(fakeram45_1024x32) {
         internal_power(){
             rise_power(fakeram45_1024x32_energy_template_clkslew) {
                 index_1 ("0.009, 0.453");
-                values ("39351.015, 39351.015")
+                values (".04, .04")
             }
             fall_power(fakeram45_1024x32_energy_template_clkslew) {
                 index_1 ("0.009, 0.453");
-                values ("39351.015, 39351.015")
+                values (".04, .04")
             }
         }
     }
@@ -140,12 +140,12 @@ cell(fakeram45_1024x32) {
                 )
             }
             rise_transition(fakeram45_1024x32_mem_out_slew_template) {
-                index_1 ("0.000, 0.002");
-                values ("0.05, 1.00")
+                index_1 ("0.00, 0.2");
+                values ("0.01, 0.2")
             }
             fall_transition(fakeram45_1024x32_mem_out_slew_template) {
-                index_1 ("0.000, 0.002");
-                values ("0.05, 1.00")
+                index_1 ("0.00, 0.2");
+                values ("0.01, 0.2")
             }
         }
     }
diff --git a/test/Nangate45/fakeram45_64x32.lib b/test/Nangate45/fakeram45_64x32.lib
@@ -29,7 +29,7 @@ library(fakeram45_64x32) {
     default_input_pin_cap : 0.0;
     default_output_pin_cap : 0.0;
     default_input_pin_cap : 0.0;
-    default_max_transition : 0.0;
+    default_max_transition : 0.2;
 
     default_operating_conditions : tt_1.0_25.0;
     default_leakage_power_density : 0.0;
@@ -103,11 +103,11 @@ cell(fakeram45_64x32) {
         internal_power(){
             rise_power(fakeram45_64x32_energy_template_clkslew) {
                 index_1 ("0.009, 0.453");
-                values ("39351.015, 39351.015")
+                values (".04, .04")
             }
             fall_power(fakeram45_64x32_energy_template_clkslew) {
                 index_1 ("0.009, 0.453");
-                values ("39351.015, 39351.015")
+                values (".04, .04")
             }
         }
     }
@@ -139,13 +139,13 @@ cell(fakeram45_64x32) {
                   "0.174, 0.174" \
                 )
             }
-            rise_transition(fakeram45_64x32_mem_out_slew_template) {
-                index_1 ("0.000, 0.002");
-                values ("0.05, 1.00")
+            rise_transition(fakeram45_1024x32_mem_out_slew_template) {
+                index_1 ("0.00, 0.2");
+                values ("0.01, 0.2")
             }
-            fall_transition(fakeram45_64x32_mem_out_slew_template) {
-                index_1 ("0.000, 0.002");
-                values ("0.05, 1.00")
+            fall_transition(fakeram45_1024x32_mem_out_slew_template) {
+                index_1 ("0.00, 0.2");
+                values ("0.01, 0.2")
             }
         }
     }

Original file line number	Diff line number	Diff line change
`@@ -29,7 +29,7 @@ library(fakeram45_1024x32) {`
`29`	`29`	`default_input_pin_cap : 0.0;`
`30`	`30`	`default_output_pin_cap : 0.0;`
`31`	`31`	`default_input_pin_cap : 0.0;`
`32`		`- default_max_transition : 0.0;`
	`32`	`+ default_max_transition : 0.2;`
`33`	`33`
`34`	`34`	`default_operating_conditions : tt_1.0_25.0;`
`35`	`35`	`default_leakage_power_density : 0.0;`
`@@ -103,11 +103,11 @@ cell(fakeram45_1024x32) {`
`103`	`103`	`internal_power(){`
`104`	`104`	`rise_power(fakeram45_1024x32_energy_template_clkslew) {`
`105`	`105`	`index_1 ("0.009, 0.453");`
`106`		`- values ("39351.015, 39351.015")`
	`106`	`+ values (".04, .04")`
`107`	`107`	`}`
`108`	`108`	`fall_power(fakeram45_1024x32_energy_template_clkslew) {`
`109`	`109`	`index_1 ("0.009, 0.453");`
`110`		`- values ("39351.015, 39351.015")`
	`110`	`+ values (".04, .04")`
`111`	`111`	`}`
`112`	`112`	`}`
`113`	`113`	`}`
`@@ -140,12 +140,12 @@ cell(fakeram45_1024x32) {`
`140`	`140`	`)`
`141`	`141`	`}`
`142`	`142`	`rise_transition(fakeram45_1024x32_mem_out_slew_template) {`
`143`		`- index_1 ("0.000, 0.002");`
`144`		`- values ("0.05, 1.00")`
	`143`	`+ index_1 ("0.00, 0.2");`
	`144`	`+ values ("0.01, 0.2")`
`145`	`145`	`}`
`146`	`146`	`fall_transition(fakeram45_1024x32_mem_out_slew_template) {`
`147`		`- index_1 ("0.000, 0.002");`
`148`		`- values ("0.05, 1.00")`
	`147`	`+ index_1 ("0.00, 0.2");`
	`148`	`+ values ("0.01, 0.2")`
`149`	`149`	`}`
`150`	`150`	`}`
`151`	`151`	`}`
Original file line number	Diff line number	Diff line change
`@@ -29,7 +29,7 @@ library(fakeram45_64x32) {`
`29`	`29`	`default_input_pin_cap : 0.0;`
`30`	`30`	`default_output_pin_cap : 0.0;`
`31`	`31`	`default_input_pin_cap : 0.0;`
`32`		`- default_max_transition : 0.0;`
	`32`	`+ default_max_transition : 0.2;`
`33`	`33`
`34`	`34`	`default_operating_conditions : tt_1.0_25.0;`
`35`	`35`	`default_leakage_power_density : 0.0;`
`@@ -103,11 +103,11 @@ cell(fakeram45_64x32) {`
`103`	`103`	`internal_power(){`
`104`	`104`	`rise_power(fakeram45_64x32_energy_template_clkslew) {`
`105`	`105`	`index_1 ("0.009, 0.453");`
`106`		`- values ("39351.015, 39351.015")`
	`106`	`+ values (".04, .04")`
`107`	`107`	`}`
`108`	`108`	`fall_power(fakeram45_64x32_energy_template_clkslew) {`
`109`	`109`	`index_1 ("0.009, 0.453");`
`110`		`- values ("39351.015, 39351.015")`
	`110`	`+ values (".04, .04")`
`111`	`111`	`}`
`112`	`112`	`}`
`113`	`113`	`}`
`@@ -139,13 +139,13 @@ cell(fakeram45_64x32) {`
`139`	`139`	`"0.174, 0.174" \`
`140`	`140`	`)`
`141`	`141`	`}`
`142`		`- rise_transition(fakeram45_64x32_mem_out_slew_template) {`
`143`		`- index_1 ("0.000, 0.002");`
`144`		`- values ("0.05, 1.00")`
	`142`	`+ rise_transition(fakeram45_1024x32_mem_out_slew_template) {`
	`143`	`+ index_1 ("0.00, 0.2");`
	`144`	`+ values ("0.01, 0.2")`
`145`	`145`	`}`
`146`		`- fall_transition(fakeram45_64x32_mem_out_slew_template) {`
`147`		`- index_1 ("0.000, 0.002");`
`148`		`- values ("0.05, 1.00")`
	`146`	`+ fall_transition(fakeram45_1024x32_mem_out_slew_template) {`
	`147`	`+ index_1 ("0.00, 0.2");`
	`148`	`+ values ("0.01, 0.2")`
`149`	`149`	`}`
`150`	`150`	`}`
`151`	`151`	`}`