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Change the C++ code to use an enum and have the string conversion handled in the swig layer. Update README
Signed-off-by: Jonas Gava <[email protected]>
1 parent be3a847 commit 3d2b3fa

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+35
-30
lines changed

6 files changed

+35
-30
lines changed

src/cts/README.md

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -92,7 +92,7 @@ clock_tree_synthesis
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| `-num_static_layers` | Set the number of static layers. The default value is `0`, and the allowed values are integers `[0, MAX_INT]`. |
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| `-sink_clustering_buffer` | Set the sink clustering buffer(s) to be used. |
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| `-obstruction_aware` | Enables obstruction-aware buffering such that clock buffers are not placed on top of blockages or hard macros. This option may reduce legalizer displacement, leading to better latency, skew or timing QoR. The default value is `False`, and the allowed values are bool. |
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| `-apply_ndr` | Applies 2X spacing non-default rule to clock nets except leaf-level nets following some strategy. There are four strategy options: `none, root_only, half, full`. The default value is `root_only`. |
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| `-apply_ndr` | Applies 2X spacing non-default rule to clock nets except leaf-level nets following some strategy. There are four strategy options: `none, root_only, half, full`. If this is not specified, the default value is `none`. |
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| `-dont_use_dummy_load` | Don't apply dummy buffer or inverter cells at clock tree leaves to balance loads. The default values is `False`. |
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| `-sink_buffer_max_cap_derate` | Use this option to control automatic buffer selection. To favor strong(weak) drive strength buffers use a small(large) value. The default value is `0.01`, meaning that buffers are selected by derating max cap limit by 0.01. The value of 1.0 means no derating of max cap limit. |
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| `-delay_buffer_derate` | This option balances latencies between macro cells and registers by inserting delay buffers. The default value is `1.0`, meaning all needed delay buffers are inserted. A value of 0.5 means only half of necessary delay buffers are inserted. A value of 0.0 means no insertion of delay buffers. |

src/cts/src/CtsOptions.cpp

Lines changed: 0 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -5,31 +5,6 @@
55

66
namespace cts {
77

8-
void CtsOptions::setApplyNDR(const std::string& strategy)
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{
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std::string lower_strategy = strategy;
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std::transform(lower_strategy.begin(),
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lower_strategy.end(),
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lower_strategy.begin(),
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::tolower);
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if (lower_strategy == "none") {
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ndrStrategy_ = NdrStrategy::NONE;
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} else if (lower_strategy == "root_only") {
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ndrStrategy_ = NdrStrategy::ROOT_ONLY;
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} else if (lower_strategy == "half") {
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ndrStrategy_ = NdrStrategy::HALF;
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} else if (lower_strategy == "full") {
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ndrStrategy_ = NdrStrategy::FULL;
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} else {
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logger_->warn(utl::CTS,
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33,
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"Invalid NDR strategy: {}. Defaulting to root_only.",
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strategy);
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ndrStrategy_ = NdrStrategy::ROOT_ONLY;
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}
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}
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CtsOptions::MasterType CtsOptions::getType(odb::dbInst* inst) const
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{
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if (inst->getName().substr(0, dummyload_prefix_.size())

src/cts/src/CtsOptions.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -271,7 +271,7 @@ class CtsOptions : public odb::dbBlockCallBackObj
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bool getRepairClockNets() { return repairClockNets_; }
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// NDR strategies
274-
void setApplyNDR(const std::string& strategy);
274+
void setApplyNDR(NdrStrategy strategy) { ndrStrategy_ = strategy; }
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NdrStrategy getApplyNdr() const { return ndrStrategy_; }
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private:

src/cts/src/TritonCTS.i

Lines changed: 30 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -26,6 +26,35 @@ using ord::getTritonCts;
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%ignore cts::CtsOptions::setObserver;
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%ignore cts::CtsOptions::getObserver;
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29+
// Enum: CtsOptions::NdrStrategy
30+
%typemap(typecheck) CtsOptions::NdrStrategy {
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char *str = Tcl_GetStringFromObj($input, 0);
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if (strcasecmp(str, "NONE") == 0) {
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$1 = 1;
34+
} else if (strcasecmp(str, "ROOT_ONLY") == 0) {
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$1 = 1;
36+
} else if (strcasecmp(str, "HALF") == 0) {
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$1 = 1;
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} else if (strcasecmp(str, "FULL") == 0) {
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$1 = 1;
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} else {
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$1 = 0;
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}
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}
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%typemap(in) CtsOptions::NdrStrategy {
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char *str = Tcl_GetStringFromObj($input, 0);
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if (strcasecmp(str, "ROOT_ONLY") == 0) {
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$1 = CtsOptions::NdrStrategy::ROOT_ONLY;
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} else if (strcasecmp(str, "HALF") == 0) {
50+
$1 = CtsOptions::NdrStrategy::HALF;
51+
} else if (strcasecmp(str, "FULL") == 0) {
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$1 = CtsOptions::NdrStrategy::FULL;
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} else {
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$1 = CtsOptions::NdrStrategy::NONE;
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};
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}
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%inline %{
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3160
void
@@ -205,7 +234,7 @@ set_obstruction_aware(bool obs)
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}
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207236
void
208-
set_apply_ndr(const char* strategy)
237+
set_apply_ndr(CtsOptions::NdrStrategy strategy)
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{
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getTritonCts()->getParms()->setApplyNDR(strategy);
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}

src/cts/src/TritonCTS.tcl

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -56,7 +56,7 @@ sta::define_cmd_args "clock_tree_synthesis" {[-wire_unit unit]
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[-sink_clustering_buffer] \
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[-obstruction_aware] \
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[-no_obstruction_aware] \
59-
[-apply_ndr] \
59+
[-apply_ndr strategy] \
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[-sink_buffer_max_cap_derate] \
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[-dont_use_dummy_load] \
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[-delay_buffer_derate] \

src/cts/test/simple_test.py

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,7 @@
11
from openroad import Design, Tech
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import helpers
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import cts_aux
4+
import cts
45

56
tech = Tech()
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tech.readLef("Nangate45/Nangate45.lef")
@@ -17,7 +18,7 @@
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root_buf="CLKBUF_X3",
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buf_list="CLKBUF_X3",
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wire_unit=20,
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apply_ndr="root_only",
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apply_ndr=cts.CtsOptions.NdrStrategy_ROOT_ONLY,
2122
)
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2324
cts_aux.report_cts(design)

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