@@ -2070,7 +2070,6 @@ void dbNetwork::makeCell(Library* library, dbMaster* master)
20702070 master->staSetCell (reinterpret_cast <void *>(cell));
20712071 // keep track of db leaf cells. These are cells for which we
20722072 // use the concrete network.
2073- registerConcreteCell (cell);
20742073 ConcreteCell* ccell = reinterpret_cast <ConcreteCell*>(cell);
20752074 ccell->setExtCell (reinterpret_cast <void *>(master));
20762075
@@ -2156,29 +2155,13 @@ void dbNetwork::makeCell(Library* library, dbMaster* master)
21562155 }
21572156 }
21582157
2159- // Register all ConcreteCells (including physical-only) from
2160- // all libraries (LEF + Liberty)
2161- registerConcreteCellsFromAllLib (cell_name);
2162-
21632158 std::unique_ptr<CellPortIterator> port_iter{portIterator (cell)};
21642159 while (port_iter->hasNext ()) {
21652160 Port* cur_port = port_iter->next ();
21662161 registerConcretePort (cur_port);
21672162 }
21682163}
21692164
2170- void dbNetwork::registerConcreteCellsFromAllLib (const char * cell_name)
2171- {
2172- std::unique_ptr<LibraryIterator> library_iter{libraryIterator ()};
2173- while (library_iter->hasNext ()) {
2174- Library* lib = library_iter->next ();
2175- Cell* match = findCell (lib, cell_name);
2176- if (match) {
2177- registerConcreteCell (match);
2178- }
2179- }
2180- }
2181-
21822165void dbNetwork::readDbNetlistAfter ()
21832166{
21842167 makeTopCell ();
@@ -2332,7 +2315,6 @@ Instance* dbNetwork::makeInstance(LibertyCell* cell,
23322315 // to get timing characteristics, so they have to be
23332316 // concrete
23342317 Cell* inst_cell = dbToSta (master);
2335- registerConcreteCell (inst_cell);
23362318 std::unique_ptr<sta::CellPortIterator> port_iter{portIterator (inst_cell)};
23372319 while (port_iter->hasNext ()) {
23382320 Port* cur_port = port_iter->next ();
@@ -2350,13 +2332,12 @@ Instance* dbNetwork::makeInstance(LibertyCell* cell,
23502332 dbInst* inst = dbInst::create (block_, master, name, false , parent);
23512333 Cell* inst_cell = dbToSta (master);
23522334 //
2353- // Register all liberty cells as being concrete
2335+ // Register all ports of liberty cells as being concrete
23542336 // Sometimes this method is called by the sta
23552337 // to build "test circuits" eg to find the max wire length
23562338 // And those cells need to use the external api
23572339 // to get timing characteristics, so they have to be
23582340 // concrete
2359- registerConcreteCell (inst_cell);
23602341 std::unique_ptr<sta::CellPortIterator> port_iter{portIterator (inst_cell)};
23612342 while (port_iter->hasNext ()) {
23622343 Port* cur_port = port_iter->next ();
@@ -3217,20 +3198,6 @@ LibertyPort* dbNetwork::libertyPort(const Pin* pin) const
32173198 return nullptr ;
32183199}
32193200
3220- /*
3221- We keep a registry of the concrete cells.
3222- For these we know to use the concrete network interface.
3223- The concrete cells are created outside of the odb world
3224- -- attempting to type cast those can lead to bad pointers.
3225- So we simply note them and then when we inspect a cell
3226- we can decide whether or not to use the ConcreteNetwork api.
3227- */
3228-
3229- void dbNetwork::registerConcreteCell (const Cell* cell)
3230- {
3231- concrete_cells_.insert (cell);
3232- }
3233-
32343201void dbNetwork::registerHierModule (const Cell* cell)
32353202{
32363203 hier_modules_.insert (cell);
@@ -3241,6 +3208,14 @@ void dbNetwork::unregisterHierModule(const Cell* cell)
32413208 hier_modules_.erase (cell);
32423209}
32433210
3211+ /*
3212+ We keep a registry of the concrete cells.
3213+ For these we know to use the concrete network interface.
3214+ The concrete cells are created outside of the odb world
3215+ -- attempting to type cast those can lead to bad pointers.
3216+ So we simply note them and then when we inspect a cell
3217+ we can decide whether or not to use the ConcreteNetwork api.
3218+ */
32443219bool dbNetwork::isConcreteCell (const Cell* cell) const
32453220{
32463221 if (!hierarchy_) {
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