Merge pull request #8691 from arthurjolo/cts_balance_levels_crash

Cts: fix balance levels crash

Author: maliberty

src/cts/include/cts/TritonCTS.h

@@ -221,6 +221,7 @@ class TritonCTS
   std::set<odb::dbNet*> visitedClockNets_;
   std::map<odb::dbInst*, ClockInst*> inst2clkbuf_;
   std::map<ClockInst*, ClockSubNet*> driver2subnet_;
+  std::map<odb::dbNet*, TreeBuilder*> net2builder_;
 
   // db vars
   odb::dbDatabase* db_ = nullptr;

src/cts/src/LatencyBalancer.cpp

@@ -158,6 +158,9 @@ void LatencyBalancer::buildGraph(odb::dbNet* clkInputNet)
 
     for (odb::dbITerm* sinkIterm : driverNet->getITerms()) {
       if (sinkIterm->getIoType() == odb::dbIoType::INPUT) {
+        if (!isSink(sinkIterm) && !propagateClock(sinkIterm)) {
+          continue;
+        }
         int sinkId = graph_.size();
         odb::dbInst* sinkInst = sinkIterm->getInst();
         std::string sinkName = sinkInst->getName();
@@ -197,7 +200,7 @@ void LatencyBalancer::buildGraph(odb::dbNet* clkInputNet)
                 }
               }
             }
-
+            worseDelay_ = std::max(worseDelay_, (arrival + insDelay));
             graph_[sinkId].arrival = arrival + insDelay;
             debugPrint(logger_,
                        CTS,
@@ -288,7 +291,10 @@ float LatencyBalancer::computeAveSinkArrivals(TreeBuilder* builder)
     odb::dbITerm* iterm = sink.getDbInputPin();
     computeSinkArrivalRecur(topInputClockNet, iterm, sumArrivals, numSinks);
   });
-  float aveArrival = sumArrivals / (float) numSinks;
+  float aveArrival = 0.0;
+  if (numSinks) {
+    aveArrival = sumArrivals / (float) numSinks;
+  }
   builder->setAveSinkArrival(aveArrival);
   debugPrint(logger_,
              CTS,

src/cts/src/TritonCTS.cpp

@@ -302,6 +302,9 @@ void TritonCTS::initOneClockTree(odb::dbNet* driverNet,
   } else {
     clockBuilder = initClock(driverNet, clkInputNet, sdcClockName, parent);
   }
+  if (clockBuilder != nullptr && net2builder_[clkInputNet] == nullptr) {
+    net2builder_[clkInputNet] = clockBuilder;
+  }
   // Treat gated clocks as separate clock trees
   // TODO: include sinks from gated clocks together with other sinks and build
   // one clock tree
@@ -317,8 +320,16 @@ void TritonCTS::initOneClockTree(odb::dbNet* driverNet,
           if (visitedClockNets_.find(outputNet) == visitedClockNets_.end()
               && !openSta_->sdc()->isLeafPinClock(
                   network_->dbToSta(outputPin))) {
-            initOneClockTree(
-                outputNet, clkInputNet, sdcClockName, clockBuilder);
+            if (clockBuilder == nullptr
+                && net2builder_[clkInputNet] != nullptr) {
+              initOneClockTree(outputNet,
+                               clkInputNet,
+                               sdcClockName,
+                               net2builder_[clkInputNet]);
+            } else {
+              initOneClockTree(
+                  outputNet, clkInputNet, sdcClockName, clockBuilder);
+            }
           }
         }
       }

src/cts/test/skip_nets.ok

@@ -149,9 +149,15 @@ CTS config:
 [INFO CTS-0102]  Path depth 2 - 2
 [INFO CTS-0207]  Leaf load cells 18
 [INFO CTS-0033] Balancing latency for clock clk
-[DEBUG CTS-insertion delay] new delay buffer delaybuf_0_clk is inserted at (100608 169407)
-[DEBUG CTS-insertion delay] new delay buffer delaybuf_1_clk is inserted at (101216 138954)
-[DEBUG CTS-insertion delay] new delay buffer delaybuf_2_clk is inserted at (101824 108501)
-[DEBUG CTS-insertion delay] new delay buffer delaybuf_3_clk is inserted at (102432 78048)
-[INFO CTS-0036]  inserted 4 delay buffers
-[INFO CTS-0037] Total number of delay buffers: 4
+[DEBUG CTS-insertion delay] new delay buffer delaybuf_0_clk is inserted at (53554 164304)
+[DEBUG CTS-insertion delay] new delay buffer delaybuf_1_clk is inserted at (53513 162428)
+[DEBUG CTS-insertion delay] new delay buffer delaybuf_2_clk is inserted at (53472 160552)
+[DEBUG CTS-insertion delay] new delay buffer delaybuf_3_clk is inserted at (53431 158676)
+[DEBUG CTS-insertion delay] new delay buffer delaybuf_4_clk is inserted at (100434 178107)
+[DEBUG CTS-insertion delay] new delay buffer delaybuf_5_clk is inserted at (100868 156355)
+[DEBUG CTS-insertion delay] new delay buffer delaybuf_6_clk is inserted at (101302 134603)
+[DEBUG CTS-insertion delay] new delay buffer delaybuf_7_clk is inserted at (101737 112851)
+[DEBUG CTS-insertion delay] new delay buffer delaybuf_8_clk is inserted at (102171 91099)
+[DEBUG CTS-insertion delay] new delay buffer delaybuf_9_clk is inserted at (102605 69347)
+[INFO CTS-0036]  inserted 10 delay buffers
+[INFO CTS-0037] Total number of delay buffers: 10