ifp: Add tests and doc for -gap option.

Signed-off-by: Christian COSTA <[email protected]>

Author: titan73

src/ifp/README.md

@@ -56,6 +56,7 @@ initialize_floorplan
   -site site_name
   [-additional_sites site_names]
   [-flip_sites site_names]
+  [-gap space]
   [-row_parity NONE|EVEN|ODD]
 ```
 
@@ -71,6 +72,7 @@ initialize_floorplan
 | `[-additional_sites]` | Tcl list of sites to make rows for (e.g. `{SITEXX, SITEYY}`) |
 | `[-aspect_ratio]` | Ratio $\frac{height}{width}$. The default value is `1.0` and the allowed values are floats `[0, 1.0]`. |
 | `[-flip_sites]` | Flip the orientations of rows matching these sites. Sites listed under this option will create `FS`-oriented rows at even indices and `N`-oriented rows at odd ones, and vice versa for sites not listed under this option. (e.g. `{SITEXX, SITEYY}`) |
+| `[-gap]` | Space between power domains in microns. The default value is 6 times the minimum site height. |
 | `[-row_parity]` | Snap to either an odd (`ODD`) or even (`EVEN`) number of rows. Defaults to `NONE` (no constraint on parity). |
 
 ### Make Tracks
@@ -107,6 +109,7 @@ make_rows
   -site site_name
   [-additional_sites site_names]
   [-flip_sites site_names]
+  [-gap space]
   [-row_parity NONE|EVEN|ODD]
 ```
 
@@ -120,6 +123,7 @@ make_rows
 | `-site` | Site name. |
 | `[-additional_sites]` | Tcl list of sites to make rows for (e.g. `{SITEXX, SITEYY}`) |
 | `[-flip_sites]` | Flip the orientations of rows matching these sites. Sites listed under this option will create `FS`-oriented rows at even indices and `N`-oriented rows at odd ones, and vice versa for sites not listed under this option. (e.g. `{SITEXX, SITEYY}`) |
+| `[-gap]` | Space between power domains in microns. The default value is 6 times the minimum site height. |
 | `[-row_parity]` | Snap to either an odd (`ODD`) or even (`EVEN`) number of rows. Defaults to `NONE` (no constraint on parity). |
 
 ### Insert tieoff cells

src/ifp/test/BUILD

@@ -21,6 +21,7 @@ COMPULSORY_TESTS = [
     "init_floorplan_dbl_row",
     "init_floorplan_even_rows",
     "init_floorplan_flip_sites",
+    "init_floorplan_gap",
     "init_floorplan_odd_rows",
     "init_floorplan_polygon",
     "init_floorplan_polygon2",

src/ifp/test/CMakeLists.txt

@@ -16,6 +16,7 @@ or_integration_tests(
     init_floorplan_dbl_row
     init_floorplan_even_rows
     init_floorplan_flip_sites
+    init_floorplan_gap
     init_floorplan_odd_rows
     init_floorplan_polygon
     init_floorplan_polygon2

src/ifp/test/init_floorplan_gap.defok

@@ -0,0 +1,15 @@
+VERSION 5.6 ;
+BUSBITCHARS "[]" ;
+DIVIDERCHAR "/" ;
+
+UNITS
+  DATABASE MICRONS 2000 ;
+END UNITS
+
+MANUFACTURINGGRID 0.0050 ;
+
+SITE FreePDK45_38x28_10R_NP_162NW_34O_DoubleHeight
+  SYMMETRY y ;
+  CLASS core ;
+  SIZE 0.19 BY 2.8 ;
+END FreePDK45_38x28_10R_NP_162NW_34O_DoubleHeight

src/ifp/test/init_floorplan_gap.lef

@@ -0,0 +1,5 @@
+[INFO ODB-0227] LEF file: Nangate45/Nangate45.lef, created 22 layers, 27 vias, 135 library cells
+[INFO ODB-0227] LEF file: init_floorplan_gap.lef
+[INFO IFP-0001] Added 71 rows of 526 site FreePDK45_38x28_10R_NP_162NW_34O.
+[INFO IFP-0001] Added 35 rows of 526 site FreePDK45_38x28_10R_NP_162NW_34O_DoubleHeight.
+No differences found.

src/ifp/test/init_floorplan_gap.ok

@@ -0,0 +1,31 @@
+from openroad import Tech, Design
+import odb
+import helpers
+import ifp_helpers as ifph
+
+tech = Tech()
+tech.readLef("Nangate45/Nangate45.lef")
+tech.readLef("init_floorplan_gap.lef")
+tech.readLiberty("Nangate45/Nangate45_typ.lib")
+
+design = Design(tech)
+design.readVerilog("reg1.v")
+design.link("top")
+
+die = helpers.make_rect(design, 0, 0, 100, 100)
+core = helpers.make_rect(design, 0, 0, 100, 100)
+
+l = design.micronToDBU(34)
+u = design.micronToDBU(66)
+
+ifph.create_voltage_domain(design, "TEMP_ANALOG", (l, l, u, u))
+
+floorplan = design.getFloorplan()
+site = floorplan.findSite("FreePDK45_38x28_10R_NP_162NW_34O")
+additional_site = floorplan.findSite("FreePDK45_38x28_10R_NP_162NW_34O_DoubleHeight")
+floorplan.initFloorplan(
+    die, core, site, [additional_site], "NONE", [], design.micronToDBU(2)
+)
+def_file = helpers.make_result_file("init_floorplan_gap.def")
+design.writeDef(def_file)
+helpers.diff_files("init_floorplan_gap.defok", def_file)

src/ifp/test/init_floorplan_gap.py

@@ -0,0 +1,17 @@
+# init_floorplan called after a voltage domain is specified
+source "helpers.tcl"
+read_lef Nangate45/Nangate45.lef
+read_lef init_floorplan_gap.lef
+read_liberty Nangate45/Nangate45_typ.lib
+read_verilog reg1.v
+link_design top
+create_voltage_domain TEMP_ANALOG -area {34 34 66 66}
+initialize_floorplan -die_area {0 0 100 100} \
+  -core_area {0 0 100 100} \
+  -site FreePDK45_38x28_10R_NP_162NW_34O \
+  -additional_sites FreePDK45_38x28_10R_NP_162NW_34O_DoubleHeight \
+  -gap 2
+
+set def_file [make_result_file init_floorplan_gap.def]
+write_def $def_file
+diff_files init_floorplan_gap.defok $def_file