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grt: add clock nets set into cugr
Signed-off-by: Eder Monteiro <[email protected]>
1 parent 4ffcf2f commit d78819c

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5 files changed

+15
-38
lines changed

5 files changed

+15
-38
lines changed

src/grt/src/GlobalRouter.cpp

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -350,7 +350,9 @@ void GlobalRouter::globalRoute(bool save_guides,
350350
if (use_cugr_) {
351351
int min_layer, max_layer;
352352
getMinMaxLayer(min_layer, max_layer);
353-
cugr_->init(min_layer, max_layer);
353+
std::set<odb::dbNet*> clock_nets;
354+
findClockNets(nets, clock_nets);
355+
cugr_->init(min_layer, max_layer, clock_nets);
354356
cugr_->route();
355357
routes_ = cugr_->getRoutes();
356358
} else {

src/grt/src/cugr/include/CUGR.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -65,7 +65,7 @@ class CUGR
6565
stt::SteinerTreeBuilder* stt_builder,
6666
sta::dbSta* sta);
6767
~CUGR();
68-
void init(int min_routing_layer, int max_routing_layer);
68+
void init(int min_routing_layer, int max_routing_layer, std::set<odb::dbNet*> clock_nets);
6969
void route();
7070
void write(const std::string& guide_file);
7171
NetRouteMap getRoutes();

src/grt/src/cugr/src/CUGR.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -40,10 +40,10 @@ CUGR::CUGR(odb::dbDatabase* db,
4040

4141
CUGR::~CUGR() = default;
4242

43-
void CUGR::init(const int min_routing_layer, const int max_routing_layer)
43+
void CUGR::init(const int min_routing_layer, const int max_routing_layer, std::set<odb::dbNet*> clock_nets)
4444
{
4545
design_ = std::make_unique<Design>(
46-
db_, logger_, sta_, constants_, min_routing_layer, max_routing_layer);
46+
db_, logger_, sta_, constants_, min_routing_layer, max_routing_layer, clock_nets);
4747
grid_graph_ = std::make_unique<GridGraph>(design_.get(), constants_, logger_);
4848
// Instantiate the global routing netlist
4949
const std::vector<CUGRNet>& baseNets = design_->getAllNets();

src/grt/src/cugr/src/Design.cpp

Lines changed: 5 additions & 31 deletions
Original file line numberDiff line numberDiff line change
@@ -22,14 +22,16 @@ Design::Design(odb::dbDatabase* db,
2222
sta::dbSta* sta,
2323
const Constants& constants,
2424
const int min_routing_layer,
25-
const int max_routing_layer)
25+
const int max_routing_layer,
26+
std::set<odb::dbNet*> clock_nets)
2627
: block_(db->getChip()->getBlock()),
2728
tech_(db->getTech()),
2829
logger_(logger),
2930
sta_(sta),
3031
constants_(constants),
3132
min_routing_layer_(min_routing_layer),
32-
max_routing_layer_(max_routing_layer)
33+
max_routing_layer_(max_routing_layer),
34+
clock_nets_(clock_nets)
3335
{
3436
read();
3537
setUnitCosts();
@@ -138,7 +140,7 @@ void Design::readNetlist()
138140

139141
LayerRange layer_range
140142
= {.min_layer = min_routing_layer_, .max_layer = max_routing_layer_};
141-
if (isNonLeafClock(db_net)) {
143+
if (clock_nets_.find(db_net) != clock_nets_.end()) {
142144
layer_range.min_layer = block_->getMinLayerForClock() - 1;
143145
layer_range.max_layer = block_->getMaxLayerForClock() - 1;
144146
}
@@ -302,34 +304,6 @@ void Design::setUnitCosts()
302304
}
303305
}
304306

305-
bool Design::isClkTerm(odb::dbITerm* iterm, sta::dbNetwork* network)
306-
{
307-
const sta::Pin* pin = network->dbToSta(iterm);
308-
sta::LibertyPort* lib_port = network->libertyPort(pin);
309-
bool connected_to_pad = false;
310-
if (lib_port != nullptr) {
311-
sta::LibertyCell* lib_cell = lib_port->libertyCell();
312-
connected_to_pad = lib_cell != nullptr && lib_cell->isPad();
313-
}
314-
315-
return lib_port && (lib_port->isRegClk() || connected_to_pad);
316-
}
317-
318-
bool Design::isNonLeafClock(odb::dbNet* db_net)
319-
{
320-
sta::dbNetwork* network = sta_->getDbNetwork();
321-
if (db_net->getSigType() != odb::dbSigType::CLOCK) {
322-
return false;
323-
}
324-
325-
for (odb::dbITerm* iterm : db_net->getITerms()) {
326-
if (isClkTerm(iterm, network)) {
327-
return false;
328-
}
329-
}
330-
return true;
331-
}
332-
333307
void Design::getAllObstacles(std::vector<std::vector<BoxT>>& all_obstacles,
334308
const bool skip_m1) const
335309
{

src/grt/src/cugr/src/Design.h

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,7 @@
11
#pragma once
22

33
#include <vector>
4+
#include <set>
45

56
#include "CUGR.h"
67
#include "GeoTypes.h"
@@ -37,7 +38,8 @@ class Design
3738
sta::dbSta* sta,
3839
const Constants& constants,
3940
int min_routing_layer,
40-
int max_routing_layer);
41+
int max_routing_layer,
42+
std::set<odb::dbNet*> clock_nets);
4143
int getLibDBU() const { return lib_dbu_; }
4244

4345
CostT getUnitLengthWireCost() const { return unit_length_wire_cost_; }
@@ -77,8 +79,6 @@ class Design
7779
void readDesignObstructions();
7880
void computeGrid();
7981
void setUnitCosts();
80-
bool isClkTerm(odb::dbITerm* iterm, sta::dbNetwork* network);
81-
bool isNonLeafClock(odb::dbNet* db_net);
8282

8383
// debug functions
8484
void printNets() const;
@@ -107,6 +107,7 @@ class Design
107107
const Constants constants_;
108108
const int min_routing_layer_;
109109
const int max_routing_layer_;
110+
std::set<odb::dbNet*> clock_nets_;
110111
};
111112

112113
} // namespace grt

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