@@ -243,7 +243,7 @@ COMPONENTS 543 ;
243243 - BUMP_5_13 DUMMY_BUMP + FIXED ( 2020000 4590000 ) N ;
244244 - BUMP_5_14 DUMMY_BUMP + FIXED ( 2020000 4910000 ) N ;
245245 - BUMP_5_15 DUMMY_BUMP + FIXED ( 2020000 5230000 ) N ;
246- - BUMP_5_16 DUMMY_BUMP + FIXED ( 2020000 5550000 ) N ;
246+ - BUMP_5_16 DUMMY_BUMP + FIXED ( 2020000 5800000 ) N ;
247247 - BUMP_5_2 DUMMY_BUMP + FIXED ( 2020000 1070000 ) N ;
248248 - BUMP_5_3 DUMMY_BUMP + FIXED ( 2020000 1390000 ) N ;
249249 - BUMP_5_4 DUMMY_BUMP + FIXED ( 2020000 1710000 ) N ;
@@ -259,7 +259,7 @@ COMPONENTS 543 ;
259259 - BUMP_6_13 DUMMY_BUMP + FIXED ( 2340000 4590000 ) N ;
260260 - BUMP_6_14 DUMMY_BUMP + FIXED ( 2340000 4910000 ) N ;
261261 - BUMP_6_15 DUMMY_BUMP + FIXED ( 2340000 5230000 ) N ;
262- - BUMP_6_16 DUMMY_BUMP + FIXED ( 2340000 5550000 ) N ;
262+ - BUMP_6_16 DUMMY_BUMP + FIXED ( 2320000 5800000 ) N ;
263263 - BUMP_6_2 DUMMY_BUMP + FIXED ( 2340000 1070000 ) N ;
264264 - BUMP_6_3 DUMMY_BUMP + FIXED ( 2340000 1390000 ) N ;
265265 - BUMP_6_4 DUMMY_BUMP + FIXED ( 2340000 1710000 ) N ;
@@ -275,7 +275,7 @@ COMPONENTS 543 ;
275275 - BUMP_7_13 DUMMY_BUMP + FIXED ( 2660000 4590000 ) N ;
276276 - BUMP_7_14 DUMMY_BUMP + FIXED ( 2660000 4910000 ) N ;
277277 - BUMP_7_15 DUMMY_BUMP + FIXED ( 2660000 5230000 ) N ;
278- - BUMP_7_16 DUMMY_BUMP + FIXED ( 2660000 5550000 ) N ;
278+ - BUMP_7_16 DUMMY_BUMP + FIXED ( 2620000 5800000 ) N ;
279279 - BUMP_7_2 DUMMY_BUMP + FIXED ( 2660000 1070000 ) N ;
280280 - BUMP_7_3 DUMMY_BUMP + FIXED ( 2660000 1390000 ) N ;
281281 - BUMP_7_4 DUMMY_BUMP + FIXED ( 2660000 1710000 ) N ;
@@ -289,7 +289,7 @@ COMPONENTS 543 ;
289289 - BUMP_8_13 DUMMY_BUMP + FIXED ( 2980000 4590000 ) N ;
290290 - BUMP_8_14 DUMMY_BUMP + FIXED ( 2980000 4910000 ) N ;
291291 - BUMP_8_15 DUMMY_BUMP + FIXED ( 2980000 5230000 ) N ;
292- - BUMP_8_16 DUMMY_BUMP + FIXED ( 2980000 5550000 ) N ;
292+ - BUMP_8_16 DUMMY_BUMP + FIXED ( 2920000 5800000 ) N ;
293293 - BUMP_8_2 DUMMY_BUMP + FIXED ( 2980000 1070000 ) N ;
294294 - BUMP_8_3 DUMMY_BUMP + FIXED ( 2980000 1390000 ) N ;
295295 - BUMP_8_4 DUMMY_BUMP + FIXED ( 2980000 1710000 ) N ;
@@ -338,11 +338,11 @@ COMPONENTS 543 ;
338338 - u_ci_clk_i PADCELL_SIG_H + FIXED ( 5690000 3936000 ) W ;
339339 - u_ci_tkn_o PADCELL_SIG_H + FIXED ( 5690000 3786000 ) W ;
340340 - u_ci_v_i PADCELL_SIG_H + FIXED ( 5690000 3698000 ) W ;
341- - u_clk_A_i PADCELL_SIG_V + FIXED ( 2680000 5690000 ) FS ;
342- - u_clk_B_i PADCELL_SIG_V + FIXED ( 2868000 5690000 ) FS ;
343- - u_clk_C_i PADCELL_SIG_V + FIXED ( 2968000 5690000 ) FS ;
344- - u_clk_async_reset_i PADCELL_SIG_V + FIXED ( 3178000 5690000 ) FS ;
345- - u_clk_o PADCELL_SIG_V + FIXED ( 3068000 5690000 ) FS ;
341+ - u_clk_A_i PADCELL_SIG_V + FIXED ( 2826000 5690000 ) FS ;
342+ - u_clk_B_i PADCELL_SIG_V + FIXED ( 2876000 5690000 ) FS ;
343+ - u_clk_C_i PADCELL_SIG_V + FIXED ( 3084000 5690000 ) FS ;
344+ - u_clk_async_reset_i PADCELL_SIG_V + FIXED ( 3284000 5690000 ) FS ;
345+ - u_clk_o PADCELL_SIG_V + FIXED ( 3184000 5690000 ) FS ;
346346 - u_co2_0_o PADCELL_SIG_H + FIXED ( 30000 3918000 ) FW ;
347347 - u_co2_1_o PADCELL_SIG_H + FIXED ( 30000 3968000 ) FW ;
348348 - u_co2_2_o PADCELL_SIG_H + FIXED ( 30000 4018000 ) FW ;
@@ -356,17 +356,17 @@ COMPONENTS 543 ;
356356 - u_co2_tkn_i PADCELL_SIG_H + FIXED ( 30000 4458000 ) FW ;
357357 - u_co2_v_o PADCELL_SIG_H + FIXED ( 30000 4508000 ) FW ;
358358 - u_co_0_i PADCELL_SIG_V + FIXED ( 1080000 5690000 ) FS ;
359- - u_co_1_i PADCELL_SIG_V + FIXED ( 1330000 5690000 ) FS ;
360- - u_co_2_i PADCELL_SIG_V + FIXED ( 1424000 5690000 ) FS ;
361- - u_co_3_i PADCELL_SIG_V + FIXED ( 1610000 5690000 ) FS ;
362- - u_co_4_i PADCELL_SIG_V + FIXED ( 1966000 5690000 ) FS ;
363- - u_co_5_i PADCELL_SIG_V + FIXED ( 2266000 5690000 ) FS ;
364- - u_co_6_i PADCELL_SIG_V + FIXED ( 2316000 5690000 ) FS ;
365- - u_co_7_i PADCELL_SIG_V + FIXED ( 2366000 5690000 ) FS ;
366- - u_co_8_i PADCELL_SIG_V + FIXED ( 2416000 5690000 ) FS ;
367- - u_co_clk_i PADCELL_SIG_V + FIXED ( 2016000 5690000 ) FS ;
368- - u_co_tkn_o PADCELL_SIG_V + FIXED ( 2066000 5690000 ) FS ;
369- - u_co_v_i PADCELL_SIG_V + FIXED ( 2116000 5690000 ) FS ;
359+ - u_co_1_i PADCELL_SIG_V + FIXED ( 1334000 5690000 ) FS ;
360+ - u_co_2_i PADCELL_SIG_V + FIXED ( 1476000 5690000 ) FS ;
361+ - u_co_3_i PADCELL_SIG_V + FIXED ( 1626000 5690000 ) FS ;
362+ - u_co_4_i PADCELL_SIG_V + FIXED ( 1928000 5690000 ) FS ;
363+ - u_co_5_i PADCELL_SIG_V + FIXED ( 2278000 5690000 ) FS ;
364+ - u_co_6_i PADCELL_SIG_V + FIXED ( 2378000 5690000 ) FS ;
365+ - u_co_7_i PADCELL_SIG_V + FIXED ( 2428000 5690000 ) FS ;
366+ - u_co_8_i PADCELL_SIG_V + FIXED ( 2478000 5690000 ) FS ;
367+ - u_co_clk_i PADCELL_SIG_V + FIXED ( 1978000 5690000 ) FS ;
368+ - u_co_tkn_o PADCELL_SIG_V + FIXED ( 2078000 5690000 ) FS ;
369+ - u_co_v_i PADCELL_SIG_V + FIXED ( 2128000 5690000 ) FS ;
370370 - u_core_async_reset_i PADCELL_SIG_V + FIXED ( 3858000 5690000 ) FS ;
371371 - u_ddr_addr_0_o PADCELL_SIG_V + FIXED ( 3434000 30000 ) N ;
372372 - u_ddr_addr_10_o PADCELL_SIG_V + FIXED ( 2056000 30000 ) N ;
@@ -440,10 +440,10 @@ COMPONENTS 543 ;
440440 - u_ddr_ras_n_o PADCELL_SIG_V + FIXED ( 3884000 30000 ) N ;
441441 - u_ddr_reset_n_o PADCELL_SIG_V + FIXED ( 3634000 30000 ) N ;
442442 - u_ddr_we_n_o PADCELL_SIG_V + FIXED ( 3684000 30000 ) N ;
443- - u_misc_o PADCELL_SIG_V + FIXED ( 3278000 5690000 ) FS ;
444- - u_sel_0_i PADCELL_SIG_V + FIXED ( 3328000 5690000 ) FS ;
445- - u_sel_1_i PADCELL_SIG_V + FIXED ( 3470000 5690000 ) FS ;
446- - u_sel_2_i PADCELL_SIG_V + FIXED ( 3620000 5690000 ) FS ;
443+ - u_misc_o PADCELL_SIG_V + FIXED ( 3384000 5690000 ) FS ;
444+ - u_sel_0_i PADCELL_SIG_V + FIXED ( 3434000 5690000 ) FS ;
445+ - u_sel_1_i PADCELL_SIG_V + FIXED ( 3484000 5690000 ) FS ;
446+ - u_sel_2_i PADCELL_SIG_V + FIXED ( 3634000 5690000 ) FS ;
447447 - u_v18_1 PADCELL_VDDIO_V + FIXED ( 1498000 30000 ) N ;
448448 - u_v18_10 PADCELL_VDDIO_H + FIXED ( 5690000 1744000 ) W ;
449449 - u_v18_11 PADCELL_VDDIO_H + FIXED ( 5690000 2044000 ) W ;
@@ -456,11 +456,11 @@ COMPONENTS 543 ;
456456 - u_v18_18 PADCELL_VDDIO_V + FIXED ( 4328000 5690000 ) FS ;
457457 - u_v18_19 PADCELL_VDDIO_V + FIXED ( 4008000 5690000 ) FS ;
458458 - u_v18_2 PADCELL_VDDIO_V + FIXED ( 1956000 30000 ) N ;
459- - u_v18_20 PADCELL_VDDIO_V + FIXED ( 3570000 5690000 ) FS ;
460- - u_v18_21 PADCELL_VDDIO_V + FIXED ( 2918000 5690000 ) FS ;
461- - u_v18_22 PADCELL_VDDIO_V + FIXED ( 2466000 5690000 ) FS ;
462- - u_v18_23 PADCELL_VDDIO_V + FIXED ( 2166000 5690000 ) FS ;
463- - u_v18_24 PADCELL_VDDIO_V + FIXED ( 1660000 5690000 ) FS ;
459+ - u_v18_20 PADCELL_VDDIO_V + FIXED ( 3584000 5690000 ) FS ;
460+ - u_v18_21 PADCELL_VDDIO_V + FIXED ( 3034000 5690000 ) FS ;
461+ - u_v18_22 PADCELL_VDDIO_V + FIXED ( 2528000 5690000 ) FS ;
462+ - u_v18_23 PADCELL_VDDIO_V + FIXED ( 2178000 5690000 ) FS ;
463+ - u_v18_24 PADCELL_VDDIO_V + FIXED ( 1676000 5690000 ) FS ;
464464 - u_v18_25 PADCELL_VDDIO_H + FIXED ( 420000 5690000 ) FS ;
465465 - u_v18_26 PADCELL_VDDIO_H + FIXED ( 30000 4558000 ) FW ;
466466 - u_v18_27 PADCELL_VDDIO_H + FIXED ( 30000 4156000 ) FW ;
@@ -477,8 +477,8 @@ COMPONENTS 543 ;
477477 - u_v18_8 PADCELL_VDDIO_V + FIXED ( 5640000 30000 ) N ;
478478 - u_v18_9 PADCELL_VDDIO_H + FIXED ( 5690000 1058000 ) W ;
479479 - u_vdd_1 PADCELL_VDD_V + FIXED ( 2106000 30000 ) N ;
480- - u_vdd_10 PADCELL_VDD_H + FIXED ( 2616000 5690000 ) FS ;
481- - u_vdd_11 PADCELL_VDD_H + FIXED ( 1524000 5690000 ) FS ;
480+ - u_vdd_10 PADCELL_VDD_H + FIXED ( 2776000 5690000 ) FS ;
481+ - u_vdd_11 PADCELL_VDD_H + FIXED ( 1576000 5690000 ) FS ;
482482 - u_vdd_12 PADCELL_VDD_H + FIXED ( 30000 4708000 ) FW ;
483483 - u_vdd_13 PADCELL_VDD_H + FIXED ( 30000 3648000 ) FW ;
484484 - u_vdd_14 PADCELL_VDD_H + FIXED ( 30000 2730000 ) FW ;
@@ -507,12 +507,12 @@ COMPONENTS 543 ;
507507 - u_vdd_6 PADCELL_VDD_V + FIXED ( 5690000 3334000 ) W ;
508508 - u_vdd_7 PADCELL_VDD_V + FIXED ( 5690000 4528000 ) W ;
509509 - u_vdd_8 PADCELL_VDD_H + FIXED ( 4650000 5690000 ) FS ;
510- - u_vdd_9 PADCELL_VDD_H + FIXED ( 3720000 5690000 ) FS ;
511- - u_vdd_pll PADCELL_VDD_V + FIXED ( 3118000 5690000 ) FS ;
510+ - u_vdd_9 PADCELL_VDD_H + FIXED ( 3734000 5690000 ) FS ;
511+ - u_vdd_pll PADCELL_VDD_V + FIXED ( 3234000 5690000 ) FS ;
512512 - u_vss_0 PADCELL_VSS_V + FIXED ( 986000 30000 ) N ;
513513 - u_vss_1 PADCELL_VSS_V + FIXED ( 2156000 30000 ) N ;
514- - u_vss_10 PADCELL_VSS_H + FIXED ( 2566000 5690000 ) FS ;
515- - u_vss_11 PADCELL_VSS_H + FIXED ( 1474000 5690000 ) FS ;
514+ - u_vss_10 PADCELL_VSS_H + FIXED ( 2726000 5690000 ) FS ;
515+ - u_vss_11 PADCELL_VSS_H + FIXED ( 1526000 5690000 ) FS ;
516516 - u_vss_12 PADCELL_VSS_H + FIXED ( 30000 4658000 ) FW ;
517517 - u_vss_13 PADCELL_VSS_H + FIXED ( 30000 3598000 ) FW ;
518518 - u_vss_14 PADCELL_VSS_H + FIXED ( 30000 2680000 ) FW ;
@@ -541,8 +541,8 @@ COMPONENTS 543 ;
541541 - u_vss_6 PADCELL_VSS_V + FIXED ( 5690000 3384000 ) W ;
542542 - u_vss_7 PADCELL_VSS_V + FIXED ( 5690000 4578000 ) W ;
543543 - u_vss_8 PADCELL_VSS_H + FIXED ( 4600000 5690000 ) FS ;
544- - u_vss_9 PADCELL_VSS_H + FIXED ( 3670000 5690000 ) FS ;
545- - u_vss_pll PADCELL_VSS_V + FIXED ( 3228000 5690000 ) FS ;
544+ - u_vss_9 PADCELL_VSS_H + FIXED ( 3684000 5690000 ) FS ;
545+ - u_vss_pll PADCELL_VSS_V + FIXED ( 3334000 5690000 ) FS ;
546546 - u_vzz_0 PADCELL_VSSIO_V + FIXED ( 706000 30000 ) N ;
547547 - u_vzz_1 PADCELL_VSSIO_V + FIXED ( 1448000 30000 ) N ;
548548 - u_vzz_10 PADCELL_VSSIO_H + FIXED ( 5690000 1694000 ) W ;
@@ -556,11 +556,11 @@ COMPONENTS 543 ;
556556 - u_vzz_18 PADCELL_VSSIO_V + FIXED ( 4378000 5690000 ) FS ;
557557 - u_vzz_19 PADCELL_VSSIO_V + FIXED ( 4058000 5690000 ) FS ;
558558 - u_vzz_2 PADCELL_VSSIO_V + FIXED ( 1906000 30000 ) N ;
559- - u_vzz_20 PADCELL_VSSIO_V + FIXED ( 3520000 5690000 ) FS ;
560- - u_vzz_21 PADCELL_VSSIO_V + FIXED ( 3018000 5690000 ) FS ;
561- - u_vzz_22 PADCELL_VSSIO_V + FIXED ( 2516000 5690000 ) FS ;
562- - u_vzz_23 PADCELL_VSSIO_V + FIXED ( 2216000 5690000 ) FS ;
563- - u_vzz_24 PADCELL_VSSIO_V + FIXED ( 1798000 5690000 ) FS ;
559+ - u_vzz_20 PADCELL_VSSIO_V + FIXED ( 3534000 5690000 ) FS ;
560+ - u_vzz_21 PADCELL_VSSIO_V + FIXED ( 3134000 5690000 ) FS ;
561+ - u_vzz_22 PADCELL_VSSIO_V + FIXED ( 2578000 5690000 ) FS ;
562+ - u_vzz_23 PADCELL_VSSIO_V + FIXED ( 2228000 5690000 ) FS ;
563+ - u_vzz_24 PADCELL_VSSIO_V + FIXED ( 1808000 5690000 ) FS ;
564564 - u_vzz_25 PADCELL_VSSIO_H + FIXED ( 470000 5690000 ) FS ;
565565 - u_vzz_26 PADCELL_VSSIO_H + FIXED ( 30000 4608000 ) FW ;
566566 - u_vzz_27 PADCELL_VSSIO_H + FIXED ( 30000 4206000 ) FW ;
@@ -705,7 +705,7 @@ PINS 135 ;
705705 - p_clk_C_i + NET p_clk_C_i + SPECIAL + DIRECTION INPUT + USE SIGNAL
706706 + PORT
707707 + LAYER metal10 ( -45000 -45000 ) ( 45000 45000 )
708- + FIXED ( 3025000 5595000 ) N ;
708+ + FIXED ( 2965000 5845000 ) N ;
709709 - p_clk_async_reset_i + NET p_clk_async_reset_i + SPECIAL + DIRECTION INPUT + USE SIGNAL
710710 + PORT
711711 + LAYER metal10 ( -45000 -45000 ) ( 45000 45000 )
@@ -789,7 +789,7 @@ PINS 135 ;
789789 - p_co_6_i + NET p_co_6_i + SPECIAL + DIRECTION INPUT + USE SIGNAL
790790 + PORT
791791 + LAYER metal10 ( -45000 -45000 ) ( 45000 45000 )
792- + FIXED ( 2385000 5595000 ) N ;
792+ + FIXED ( 2365000 5845000 ) N ;
793793 - p_co_7_i + NET p_co_7_i + SPECIAL + DIRECTION INPUT + USE SIGNAL
794794 + PORT
795795 + LAYER metal10 ( -45000 -45000 ) ( 45000 45000 )
@@ -805,7 +805,7 @@ PINS 135 ;
805805 - p_co_tkn_o + NET p_co_tkn_o + SPECIAL + DIRECTION OUTPUT + USE SIGNAL
806806 + PORT
807807 + LAYER metal10 ( -45000 -45000 ) ( 45000 45000 )
808- + FIXED ( 2065000 5595000 ) N ;
808+ + FIXED ( 2065000 5845000 ) N ;
809809 - p_co_v_i + NET p_co_v_i + SPECIAL + DIRECTION INPUT + USE SIGNAL
810810 + PORT
811811 + LAYER metal10 ( -45000 -45000 ) ( 45000 45000 )
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