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Added more remove_buffer test cases
Signed-off-by: Jaehyun Kim <[email protected]>
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5 files changed

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5 files changed

+245
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src/rsz/test/BUILD

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@@ -322,6 +322,9 @@ cc_test(
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"cpp/TestBufferRemoval3_4.v",
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"cpp/TestBufferRemoval3_5.v",
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"cpp/TestBufferRemoval3_6.v",
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"cpp/TestBufferRemoval3_7.v",
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"cpp/TestBufferRemoval3_8.v",
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"cpp/TestBufferRemoval3_9.v",
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],
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deps = [
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"//src/dbSta",

src/rsz/test/cpp/TestBufferRemoval3.cc

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@@ -30,6 +30,212 @@ class BufRemTest3 : public tst::IntegratedFixture
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bool debug_ = false; // Set to true to generate debug output
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};
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TEST_F(BufRemTest3, RemoveBufferCase9)
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{
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std::string test_name = "TestBufferRemoval3_9";
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readVerilogAndSetup(test_name + ".v");
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// Netlist before buffer removal:
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// (undriven input) -> buf1 -> out
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// Dump pre ECO state
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if (debug_) {
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dumpVerilogAndOdb(test_name + "_pre_eco");
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}
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odb::dbDatabase::beginEco(block_);
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// Pre sanity check
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sta_->updateTiming(true);
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// Do not call checkAxioms() because there is an undriven buffer.
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//----------------------------------------------------
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// Remove buffer
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//----------------------------------------------------
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auto insts = std::make_unique<sta::InstanceSeq>();
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odb::dbInst* buf_inst = block_->findInst("buf1");
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ASSERT_NE(buf_inst, nullptr);
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sta::Instance* sta_buf = db_network_->dbToSta(buf_inst);
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insts->emplace_back(sta_buf);
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resizer_.removeBuffers(*insts);
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// Post sanity check
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sta_->updateTiming(true);
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// Do not call checkAxioms() because there is an undriven buffer.
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// Write verilog and check the content after buffer removal
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const std::string after_vlog_path = test_name + "_after.v";
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sta::writeVerilog(after_vlog_path.c_str(), true, false, {}, sta_->network());
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std::ifstream file_after(after_vlog_path);
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std::string content_after((std::istreambuf_iterator<char>(file_after)),
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std::istreambuf_iterator<char>());
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// Netlist after buffer removal:
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// in -> mod_inst/mod_in -> assign -> mod_inst/mod_out -> out
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const std::string expected_after_vlog = R"(module top (clk,
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in,
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out);
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input clk;
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input in;
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output out;
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endmodule
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)";
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EXPECT_EQ(content_after, expected_after_vlog);
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odb::dbDatabase::undoEco(block_);
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// Dump undo ECO state
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if (debug_) {
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dumpVerilogAndOdb(test_name + "_undo_eco");
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}
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// Clean up
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removeFile(after_vlog_path);
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}
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TEST_F(BufRemTest3, RemoveBufferCase8)
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{
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std::string test_name = "TestBufferRemoval3_8";
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readVerilogAndSetup(test_name + ".v");
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// Netlist before buffer removal:
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// (undriven input) -> buf1 -> out
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// Dump pre ECO state
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if (debug_) {
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dumpVerilogAndOdb(test_name + "_pre_eco");
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}
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odb::dbDatabase::beginEco(block_);
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// Pre sanity check
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sta_->updateTiming(true);
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// Do not call checkAxioms() because there is an undriven buffer.
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//----------------------------------------------------
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// Remove buffer
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//----------------------------------------------------
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auto insts = std::make_unique<sta::InstanceSeq>();
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odb::dbInst* buf_inst = block_->findInst("buf1");
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ASSERT_NE(buf_inst, nullptr);
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sta::Instance* sta_buf = db_network_->dbToSta(buf_inst);
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insts->emplace_back(sta_buf);
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resizer_.removeBuffers(*insts);
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// Post sanity check
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sta_->updateTiming(true);
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// Do not call checkAxioms() because there is an undriven buffer.
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// Write verilog and check the content after buffer removal
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const std::string after_vlog_path = test_name + "_after.v";
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sta::writeVerilog(after_vlog_path.c_str(), true, false, {}, sta_->network());
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std::ifstream file_after(after_vlog_path);
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std::string content_after((std::istreambuf_iterator<char>(file_after)),
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std::istreambuf_iterator<char>());
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// Netlist after buffer removal:
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// in -> mod_inst/mod_in -> assign -> mod_inst/mod_out -> out
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const std::string expected_after_vlog = R"(module top (clk,
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in,
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out);
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input clk;
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input in;
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output out;
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BUF_X1 buf1 (.Z(out));
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endmodule
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)";
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EXPECT_EQ(content_after, expected_after_vlog);
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odb::dbDatabase::undoEco(block_);
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// Dump undo ECO state
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if (debug_) {
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dumpVerilogAndOdb(test_name + "_undo_eco");
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}
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// Clean up
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removeFile(after_vlog_path);
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}
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TEST_F(BufRemTest3, RemoveBufferCase7)
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{
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std::string test_name = "TestBufferRemoval3_7";
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readVerilogAndSetup(test_name + ".v");
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// Netlist before buffer removal:
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// (undriven input) -> buf1 -> buf2 -> out
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// Dump pre ECO state
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if (debug_) {
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dumpVerilogAndOdb(test_name + "_pre_eco");
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}
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odb::dbDatabase::beginEco(block_);
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// Pre sanity check
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sta_->updateTiming(true);
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// Do not call checkAxioms() because there is an undriven buffer.
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//----------------------------------------------------
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// Remove buffer
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//----------------------------------------------------
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auto insts = std::make_unique<sta::InstanceSeq>();
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odb::dbInst* buf_inst = block_->findInst("buf1");
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ASSERT_NE(buf_inst, nullptr);
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sta::Instance* sta_buf = db_network_->dbToSta(buf_inst);
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insts->emplace_back(sta_buf);
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resizer_.removeBuffers(*insts);
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// Post sanity check
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sta_->updateTiming(true);
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// Do not call checkAxioms() because there is an undriven buffer.
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// Write verilog and check the content after buffer removal
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const std::string after_vlog_path = test_name + "_after.v";
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sta::writeVerilog(after_vlog_path.c_str(), true, false, {}, sta_->network());
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std::ifstream file_after(after_vlog_path);
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std::string content_after((std::istreambuf_iterator<char>(file_after)),
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std::istreambuf_iterator<char>());
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// Netlist after buffer removal:
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// in -> mod_inst/mod_in -> assign -> mod_inst/mod_out -> out
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const std::string expected_after_vlog = R"(module top (clk,
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in,
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out);
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input clk;
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input in;
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output out;
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wire n1;
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BUF_X1 buf1 (.Z(n1));
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BUF_X1 buf2 (.A(n1),
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.Z(out));
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endmodule
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)";
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EXPECT_EQ(content_after, expected_after_vlog);
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odb::dbDatabase::undoEco(block_);
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// Dump undo ECO state
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if (debug_) {
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dumpVerilogAndOdb(test_name + "_undo_eco");
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}
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// Clean up
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removeFile(after_vlog_path);
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}
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TEST_F(BufRemTest3, RemoveBufferCase6)
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{
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std::string test_name = "TestBufferRemoval3_6";
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@@ -0,0 +1,13 @@
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// SPDX-License-Identifier: BSD-3-Clause
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// Copyright (c) 2024, The OpenROAD Authors
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module top (
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input clk,
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input in,
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output out
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);
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wire n1;
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BUF_X1 buf1 (.Z(n1));
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BUF_X1 buf2 (.A(n1), .Z(out));
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endmodule
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// SPDX-License-Identifier: BSD-3-Clause
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// Copyright (c) 2024, The OpenROAD Authors
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module top (
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input clk,
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input in,
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output out
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);
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BUF_X1 buf1 (.Z(out));
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endmodule
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// SPDX-License-Identifier: BSD-3-Clause
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// Copyright (c) 2024, The OpenROAD Authors
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module top (
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input clk,
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input in,
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output out
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);
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wire n1;
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BUF_X1 buf1 (.A(n1), .Z(out));
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endmodule

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