Merge pull request #8925 from The-OpenROAD-Project-staging/abc-update

maliberty · web-flow · commit ecf1eea9d789 · 2025-12-01T03:09:41.000-08:00
update the abc submodule (and rmp .ok)
diff --git a/src/rmp/test/aes_annealing.ok b/src/rmp/test/aes_annealing.ok
@@ -89,31 +89,31 @@ tns max -191.30
 
 Derived GENLIB library "asap7sc7p5t_AO_RVT_SS_nldm_211120" with 169 gates.
 [INFO RMP-0052] Resynthesis: starting simulated annealing
-[INFO RMP-0053] Initial temperature: 9.712329e-10, worst slack: 3.157022e-10
-[INFO RMP-0054] Iteration: 10, temperature: 6.79863e-10, best worst slack: 3.344247e-10
-[INFO RMP-0054] Iteration: 20, temperature: 3.5611872e-10, best worst slack: 3.8375575e-10
-[INFO RMP-0054] Iteration: 30, temperature: 3.237443e-11, best worst slack: 3.9578357e-10
+[INFO RMP-0053] Initial temperature: 9.711085e-10, worst slack: 3.217278e-10
+[INFO RMP-0054] Iteration: 10, temperature: 6.7977596e-10, best worst slack: 3.3161102e-10
+[INFO RMP-0054] Iteration: 20, temperature: 3.5607314e-10, best worst slack: 3.6308723e-10
+[INFO RMP-0054] Iteration: 30, temperature: 3.2370287e-11, best worst slack: 3.6308723e-10
 [INFO RMP-0055] Resynthesis: End of simulated annealing, applying operations
 [INFO RMP-0056] Resynthesis: Applying ABC operations
-[ 14.281,  95.583): ******* (30)
-[ 95.583, 176.886): **************************** (122)
-[176.886, 258.189): ** (8)
-[258.189, 339.492):  (0)
-[339.492, 420.795):  (0)
-[420.795, 502.097): ************************************************** (221)
-[502.097, 583.400): *********** (48)
-[583.400, 664.703): * (3)
-[664.703, 746.006): ***************************** (130)
-[746.006, 827.309]: ***************************** (129)
+[-96.474,  -4.095): *** (15)
+[ -4.095,  88.283): *** (13)
+[ 88.283, 180.661): ************************* (124)
+[180.661, 273.039): ** (8)
+[273.039, 365.418):  (0)
+[365.418, 457.796): * (6)
+[457.796, 550.174): ************************************************** (250)
+[550.174, 642.552): *** (16)
+[642.552, 734.930): ************************** (130)
+[734.930, 827.309]: ************************** (129)
 Cell type report:                       Count       Area
   Buffer                                  990      72.03
-  Inverter                                596      26.80
+  Inverter                                585      26.21
   Sequential cell                         562     163.88
-  Multi-Input combinational cell        10198    1054.29
-  Total                                 12346    1317.00
-Startpoint: u0/w[0][1]$_DFF_P_
+  Multi-Input combinational cell        10172    1054.02
+  Total                                 12309    1316.14
+Startpoint: u0/w[0][9]$_DFF_P_
             (rising edge-triggered flip-flop clocked by core_clock)
-Endpoint: u0/subword[8]$_DFF_P_
+Endpoint: u0/subword[19]$_DFF_P_
           (rising edge-triggered flip-flop clocked by core_clock)
 Path Group: core_clock
 Path Type: max
@@ -123,43 +123,40 @@ Corner: slow
 ---------------------------------------------------------
    0.00    0.00   clock core_clock (rise edge)
    0.00    0.00   clock network delay (ideal)
-   0.00    0.00 ^ u0/w[0][1]$_DFF_P_/CLK (DFFHQNx1_ASAP7_75t_R)
-  84.80   84.80 ^ u0/w[0][1]$_DFF_P_/QN (DFFHQNx1_ASAP7_75t_R)
-  56.35  141.15 ^ cut_74716/Y (XOR2xp5_ASAP7_75t_R)
-  74.24  215.39 ^ cut_74717/Y (XOR2xp5_ASAP7_75t_R)
-  47.20  262.59 ^ cut_74718/Y (XOR2xp5_ASAP7_75t_R)
-  41.79  304.39 v cut_74720/Y (AOI21xp33_ASAP7_75t_R)
-  74.12  378.51 ^ cut_74721/Y (INVx1_ASAP7_75t_R)
-  84.57  463.08 v _13443_/Y (INVx1_ASAP7_75t_R)
- 120.05  583.13 v _23153_/SN (HAxp5_ASAP7_75t_R)
-  37.17  620.30 ^ cut_74624/Y (INVx1_ASAP7_75t_R)
-  46.92  667.21 v cut_74738/Y (NOR2xp33_ASAP7_75t_R)
-  45.81  713.02 ^ cut_74764/Y (NOR2xp33_ASAP7_75t_R)
-  35.20  748.23 v cut_74765/Y (INVx1_ASAP7_75t_R)
-  23.56  771.78 ^ cut_74766/Y (NOR2xp33_ASAP7_75t_R)
-  20.95  792.74 v cut_74767/Y (NOR2xp33_ASAP7_75t_R)
-  23.66  816.40 ^ cut_74769/Y (NAND2xp33_ASAP7_75t_R)
-  17.18  833.58 v cut_74770/Y (NAND2xp33_ASAP7_75t_R)
-  21.14  854.71 ^ cut_74772/Y (NAND2xp33_ASAP7_75t_R)
-  26.69  881.40 v cut_74788/Y (NOR2xp33_ASAP7_75t_R)
-  20.39  901.79 ^ cut_74819/Y (NOR2xp33_ASAP7_75t_R)
-  19.61  921.39 v cut_74820/Y (NOR2xp33_ASAP7_75t_R)
-  33.94  955.33 ^ cut_74821/Y (NOR2xp33_ASAP7_75t_R)
-   0.00  955.33 ^ u0/subword[8]$_DFF_P_/D (DFFHQNx1_ASAP7_75t_R)
-         955.33   data arrival time
+   0.00    0.00 ^ u0/w[0][9]$_DFF_P_/CLK (DFFHQNx1_ASAP7_75t_R)
+  84.80   84.80 ^ u0/w[0][9]$_DFF_P_/QN (DFFHQNx1_ASAP7_75t_R)
+  56.35  141.15 ^ cut_69476/Y (XOR2xp5_ASAP7_75t_R)
+  74.24  215.39 ^ cut_69477/Y (XOR2xp5_ASAP7_75t_R)
+  31.14  246.53 v cut_69478/Y (XOR2xp5_ASAP7_75t_R)
+ 227.84  474.37 ^ cut_69480/Y (AOI21xp33_ASAP7_75t_R)
+ 165.08  639.45 v cut_69567/Y (INVx1_ASAP7_75t_R)
+  83.44  722.89 ^ _23145_/CON (HAxp5_ASAP7_75t_R)
+  56.78  779.67 v cut_69512/Y (NAND2xp33_ASAP7_75t_R)
+  23.85  803.52 ^ cut_69513/Y (INVx1_ASAP7_75t_R)
+  20.96  824.49 v cut_69514/Y (NAND2xp33_ASAP7_75t_R)
+  64.16  888.65 ^ cut_69515/Y (NAND2xp33_ASAP7_75t_R)
+  38.95  927.60 v cut_69820/Y (NOR2xp33_ASAP7_75t_R)
+  38.27  965.87 v cut_69821/Y (AO21x1_ASAP7_75t_R)
+  17.31  983.17 ^ cut_69827/Y (NOR2xp33_ASAP7_75t_R)
+  20.54 1003.71 v cut_69830/Y (NOR2xp33_ASAP7_75t_R)
+  20.10 1023.81 ^ cut_69831/Y (NOR2xp33_ASAP7_75t_R)
+  18.94 1042.75 v cut_69832/Y (NOR2xp33_ASAP7_75t_R)
+  23.90 1066.65 ^ cut_69865/Y (NOR2xp33_ASAP7_75t_R)
+   0.00 1066.65 ^ u0/subword[19]$_DFF_P_/D (DFFHQNx1_ASAP7_75t_R)
+        1066.65   data arrival time
 
 1000.00 1000.00   clock core_clock (rise edge)
    0.00 1000.00   clock network delay (ideal)
    0.00 1000.00   clock reconvergence pessimism
-        1000.00 ^ u0/subword[8]$_DFF_P_/CLK (DFFHQNx1_ASAP7_75t_R)
- -30.39  969.61   library setup time
-         969.61   data required time
+        1000.00 ^ u0/subword[19]$_DFF_P_/CLK (DFFHQNx1_ASAP7_75t_R)
+ -29.82  970.18   library setup time
+         970.18   data required time
 ---------------------------------------------------------
-         969.61   data required time
-        -955.33   data arrival time
+         970.18   data required time
+        -1066.65   data arrival time
 ---------------------------------------------------------
-          14.28   slack (MET)
+         -96.47   slack (VIOLATED)
 
 
-wns max 0.00
-tns max 0.00
+wns max -96.47
+tns max -686.58
diff --git a/src/rmp/test/const_cell_removal.ok b/src/rmp/test/const_cell_removal.ok
diff --git a/src/rmp/test/gcd_annealing1.ok b/src/rmp/test/gcd_annealing1.ok
@@ -98,49 +98,42 @@ tns max -15641.01
 Derived GENLIB library "asap7sc7p5t_AO_RVT_SS_nldm_211120" with 169 gates.
 [INFO RMP-0052] Resynthesis: starting simulated annealing
 [INFO RMP-0053] Initial temperature: 4.710931e-10, worst slack: -1.0941836e-10
-[INFO RMP-0054] Iteration: 10, temperature: 4.2869475e-10, best worst slack: -4.645495e-11
+[INFO RMP-0054] Iteration: 10, temperature: 4.2869475e-10, best worst slack: -1.021046e-10
 [INFO RMP-0057] Reverting to the best found solution
-[INFO RMP-0054] Iteration: 20, temperature: 3.8158543e-10, best worst slack: -4.645495e-11
+[INFO RMP-0054] Iteration: 20, temperature: 3.8158543e-10, best worst slack: -1.021046e-10
 [INFO RMP-0057] Reverting to the best found solution
-[INFO RMP-0054] Iteration: 30, temperature: 3.3447609e-10, best worst slack: 1.0340384e-10
+[INFO RMP-0054] Iteration: 30, temperature: 3.3447609e-10, best worst slack: -9.598228e-11
+[INFO RMP-0054] Iteration: 40, temperature: 2.873668e-10, best worst slack: -9.598228e-11
 [INFO RMP-0057] Reverting to the best found solution
+[INFO RMP-0054] Iteration: 50, temperature: 2.4025748e-10, best worst slack: 4.297157e-11
 [INFO RMP-0057] Reverting to the best found solution
-[INFO RMP-0054] Iteration: 40, temperature: 2.873668e-10, best worst slack: 1.0340384e-10
+[INFO RMP-0054] Iteration: 60, temperature: 1.9314818e-10, best worst slack: 6.026227e-11
+[INFO RMP-0054] Iteration: 70, temperature: 1.4603886e-10, best worst slack: 1.1420273e-10
 [INFO RMP-0057] Reverting to the best found solution
+[INFO RMP-0054] Iteration: 80, temperature: 9.892955e-11, best worst slack: 1.3698773e-10
+[INFO RMP-0054] Iteration: 90, temperature: 5.1820243e-11, best worst slack: 1.448843e-10
 [INFO RMP-0057] Reverting to the best found solution
-[INFO RMP-0054] Iteration: 50, temperature: 2.4025748e-10, best worst slack: 1.0340384e-10
-[INFO RMP-0057] Reverting to the best found solution
-[INFO RMP-0054] Iteration: 60, temperature: 1.9314818e-10, best worst slack: 1.0340384e-10
-[INFO RMP-0057] Reverting to the best found solution
-[INFO RMP-0057] Reverting to the best found solution
-[INFO RMP-0054] Iteration: 70, temperature: 1.4603886e-10, best worst slack: 1.0359913e-10
-[INFO RMP-0057] Reverting to the best found solution
-[INFO RMP-0054] Iteration: 80, temperature: 9.892955e-11, best worst slack: 1.3306825e-10
-[INFO RMP-0057] Reverting to the best found solution
-[INFO RMP-0054] Iteration: 90, temperature: 5.1820243e-11, best worst slack: 1.4056589e-10
-[INFO RMP-0057] Reverting to the best found solution
-[INFO RMP-0057] Reverting to the best found solution
-[INFO RMP-0054] Iteration: 100, temperature: 4.710931e-12, best worst slack: 1.4056589e-10
+[INFO RMP-0054] Iteration: 100, temperature: 4.710931e-12, best worst slack: 1.448843e-10
 [INFO RMP-0055] Resynthesis: End of simulated annealing, applying operations
 [INFO RMP-0056] Resynthesis: Applying ABC operations
-[-98.726, -62.245): ************************************************** (35)
-[-62.245, -25.764): ********** (7)
-[-25.764,  10.717): **** (3)
-[ 10.717,  47.198):  (0)
-[ 47.198,  83.679): * (1)
-[ 83.679, 120.160): *** (2)
-[120.160, 156.641): **** (3)
-[156.641, 193.122): * (1)
-[193.122, 229.603):  (0)
-[229.603, 266.084]: * (1)
+[-151.354, -114.763): ************************************************** (31)
+[-114.763,  -78.172): ***** (3)
+[ -78.172,  -41.581): *********** (7)
+[ -41.581,   -4.990): ***** (3)
+[  -4.990,   31.601): ****** (4)
+[  31.601,   68.192):  (0)
+[  68.192,  104.783): ***** (3)
+[ 104.783,  141.374):  (0)
+[ 141.374,  177.965):  (0)
+[ 177.965,  214.556]: *** (2)
 Cell type report:                       Count       Area
-  Inverter                                 73       3.66
+  Inverter                                 86       5.15
   Sequential cell                          35      10.21
-  Multi-Input combinational cell          383      28.11
-  Total                                   491      41.98
-Startpoint: dpath/a_lt_b$in0[8]$_DFFE_PP_
+  Multi-Input combinational cell          343      26.99
+  Total                                   464      42.34
+Startpoint: dpath/a_lt_b$in0[12]$_DFFE_PP_
             (rising edge-triggered flip-flop clocked by core_clock)
-Endpoint: dpath/a_lt_b$in1[10]$_DFFE_PP_
+Endpoint: dpath/a_lt_b$in1[12]$_DFFE_PP_
           (rising edge-triggered flip-flop clocked by core_clock)
 Path Group: core_clock
 Path Type: max
@@ -150,36 +143,38 @@ Corner: slow
 ---------------------------------------------------------
    0.00    0.00   clock core_clock (rise edge)
    0.00    0.00   clock network delay (ideal)
-   0.00    0.00 ^ dpath/a_lt_b$in0[8]$_DFFE_PP_/CLK (DFFHQNx1_ASAP7_75t_R)
-  75.55   75.55 ^ dpath/a_lt_b$in0[8]$_DFFE_PP_/QN (DFFHQNx1_ASAP7_75t_R)
-  21.58   97.13 v cut_65225/Y (INVx1_ASAP7_75t_R)
- 137.55  234.69 v _429_/SN (HAxp5_ASAP7_75t_R)
-  22.14  256.82 ^ cut_64992/Y (NOR2x1p5_ASAP7_75t_R)
-  38.87  295.69 v cut_64994/Y (NOR2xp33_ASAP7_75t_R)
-  31.96  327.65 ^ cut_64995/Y (NOR2x1_ASAP7_75t_R)
-  24.98  352.63 v cut_64996/Y (NOR2x1_ASAP7_75t_R)
-  28.11  380.74 ^ cut_64997/Y (NAND2xp5_ASAP7_75t_R)
-  28.54  409.28 v cut_65020/Y (NOR2x1p5_ASAP7_75t_R)
-  32.03  441.31 ^ cut_65021/Y (NOR2x2_ASAP7_75t_R)
-  17.62  458.92 v cut_65036/Y (NAND2x1p5_ASAP7_75t_R)
-  58.46  517.38 ^ cut_65037/Y (NAND2x1_ASAP7_75t_R)
-  25.10  542.49 v cut_65088/Y (NAND2xp33_ASAP7_75t_R)
-  26.42  568.91 ^ cut_65089/Y (NAND2xp33_ASAP7_75t_R)
-   0.00  568.91 ^ dpath/a_lt_b$in1[10]$_DFFE_PP_/D (DFFHQNx1_ASAP7_75t_R)
-         568.91   data arrival time
+   0.00    0.00 ^ dpath/a_lt_b$in0[12]$_DFFE_PP_/CLK (DFFHQNx1_ASAP7_75t_R)
+  65.59   65.59 ^ dpath/a_lt_b$in0[12]$_DFFE_PP_/QN (DFFHQNx1_ASAP7_75t_R)
+  19.55   85.13 v cut_63656/Y (INVx1_ASAP7_75t_R)
+ 201.36  286.50 v _425_/SN (HAxp5_ASAP7_75t_R)
+  27.39  313.89 ^ cut_63538/Y (CKINVDCx10_ASAP7_75t_R)
+  18.50  332.38 v cut_63539/Y (NAND2x1p5_ASAP7_75t_R)
+  22.56  354.95 ^ cut_63540/Y (INVx1_ASAP7_75t_R)
+  17.76  372.70 v cut_63541/Y (NAND2x1p5_ASAP7_75t_R)
+  19.90  392.61 ^ cut_63545/Y (NOR2x1p5_ASAP7_75t_R)
+  20.99  413.59 v cut_63546/Y (NAND2xp5_ASAP7_75t_R)
+  26.93  440.52 ^ cut_63547/Y (NAND2x1_ASAP7_75t_R)
+  30.34  470.86 v cut_63572/Y (NOR2x1_ASAP7_75t_R)
+  32.86  503.72 ^ cut_63573/Y (NAND2x1p5_ASAP7_75t_R)
+  21.20  524.92 v cut_63597/Y (NAND2x1p5_ASAP7_75t_R)
+  47.73  572.65 ^ cut_63598/Y (NAND2x2_ASAP7_75t_R)
+  23.40  596.05 v cut_63659/Y (NAND2xp33_ASAP7_75t_R)
+  25.54  621.59 ^ cut_63660/Y (NAND2xp33_ASAP7_75t_R)
+   0.00  621.59 ^ dpath/a_lt_b$in1[12]$_DFFE_PP_/D (DFFHQNx1_ASAP7_75t_R)
+         621.59   data arrival time
 
  500.00  500.00   clock core_clock (rise edge)
    0.00  500.00   clock network delay (ideal)
    0.00  500.00   clock reconvergence pessimism
-         500.00 ^ dpath/a_lt_b$in1[10]$_DFFE_PP_/CLK (DFFHQNx1_ASAP7_75t_R)
- -29.82  470.18   library setup time
-         470.18   data required time
+         500.00 ^ dpath/a_lt_b$in1[12]$_DFFE_PP_/CLK (DFFHQNx1_ASAP7_75t_R)
+ -29.77  470.23   library setup time
+         470.23   data required time
 ---------------------------------------------------------
-         470.18   data required time
-        -568.91   data arrival time
+         470.23   data required time
+        -621.59   data arrival time
 ---------------------------------------------------------
-         -98.73   slack (VIOLATED)
+        -151.35   slack (VIOLATED)
 
 
-wns max -98.73
-tns max -3434.68
+wns max -151.35
+tns max -5188.85
diff --git a/src/rmp/test/gcd_annealing2.ok b/src/rmp/test/gcd_annealing2.ok
@@ -98,36 +98,36 @@ tns max -15641.01
 Derived GENLIB library "asap7sc7p5t_AO_RVT_SS_nldm_211120" with 169 gates.
 [INFO RMP-0052] Resynthesis: starting simulated annealing
 [INFO RMP-0053] Initial temperature: 1e-10, worst slack: -1.0941836e-10
-[INFO RMP-0054] Iteration: 10, temperature: 9.1000006e-11, best worst slack: -4.645495e-11
-[INFO RMP-0054] Iteration: 20, temperature: 8.1e-11, best worst slack: 3.401074e-11
-[INFO RMP-0054] Iteration: 30, temperature: 7.1e-11, best worst slack: 1.0621096e-10
-[INFO RMP-0054] Iteration: 40, temperature: 6.1000004e-11, best worst slack: 1.0704734e-10
-[INFO RMP-0054] Iteration: 50, temperature: 5.1e-11, best worst slack: 1.0704734e-10
-[INFO RMP-0054] Iteration: 60, temperature: 4.1e-11, best worst slack: 1.3240287e-10
-[INFO RMP-0054] Iteration: 70, temperature: 3.1e-11, best worst slack: 1.3467072e-10
-[INFO RMP-0054] Iteration: 80, temperature: 2.1e-11, best worst slack: 1.6515597e-10
-[INFO RMP-0054] Iteration: 90, temperature: 1.1e-11, best worst slack: 1.6515597e-10
-[INFO RMP-0054] Iteration: 100, temperature: 1e-12, best worst slack: 1.6515597e-10
+[INFO RMP-0054] Iteration: 10, temperature: 9.1000006e-11, best worst slack: -1.02104936e-10
+[INFO RMP-0054] Iteration: 20, temperature: 8.1e-11, best worst slack: 8.012241e-11
+[INFO RMP-0054] Iteration: 30, temperature: 7.1e-11, best worst slack: 1.09160875e-10
+[INFO RMP-0054] Iteration: 40, temperature: 6.1000004e-11, best worst slack: 1.09160875e-10
+[INFO RMP-0054] Iteration: 50, temperature: 5.1e-11, best worst slack: 1.6228e-10
+[INFO RMP-0054] Iteration: 60, temperature: 4.1e-11, best worst slack: 1.6228e-10
+[INFO RMP-0054] Iteration: 70, temperature: 3.1e-11, best worst slack: 1.6228e-10
+[INFO RMP-0054] Iteration: 80, temperature: 2.1e-11, best worst slack: 1.6228e-10
+[INFO RMP-0054] Iteration: 90, temperature: 1.1e-11, best worst slack: 1.6228e-10
+[INFO RMP-0054] Iteration: 100, temperature: 1e-12, best worst slack: 1.6228e-10
 [INFO RMP-0055] Resynthesis: End of simulated annealing, applying operations
 [INFO RMP-0056] Resynthesis: Applying ABC operations
-[-36.203,  -6.653): ************************************************** (39)
-[ -6.653,  22.897): **** (3)
-[ 22.897,  52.448): * (1)
-[ 52.448,  81.998): **** (3)
-[ 81.998, 111.549): * (1)
-[111.549, 141.099): **** (3)
-[141.099, 170.649): * (1)
-[170.649, 200.200): * (1)
-[200.200, 229.750):  (0)
-[229.750, 259.301]: * (1)
+[-47.697, -16.477): ************************************************** (37)
+[-16.477,  14.742): ******* (5)
+[ 14.742,  45.962): ***** (4)
+[ 45.962,  77.181): * (1)
+[ 77.181, 108.401): *** (2)
+[108.401, 139.620):  (0)
+[139.620, 170.839): *** (2)
+[170.839, 202.059): * (1)
+[202.059, 233.278):  (0)
+[233.278, 264.498]: * (1)
 Cell type report:                       Count       Area
-  Inverter                                 52       2.84
+  Inverter                                 62       3.11
   Sequential cell                          35      10.21
-  Multi-Input combinational cell          423      29.96
-  Total                                   510      43.01
+  Multi-Input combinational cell          385      28.17
+  Total                                   482      41.48
 Startpoint: dpath/a_lt_b$in0[8]$_DFFE_PP_
             (rising edge-triggered flip-flop clocked by core_clock)
-Endpoint: resp_msg[9] (output port clocked by core_clock)
+Endpoint: resp_msg[15] (output port clocked by core_clock)
 Path Group: core_clock
 Path Type: max
 Corner: slow
@@ -137,18 +137,20 @@ Corner: slow
    0.00    0.00   clock core_clock (rise edge)
    0.00    0.00   clock network delay (ideal)
    0.00    0.00 ^ dpath/a_lt_b$in0[8]$_DFFE_PP_/CLK (DFFHQNx1_ASAP7_75t_R)
-  72.75   72.75 ^ dpath/a_lt_b$in0[8]$_DFFE_PP_/QN (DFFHQNx1_ASAP7_75t_R)
-  18.04   90.80 v cut_72268/Y (INVx1_ASAP7_75t_R)
- 112.12  202.92 v _429_/SN (HAxp5_ASAP7_75t_R)
-  53.71  256.62 v cut_71866/Y (OR2x2_ASAP7_75t_R)
-  23.42  280.04 ^ cut_72132/Y (NOR2xp33_ASAP7_75t_R)
-  19.48  299.52 v cut_72133/Y (INVx1_ASAP7_75t_R)
-  35.29  334.81 v cut_72134/Y (OR2x2_ASAP7_75t_R)
-  29.68  364.50 ^ cut_72136/Y (NOR2xp33_ASAP7_75t_R)
-  37.11  401.61 v cut_72137/Y (NOR2xp33_ASAP7_75t_R)
-  34.60  436.20 v cut_72138/Y (XOR2xp5_ASAP7_75t_R)
-   0.00  436.20 v resp_msg[9] (out)
-         436.20   data arrival time
+  73.77   73.77 v dpath/a_lt_b$in0[8]$_DFFE_PP_/QN (DFFHQNx1_ASAP7_75t_R)
+  20.38   94.15 ^ cut_76928/Y (INVx1_ASAP7_75t_R)
+  75.10  169.25 ^ _429_/SN (HAxp5_ASAP7_75t_R)
+  49.22  218.47 ^ cut_76540/Y (OR2x2_ASAP7_75t_R)
+  20.78  239.25 v cut_76807/Y (NOR2xp33_ASAP7_75t_R)
+  39.22  278.46 v cut_76808/Y (OR2x2_ASAP7_75t_R)
+  35.69  314.16 v cut_76832/Y (OR2x2_ASAP7_75t_R)
+  33.21  347.37 v cut_76909/Y (OR2x2_ASAP7_75t_R)
+  17.13  364.50 ^ cut_76910/Y (NOR2xp33_ASAP7_75t_R)
+  27.19  391.69 v cut_76911/Y (NOR2xp33_ASAP7_75t_R)
+  39.00  430.68 v cut_76914/Y (OR2x2_ASAP7_75t_R)
+  17.01  447.70 ^ cut_76915/Y (NAND2xp33_ASAP7_75t_R)
+   0.00  447.70 ^ resp_msg[15] (out)
+         447.70   data arrival time
 
  500.00  500.00   clock core_clock (rise edge)
    0.00  500.00   clock network delay (ideal)
@@ -157,10 +159,10 @@ Corner: slow
          400.00   data required time
 ---------------------------------------------------------
          400.00   data required time
-        -436.20   data arrival time
+        -447.70   data arrival time
 ---------------------------------------------------------
-         -36.20   slack (VIOLATED)
+         -47.70   slack (VIOLATED)
 
 
-wns max -36.20
-tns max -777.64
+wns max -47.70
+tns max -1112.78
diff --git a/src/rmp/test/gcd_restructure.ok b/src/rmp/test/gcd_restructure.ok
diff --git a/third-party/abc b/third-party/abc
@@ -1 +1 @@
-Subproject commit 30d93e4e55c5ca63568534d5e38b8dd0f2d4f8ef
+Subproject commit 8adf31774762ba1e37818e25b5ecb5916607c9c6
