Merge pull request #291 from The-OpenROAD-Project/ord_flow_clear

Ord flow clear

Author: jjcherry56

src/OpenRoad.cc

@@ -219,7 +219,9 @@ OpenRoad::readLef(const char *filename,
 }
 
 void
-OpenRoad::readDef(const char *filename, bool order_wires, bool continue_on_errors)
+OpenRoad::readDef(const char *filename,
+		  bool order_wires,
+		  bool continue_on_errors)
 {
   odb::defin def_reader(db_);
   std::vector<odb::dbLib *> search_libs;
@@ -229,18 +231,17 @@ OpenRoad::readDef(const char *filename, bool order_wires, bool continue_on_error
     def_reader.continueOnErrors();
   }
   dbChip* chip = def_reader.createChip(search_libs, filename);
-  if (chip == nullptr) { // parser failed
-    return;
-  }
-  dbBlock* block = chip->getBlock();
-  if (order_wires) {
-    odb::orderWires(block,
-                    nullptr /* net_name_or_id*/,
-                    false /* force */);
-  }
+  if (chip) {
+    dbBlock* block = chip->getBlock();
+    if (order_wires) {
+      odb::orderWires(block,
+		      nullptr /* net_name_or_id*/,
+		      false /* force */);
+    }
 
-  for (Observer* observer : observers_) {
-    observer->postReadDef(block);
+    for (Observer* observer : observers_) {
+      observer->postReadDef(block);
+    }
   }
 }
 

src/OpenRoad.tcl

@@ -154,6 +154,12 @@ proc ensure_units_initialized { } {
   }
 }
 
+proc clear {} {
+  [get_db] clear
+  sta::clear_network
+  sta::clear_sta
+}
+
 # namespace ord
 }
 

src/OpenSTA

@@ -159,4 +159,6 @@ proc clock_tree_synthesis { args } {
   }
 
   $cts run_triton_cts
+  # CTS changed the network behind the STA's back.
+  sta::network_changed
 }

src/TritonCTS/src/tritoncts.tcl

@@ -48,8 +48,8 @@ public:
   virtual void clear();
 
   void readLefAfter(dbLib *lib);
-  void readDefAfter();
-  void readDbAfter();
+  void readDefAfter(dbBlock* block);
+  void readDbAfter(dbDatabase* db);
   void readLibertyAfter(LibertyLibrary *lib);
 
   virtual bool linkNetwork(const char *top_cell_name,

src/dbSta/include/db_sta/dbNetwork.hh

@@ -28,6 +28,8 @@ using odb::dbDatabase;
 using odb::dbLib;
 using odb::dbNet;
 using odb::dbBlock;
+using odb::dbTech;
+using odb::dbLib;
 
 class dbSta : public Sta, public ord::OpenRoad::Observer
 {

src/dbSta/include/db_sta/dbSta.hh

@@ -373,6 +373,7 @@ dbNetwork::setBlock(dbBlock *block)
 void
 dbNetwork::clear()
 {
+  ConcreteNetwork::clear();
   db_ = nullptr;
 }
 
@@ -763,20 +764,19 @@ dbNetwork::readLefAfter(dbLib *lib)
 }
 
 void
-dbNetwork::readDefAfter()
+dbNetwork::readDefAfter(dbBlock* block)
 {
-  dbChip *chip = db_->getChip();
-  if (chip) {
-    block_ = chip->getBlock();
-    makeTopCell();
-  }
+  db_ = block->getDataBase();
+  block_ = block;
+  makeTopCell();
 }
 
 // Make ConcreteLibrary/Cell/Port objects for the
 // db library/master/MTerm objects.
 void
-dbNetwork::readDbAfter()
+dbNetwork::readDbAfter(odb::dbDatabase *db)
 {
+  db_ = db;
   dbChip *chip = db_->getChip();
   if (chip) {
     block_ = chip->getBlock();

src/dbSta/src/dbNetwork.cc

@@ -116,21 +116,22 @@ dbSta::makeSdcNetwork()
   sdc_network_ = new dbSdcNetwork(network_);
 }
 
-void dbSta::postReadLef(odb::dbTech* tech, odb::dbLib* library)
+void dbSta::postReadLef(dbTech* tech,
+			dbLib* library)
 {
   if (library) {
     db_network_->readLefAfter(library);
   }
 }
 
-void dbSta::postReadDef(odb::dbBlock* block)
+void dbSta::postReadDef(dbBlock* block)
 {
-  db_network_->readDefAfter();
+  db_network_->readDefAfter(block);
 }
 
-void dbSta::postReadDb(odb::dbDatabase* db)
+void dbSta::postReadDb(dbDatabase* db)
 {
-  db_network_->readDbAfter();
+  db_network_->readDbAfter(db);
 }
 
 // Wrapper to sync db/liberty libraries.

src/dbSta/src/dbSta.cc

@@ -1,10 +1,6 @@
 source "flow_helpers.tcl"
 
-read_lef $tech_lef
-read_lef $std_cell_lef
-foreach file $extra_lef { read_lef $file }
-read_liberty $liberty_file
-foreach file $extra_liberty { read_liberty $file }
+read_libraries
 read_verilog $synth_verilog
 link_design $top_module
 read_sdc $sdc_file
@@ -47,8 +43,6 @@ clock_tree_synthesis -lut_file $cts_lut_file \
   -sol_list $cts_sol_file \
   -root_buf $cts_buffer \
   -wire_unit 20
-# CTS changed the network behind the STA's back.
-sta::network_changed
 
 set_placement_padding -global -left $detail_place_pad -right $detail_place_pad
 detailed_placement
@@ -78,8 +72,13 @@ catch "exec TritonRoute $tr_params" tr_log
 puts $tr_log
 regexp -all {number of violations = ([0-9]+)} $tr_log ignore drv_count
 
-# Need a way to clear db to read def
-#read_def $routed_def
+################################################################
+
+# Reinitialize libraries db with routed def.
+ord::clear
+read_libraries
+read_def $routed_def
+read_sdc $sdc_file
 
 # final report
 # inlieu of rc extraction
@@ -98,5 +97,5 @@ if { ![info exists drv_count] } {
 } elseif { $drv_count > $max_drv_count } {
   puts "fail:  max drv count exceeded $drv_count > $max_drv_count."
 } else {
-  puts "pass"
+  puts "pass:  drv count $drv_count <= $drv_count."
 }

test/flow.tcl

@@ -1,3 +1,13 @@
+proc read_libraries {} {
+  global tech_lef std_cell_lef extra_lef liberty_file extra_liberty
+
+  read_lef $tech_lef
+  read_lef $std_cell_lef
+  foreach file $extra_lef { read_lef $file }
+  read_liberty $liberty_file
+  foreach file $extra_liberty { read_liberty $file }
+}
+
 proc have_macros {} {
   set db [::ord::get_db]
   set block [[$db getChip] getBlock]
@@ -42,6 +52,3 @@ proc make_tr_params { tr_lef cts_def route_guide routed_def } {
   close $stream
   return $tr_params
 }
-
-
-