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It only uses a single via. In principle it could use a double cut via - would that satisfy your DRC requirement? I haven't seen such a large std cell pin before. Is this common or just some special cell? You could dont-use such cells for now. |
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Hello,
I'm working on locally integrating TSMC 65nm PDK into my ORFS flow. I've encountered an issue with the "pin_access" command for std cells that have large pins. Specifically, I found that the output pin on larger buffer cells is sufficiently large to require 2 vias on the pin to satisfy minCut DRC. I've run "detailed_route_debug -pa -pa_markers -pin <my_cell>:<my_pin>" and stepped through to see visually that the tool tries and fails to place a single via at all possible access points.
Here's my question/concern: It appears to me that the pin_access tool simply is not built to place multiple vias on a pin. Anyone more experienced with this or with TritonRoute, can you weigh in? Am I missing something, or is it true that pin_access does not handle multi-via requirements?
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