Skip to content

Commit 4ebc147

Browse files
committed
Improve VMReg handling.
1 parent c49fa87 commit 4ebc147

File tree

2 files changed

+24
-11
lines changed

2 files changed

+24
-11
lines changed

src/hotspot/cpu/ppc/sharedRuntime_ppc.cpp

Lines changed: 18 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -346,40 +346,48 @@ OopMap* RegisterSaver::push_frame_reg_args_and_save_live_registers(MacroAssemble
346346
}
347347

348348
if (generate_oop_map) {
349-
map->set_callee_saved(VMRegImpl::stack2reg(offset>>2),
349+
map->set_callee_saved(VMRegImpl::stack2reg(offset >> 2),
350350
RegisterSaver_LiveRegs[i].vmreg);
351-
map->set_callee_saved(VMRegImpl::stack2reg((offset + half_reg_size)>>2),
351+
map->set_callee_saved(VMRegImpl::stack2reg((offset + half_reg_size) >> 2),
352352
RegisterSaver_LiveRegs[i].vmreg->next());
353353
}
354354
offset += reg_size;
355355
}
356356

357+
// Note that generate_oop_map in the following loops is only used for the
358+
// polling_page_vectors_safepoint_handler_blob.
359+
// The order in which the vector contents are stored depends on Endianess and
360+
// the utilized instructions (PowerArchitecturePPC64).
357361
assert(is_aligned(offset, StackAlignmentInBytes), "should be");
358362
if (PowerArchitecturePPC64 >= 10) {
359363
for (int i = 0; i < vsregstosave_num; i += 2) {
360-
int reg_num = RegisterSaver_LiveVSRegs[i].reg_num;
364+
int reg_num = RegisterSaver_LiveVSRegs[i].reg_num;
361365
assert(RegisterSaver_LiveVSRegs[i + 1].reg_num == reg_num + 1, "or use other instructions!");
362366

363367
__ stxvp(as_VectorSRegister(reg_num), offset, R1_SP);
364368

365369
if (generate_oop_map) {
366-
map->set_callee_saved(VMRegImpl::stack2reg(offset >> 2),
367-
RegisterSaver_LiveVSRegs[i].vmreg);
368-
map->set_callee_saved(VMRegImpl::stack2reg((offset + vs_reg_size) >> 2),
369-
RegisterSaver_LiveVSRegs[i + 1].vmreg);
370+
VMReg vsr = RegisterSaver_LiveVSRegs[i].vmreg;
371+
for (int j = 0; j < 8; j++) {
372+
map->set_callee_saved(VMRegImpl::stack2reg((offset >> 2) + j), vsr);
373+
vsr = vsr->next();
374+
}
370375
}
371376
offset += (2 * vs_reg_size);
372377
}
373378
} else {
374379
for (int i = 0; i < vsregstosave_num; i++) {
375-
int reg_num = RegisterSaver_LiveVSRegs[i].reg_num;
380+
int reg_num = RegisterSaver_LiveVSRegs[i].reg_num;
376381

377382
__ li(R31, offset);
378383
__ stxvd2x(as_VectorSRegister(reg_num), R31, R1_SP);
379384

380385
if (generate_oop_map) {
381-
map->set_callee_saved(VMRegImpl::stack2reg(offset >> 2),
382-
RegisterSaver_LiveVSRegs[i].vmreg);
386+
VMReg vsr = RegisterSaver_LiveVSRegs[i].vmreg;
387+
for (int j = 0; j < 4; j++) {
388+
map->set_callee_saved(VMRegImpl::stack2reg((offset >> 2) + j), vsr);
389+
vsr = vsr->next();
390+
}
383391
}
384392
offset += vs_reg_size;
385393
}

src/hotspot/cpu/ppc/vmreg_ppc.hpp

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -67,7 +67,12 @@ inline VectorSRegister as_VectorSRegister() {
6767

6868
inline bool is_concrete() {
6969
assert(is_reg(), "must be");
70-
return is_even(value());
70+
if (is_Register() || is_FloatRegister()) return is_even(value());
71+
if (is_VectorSRegister()) {
72+
int base = value() - ConcreteRegisterImpl::max_fpr;
73+
return (base & 3) == 0;
74+
}
75+
return true;
7176
}
7277

7378
#endif // CPU_PPC_VMREG_PPC_HPP

0 commit comments

Comments
 (0)