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10 | 10 | #if defined(GGML_COMMON_DECL_C) |
11 | 11 | #include <stdint.h> |
12 | 12 |
|
13 | | -// --- Begin MSVC SIMD operator overloads --- |
14 | | -#ifdef _MSC_VER |
15 | | -#include <immintrin.h> |
16 | | - |
17 | | -// AVX-512 integer bitwise operators |
18 | | -inline __m512i operator|(const __m512i& a, const __m512i& b) { return _mm512_or_si512(a, b); } |
19 | | -inline __m512i operator&(const __m512i& a, const __m512i& b) { return _mm512_and_si512(a, b); } |
20 | | -inline __m512i operator^(const __m512i& a, const __m512i& b) { return _mm512_xor_si512(a, b); } |
21 | | - |
22 | | -// AVX2 integer bitwise operators |
23 | | -inline __m256i operator|(const __m256i& a, const __m256i& b) { return _mm256_or_si256(a, b); } |
24 | | -inline __m256i operator&(const __m256i& a, const __m256i& b) { return _mm256_and_si256(a, b); } |
25 | | -inline __m256i operator^(const __m256i& a, const __m256i& b) { return _mm256_xor_si256(a, b); } |
26 | | - |
27 | | -#ifdef __ARM_NEON |
28 | | -#include <arm_neon.h> |
29 | | -inline uint8x16_t operator|(uint8x16_t a, uint8x16_t b) { return vorrq_u8(a, b); } |
30 | | -inline uint8x16_t operator&(uint8x16_t a, uint8x16_t b) { return vandq_u8(a, b); } |
31 | | -inline int8x16_t operator|(int8x16_t a, int8x16_t b) { return vreinterpretq_s8_u8(vorrq_u8(vreinterpretq_u8_s8(a), vreinterpretq_u8_s8(b))); } |
32 | | -inline int8x16_t operator&(int8x16_t a, int8x16_t b) { return vreinterpretq_s8_u8(vandq_u8(vreinterpretq_u8_s8(a), vreinterpretq_u8_s8(b))); } |
33 | | -#endif |
34 | | -#endif |
35 | | -// --- End MSVC SIMD operator overloads --- |
36 | | - |
37 | 13 | typedef uint16_t ggml_half; |
38 | 14 | typedef uint32_t ggml_half2; |
39 | 15 |
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@@ -791,6 +767,34 @@ static_assert(sizeof(block_iq5_ks_r4) == 4*sizeof(block_iq5_ks), "wrong iq5_ks_r |
791 | 767 |
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792 | 768 | //////////////////////////////////////////////////////////////////////////////// |
793 | 769 |
|
| 770 | +// --- Begin MSVC SIMD operator overloads --- |
| 771 | +#ifdef __cplusplus |
| 772 | +#ifdef _MSC_VER |
| 773 | +#include <immintrin.h> |
| 774 | + |
| 775 | +// AVX-512 integer bitwise operators |
| 776 | +inline __m512i operator|(const __m512i& a, const __m512i& b) { return _mm512_or_si512(a, b); } |
| 777 | +inline __m512i operator&(const __m512i& a, const __m512i& b) { return _mm512_and_si512(a, b); } |
| 778 | +inline __m512i operator^(const __m512i& a, const __m512i& b) { return _mm512_xor_si512(a, b); } |
| 779 | + |
| 780 | +// AVX2 integer bitwise operators |
| 781 | +inline __m256i operator|(const __m256i& a, const __m256i& b) { return _mm256_or_si256(a, b); } |
| 782 | +inline __m256i operator&(const __m256i& a, const __m256i& b) { return _mm256_and_si256(a, b); } |
| 783 | +inline __m256i operator^(const __m256i& a, const __m256i& b) { return _mm256_xor_si256(a, b); } |
| 784 | + |
| 785 | +#ifdef __ARM_NEON |
| 786 | +#include <arm_neon.h> |
| 787 | +inline uint8x16_t operator|(uint8x16_t a, uint8x16_t b) { return vorrq_u8(a, b); } |
| 788 | +inline uint8x16_t operator&(uint8x16_t a, uint8x16_t b) { return vandq_u8(a, b); } |
| 789 | +inline int8x16_t operator|(int8x16_t a, int8x16_t b) { return vreinterpretq_s8_u8(vorrq_u8(vreinterpretq_u8_s8(a), vreinterpretq_u8_s8(b))); } |
| 790 | +inline int8x16_t operator&(int8x16_t a, int8x16_t b) { return vreinterpretq_s8_u8(vandq_u8(vreinterpretq_u8_s8(a), vreinterpretq_u8_s8(b))); } |
| 791 | +#endif |
| 792 | +#endif |
| 793 | +#endif |
| 794 | +// --- End MSVC SIMD operator overloads --- |
| 795 | + |
| 796 | +//////////////////////////////////////////////////////////////////////////////// |
| 797 | + |
794 | 798 | #ifndef GGML_COMMON_IMPL |
795 | 799 |
|
796 | 800 | #if defined(GGML_COMMON_IMPL_C) |
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