STM : low_level_flash drivers doesn't disable icache

when erasing or writing flash memory.

1- Erasing or writing flash memory while ICACHE is enabled, causes
ERRF bit to be set in ICACHE status register.
So, should disables ICACHE before erase/write operations
and re-enables it afterwards, and that's what this patch support.

2- Enable Icache on H5 platform.

Signed-off-by: Ahmad EL JOUAID <[email protected]>
Change-Id: Id60631bff10c1c92361b3f8f9969a7650f5e3063

Author: ahmadstm

platform/ext/target/stm/common/hal/CMSIS_Driver/low_level_flash.c

@@ -22,11 +22,20 @@
 #include "stm32hal.h"
 #include <stdio.h>
 #include "board.h"
+#include "boot_hal_cfg.h"
 
 #ifndef ARG_UNUSED
 #define ARG_UNUSED(arg)  ((void)arg)
 #endif /* ARG_UNUSED */
 
+/* Private typedef -----------------------------------------------------------*/
+/* Private constants ---------------------------------------------------------*/
+/** @addtogroup ICACHE_Private_Constants ICACHE Private Constants
+  * @{
+  */
+#define ICACHE_INVALIDATE_TIMEOUT_VALUE        1U   /* 1ms */
+#define ICACHE_DISABLE_TIMEOUT_VALUE           1U   /* 1ms */
+
 /* config for flash driver */
 /*
 #define DEBUG_FLASH_ACCESS
@@ -414,6 +423,81 @@ static int32_t Flash_ReadData(uint32_t addr, void *data, uint32_t cnt)
   }
 }
 
+#ifdef TFM_ICACHE_ENABLE
+#define HAL_ICACHE_MODULE_ENABLED
+static int stm32_icache_disable(void)
+{
+  int status = 0;
+  uint32_t tickstart;
+
+  /* Clear BSYENDF flag first and then disable the instruction cache
+   * that starts a cache invalidation procedure
+   */
+  CLEAR_BIT(ICACHE->FCR, ICACHE_FCR_CBSYENDF);
+
+  HAL_ICACHE_Disable();
+
+  /* Get tick */
+  tickstart = HAL_GetTick();
+
+  /* Wait for instruction cache to get disabled */
+  while (HAL_ICACHE_IsEnabled()) {
+    if ((HAL_GetTick() - tickstart) >
+            ICACHE_DISABLE_TIMEOUT_VALUE) {
+      /* New check to avoid false timeout detection in case
+       * of preemption.
+       */
+      if (HAL_ICACHE_IsEnabled()) {
+        status = ARM_DRIVER_ERROR_TIMEOUT;
+        break;
+      }
+    }
+  }
+
+  return status;
+}
+
+static void stm32_icache_enable(void)
+{
+  HAL_ICACHE_Enable();
+}
+
+static int icache_wait_for_invalidate_complete(void)
+{
+  int status = ARM_DRIVER_ERROR;
+  uint32_t tickstart;
+
+  /* Check if ongoing invalidation operation */
+  if (__HAL_ICACHE_GET_FLAG(ICACHE_FLAG_BUSY)) {
+    /* Get tick */
+    tickstart = HAL_GetTick();
+
+    /* Wait for end of cache invalidation */
+    while (!__HAL_ICACHE_GET_FLAG(ICACHE_FLAG_BUSYEND)) {
+      if ((HAL_GetTick() - tickstart) >
+          ICACHE_INVALIDATE_TIMEOUT_VALUE) {
+        break;
+      }
+    }
+  }
+
+  /* Clear any pending flags */
+  if (__HAL_ICACHE_GET_FLAG(ICACHE_FLAG_BUSYEND)) {
+    __HAL_ICACHE_CLEAR_FLAG(ICACHE_FLAG_BUSYEND);
+    status = 0;
+  } else {
+    status = ARM_DRIVER_ERROR_TIMEOUT;
+  }
+
+  if (__HAL_ICACHE_GET_FLAG(ICACHE_FLAG_ERROR)) {
+    __HAL_ICACHE_CLEAR_FLAG(ICACHE_FLAG_ERROR);
+    status = ARM_DRIVER_ERROR;
+  }
+
+  return status;
+}
+#endif // TFM_ICACHE_ENABLE
+
 static int32_t Flash_ProgramData(uint32_t addr,
                                  const void *data, uint32_t cnt)
 {
@@ -476,6 +560,15 @@ static int32_t Flash_ProgramData(uint32_t addr,
     return ARM_DRIVER_ERROR_PARAMETER;
   }
 
+#ifdef TFM_ICACHE_ENABLE
+  /* Disable icache, this will start the invalidation procedure.
+    * All changes(erase/write) to flash memory should happen when
+    * i-cache is disabled. A write to flash performed without
+    * disabling i-cache will set ERRF error flag in SR register.
+    */
+  stm32_icache_disable();
+#endif /* TFM_ICACHE_ENABLE */
+
   HAL_FLASH_Unlock();
   ARM_FLASH0_STATUS.busy = DRIVER_STATUS_BUSY;
   do
@@ -505,6 +598,16 @@ static int32_t Flash_ProgramData(uint32_t addr,
 
   ARM_FLASH0_STATUS.busy = DRIVER_STATUS_IDLE;
   HAL_FLASH_Lock();
+
+#ifdef TFM_ICACHE_ENABLE
+  icache_wait_for_invalidate_complete();
+
+  /* I-cache should be enabled only after the
+    * invalidation is complete.
+    */
+  stm32_icache_enable();
+#endif /* TFM_ICACHE_ENABLE */
+
   /* compare data written */
 #ifdef CHECK_WRITE
   if ((err == HAL_OK) && memcmp(dest, data, cnt))
@@ -587,12 +690,32 @@ static int32_t Flash_EraseSector(uint32_t addr)
 #else
     EraseInit.Page = page_number(&ARM_FLASH0_DEV, addr);
 #endif
+
+#ifdef TFM_ICACHE_ENABLE
+  /* Disable icache, this will start the invalidation procedure.
+    * All changes(erase/write) to flash memory should happen when
+    * i-cache is disabled. A write to flash performed without
+    * disabling i-cache will set ERRF error flag in SR register.
+    */
+  stm32_icache_disable();
+#endif /* TFM_ICACHE_ENABLE */
+
   ARM_FLASH0_STATUS.error = DRIVER_STATUS_NO_ERROR;
   HAL_FLASH_Unlock();
   ARM_FLASH0_STATUS.busy = DRIVER_STATUS_BUSY;
   err = HAL_FLASHEx_Erase(&EraseInit, &pageError);
   ARM_FLASH0_STATUS.busy = DRIVER_STATUS_IDLE;
   HAL_FLASH_Lock();
+
+#ifdef TFM_ICACHE_ENABLE
+  icache_wait_for_invalidate_complete();
+
+  /* I-cache should be enabled only after the
+    * invalidation is complete.
+    */
+  stm32_icache_enable();
+#endif /* TFM_ICACHE_ENABLE */
+
 #ifdef DEBUG_FLASH_ACCESS
   if (err != HAL_OK)
   {

platform/ext/target/stm/common/stm32h5xx/CMakeLists.txt

@@ -84,6 +84,7 @@ target_sources(platform_s
         ${CMAKE_CURRENT_SOURCE_DIR}/hal/Src/stm32h5xx_hal_pka.c
         ${CMAKE_CURRENT_SOURCE_DIR}/hal/Src/stm32h5xx_hal_cryp.c
         ${CMAKE_CURRENT_SOURCE_DIR}/hal/Src/stm32h5xx_hal_cryp_ex.c
+        ${CMAKE_CURRENT_SOURCE_DIR}/hal/Src/stm32h5xx_hal_icache.c
         ${STM_COMMON_DIR}/hal/Native_Driver/low_level_rng.c
 )
 

platform/ext/target/stm/common/stm32u5xx/CMakeLists.txt

@@ -90,6 +90,7 @@ target_sources(platform_s
         ${CMAKE_CURRENT_SOURCE_DIR}/hal/Src/stm32u5xx_hal_cryp_ex.c
         ${CMAKE_CURRENT_SOURCE_DIR}/hal/Src/stm32u5xx_hal_i2c.c
         ${CMAKE_CURRENT_SOURCE_DIR}/hal/Src/stm32u5xx_hal_i2c_ex.c
+        ${CMAKE_CURRENT_SOURCE_DIR}/hal/Src/stm32u5xx_hal_icache.c
         ${STM_COMMON_DIR}/hal/Native_Driver/low_level_rng.c
         ${STM_COMMON_DIR}/hal/Native_Driver/nv_counters.c
 )

platform/ext/target/stm/common/stm32u5xx/hal/Inc/stm32u5xx_hal_icache.h

@@ -227,6 +227,7 @@ typedef struct
 /* Peripheral Control functions **********************************************/
 HAL_StatusTypeDef HAL_ICACHE_Enable(void);
 HAL_StatusTypeDef HAL_ICACHE_Disable(void);
+uint32_t HAL_ICACHE_IsEnabled(void);
 HAL_StatusTypeDef HAL_ICACHE_ConfigAssociativityMode(uint32_t AssociativityMode);
 HAL_StatusTypeDef HAL_ICACHE_DeInit(void);
 

platform/ext/target/stm/common/stm32u5xx/hal/Src/stm32u5xx_hal_icache.c

@@ -260,6 +260,15 @@ HAL_StatusTypeDef HAL_ICACHE_Disable(void)
   return status;
 }
 
+/**
+  * @brief  Check whether the Instruction Cache is enabled or not.
+  * @retval Status (0: disabled, 1: enabled)
+  */
+uint32_t HAL_ICACHE_IsEnabled(void)
+{
+  return ((READ_BIT(ICACHE->CR, ICACHE_CR_EN) != 0U) ? 1UL : 0UL);
+}
+
 /**
   * @brief  Invalidate the Instruction Cache.
   * @note   This function waits for the end of cache invalidation procedure

platform/ext/target/stm/common/stm32wbaxx/CMakeLists.txt

@@ -91,6 +91,7 @@ target_sources(platform_s
         ${CMAKE_CURRENT_SOURCE_DIR}/hal/Src/stm32wbaxx_hal_cryp_ex.c
         ${CMAKE_CURRENT_SOURCE_DIR}/hal/Src/stm32wbaxx_hal_i2c.c
         ${CMAKE_CURRENT_SOURCE_DIR}/hal/Src/stm32wbaxx_hal_i2c_ex.c
+        ${CMAKE_CURRENT_SOURCE_DIR}/hal/Src/stm32wbaxx_hal_icache.c
         ${STM_COMMON_DIR}/hal/Native_Driver/low_level_rng.c
 )
 

platform/ext/target/stm/stm32h573i_dk/include/boot_hal_cfg.h

@@ -39,7 +39,7 @@
 
 #define TFM_DEV_MODE
 /* ICache */
-/*#define TFM_ICACHE_ENABLE*/ /*!< Instruction cache enable */
+#define TFM_ICACHE_ENABLE /*!< Instruction cache enable */
 
 /* Static protections */
 #define TFM_WRP_PROTECT_ENABLE  /*!< Write Protection  */

platform/ext/target/stm/stm32wba65i_dk/CMakeLists.txt

@@ -89,14 +89,14 @@ add_custom_target(tfm_s_fmw ALL SOURCES ${tfm_s_split_out})
 if(CMAKE_C_COMPILER STREQUAL "iccarm")
 add_custom_command(
   OUTPUT ${tfm_s_split_out}
-  DEPENDS tfm_s_binaries
+# DEPENDS tfm_s_binaries
   COMMAND ielftool --silent --exclude=.BL2_OTP --bin $<TARGET_FILE:tfm_s> ${tfm_s_bin_dir}/tfm_s_fmw.bin
   COMMAND ielftool --silent --only=.BL2_OTP --bin $<TARGET_FILE:tfm_s> ${tfm_s_bin_dir}/tfm_s_otp.bin
 )
 else()
 add_custom_command(
   OUTPUT ${tfm_s_split_out}
-  DEPENDS tfm_s_binaries
+# DEPENDS tfm_s_binaries
   COMMAND ${CMAKE_OBJCOPY} --remove-section .BL2_OTP -O binary $<TARGET_FILE:tfm_s> ${tfm_s_bin_dir}/tfm_s_fmw.bin
   COMMAND ${CMAKE_OBJCOPY} --only-section .BL2_OTP -O binary $<TARGET_FILE:tfm_s> ${tfm_s_bin_dir}/tfm_s_otp.bin
 )