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update format and add documentation
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pyrtl/conditional.py

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Original file line numberDiff line numberDiff line change
@@ -34,7 +34,33 @@
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is a context manager (under which conditional assignements can be made), and "otherwise",
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which is an instance that stands in for a 'fall through' case. The details of how these
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should be used, and the difference between normal assignments and condtional assignments,
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described in more detail in the state machine example from in prytl/examples.
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described in more detail in the state machine example in examples/example3-statemachine.py.
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There are instances where you might want a wirevector to be set to a certain value in all
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but certain with blocks. For example, say you have a processor with a PC register that is
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normally updated to PC + 1 after each cycle, except when the current instruction is
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a branch or jump. You could represent that as follows::
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pc = pyrtl.Register(32)
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instr = pyrtl.WireVector(32)
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res = pyrtl.WireVector(32)
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op = instr[:7]
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ADD = 0b0110011
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JMP = 0b1101111
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with conditional_assignment(
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defaults={
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pc: pc + 1,
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res: 0
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}
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):
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with op == ADD:
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res |= instr[15:20] + instr[20:25]
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# pc will be updated to pc + 1
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with op == JMP:
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pc.next |= pc + instr[7:]
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# res will be set to 0
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In addition to the conditional context, there is a helper function "currently_under_condition"
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which will test if the code where it is called is currently elaborating hardware

tests/test_conditional.py

Lines changed: 2 additions & 1 deletion
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@@ -133,7 +133,8 @@ def test_default_value_for_wires(self):
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r1: r1 + 2,
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r2: 6,
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o: 3
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}):
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}
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):
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with i < 2:
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r1.next |= r1 + 1
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# r2 will be updated to 6

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