diff --git a/pyrtl/memory.py b/pyrtl/memory.py
index 451e3dcf..38dd0660 100644
--- a/pyrtl/memory.py
+++ b/pyrtl/memory.py
@@ -259,10 +259,10 @@ def _build_read_port(self, addr):
     def _assignment(self, item, val, is_conditional):
         from .conditional import _build
 
-        item = as_wires(item, bitwidth=self.addrwidth, truncating=False)
-        if len(item) > self.addrwidth:
-            raise PyrtlError('error, the wire indexing the memory bitwidth > addrwidth')
-        addr = item
+        # Even though as_wires is already called on item already in the __getitem__ method,
+        # we need to call it again here because __setitem__ passes the original item
+        # to _assignment.
+        addr = as_wires(item, bitwidth=self.addrwidth, truncating=False)
 
         if isinstance(val, MemBlock.EnabledWrite):
             data, enable = val.data, val.enable