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‎.editorconfig‎

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root = true
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[*]
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charset = utf-8
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# end_of_line = lf
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insert_final_newline = true
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trim_trailing_whitespace = true
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indent_style = tab
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indent_size = 2
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tab_width = 2
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[*.py]
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indent_style = tab
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indent_size = 2
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[*.{yml,yaml}]
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indent_style = space
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indent_size = 2
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[*.{json,ini}]
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indent_style = tab
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indent_size = 2
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[*.md]
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trim_trailing_whitespace = false
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[*.rst]
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indent_style = space
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indent_size = 3

‎.gitattributes‎

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*.sh text eol=lf

‎.github/workflows/Pipeline.yml‎

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name: Regression Testing
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on:
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push:
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pull_request:
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workflow_dispatch:
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schedule:
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- cron: '0 15 * * *'
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jobs:
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NVC:
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name: ${{ matrix.icon }}${{ matrix.name }} - NVC
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runs-on: ${{ matrix.image }}
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strategy:
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fail-fast: false
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matrix:
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include:
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- {icon: "🐧", name: "Ubuntu", image: "ubuntu-24.04", shell: "bash"}
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## - {icon: "🪟", name: "Windows", image: "windows-2022", shell: "powershell"} # Scripting is Bash-based
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- {icon: "🪟🟨", name: "Windows", image: "windows-2022", shell: "msys2 {0}"} # Installation in Windows via MSI, but called from UCRT64.
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defaults:
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run:
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shell: ${{ matrix.shell }}
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steps:
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- name: ⏬ Checkout repository
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uses: actions/checkout@v4
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with:
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submodules: recursive
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- name: ${{ matrix.icon }} Setup MSYS2 for UCRT64
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uses: msys2/setup-msys2@v2
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if: matrix.name == 'Windows' && startsWith(matrix.shell, 'msys2')
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with:
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msystem: ucrt64
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update: true
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- name: 🔧 Install NVC
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uses: nickg/setup-nvc-ci@v1
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with:
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version: latest
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- name: 🚧 Run tests on Ubuntu
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if: matrix.name == 'Ubuntu'
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run: |
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mkdir -p temp
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cd temp
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../scripts/NVC.sh
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- name: 🚧 Run tests on Windows + MSYS2/UCRT64
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if: matrix.name == 'Windows' && startsWith(matrix.shell, 'msys2')
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run: |
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export PATH="/c/Program Files/NVC/bin:$PATH"
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mkdir -p temp
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cd temp
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../scripts/NVC.sh
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- name: 🚧 Inspect Ant+JUnit Unittest Summary XML
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# if: matrix.name == 'Ubuntu'
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run: |
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cat temp/*.xml
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- name: '📤 Upload artifact: logs'
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uses: actions/upload-artifact@v4
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with:
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name: junit-${{ matrix.name }}-nvc
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include-hidden-files: true
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path: |
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temp/*.xml
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if-no-files-found: error
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retention-days: 1
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PublishTestResults:
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uses: pyTooling/Actions/.github/workflows/PublishTestResults.yml@r5
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needs:
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- NVC
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with:
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unittest_artifacts_pattern: "junit-*"
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testsuite-summary-name: "Interfaces"
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dorny: true
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# codecov: true
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secrets: inherit

‎.gitignore‎

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/temp
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# Python cache and object files
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__pycache__/
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*.py[cod]
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# Sphinx documentation
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/doc/_build
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# PyCharm project
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/.idea/workspace.xml
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# Temperary generated outputs from scripts
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/temp

‎AMBA/AXI/v4/AXI4.vhdl‎

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-- =============================================================================
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-- Authors:
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-- Rob Gaddi
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-- Patrick Lehmann
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--
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-- Package:
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-- VHDL-2019 Axi4 interface descriptions
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--
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-- Description:
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-- Undocumented
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--
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-- License:
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-- =============================================================================
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-- Copyright 2016-2025 Open Source VHDL Group
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--
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-- Licensed under the Apache License, Version 2.0 (the "License");
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-- you may not use this file except in compliance with the License.
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-- You may obtain a copy of the License at
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--
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-- http://www.apache.org/licenses/LICENSE-2.0
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--
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-- Unless required by applicable law or agreed to in writing, software
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-- distributed under the License is distributed on an "AS IS" BASIS,
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-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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-- See the License for the specific language governing permissions and
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-- limitations under the License.
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-- =============================================================================
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library IEEE;
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use IEEE.std_logic_1164.all;
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use IEEE.numeric_std.all;
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use work.Axi4Common.all;
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package Axi4 is
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type Axi4_Address_Interface is record
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-- Handshake signals
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Valid : std_ulogic;
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Ready : std_ulogic;
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-- Payload signals
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ID : ID_Type;
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Address : Address_Type;
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Length : Length_Type;
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Size : Size_Type;
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Burst : Burst_Type;
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Lock : Lock_Type;
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QoS : QoS_Type;
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Region : Region_Type;
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Cache : Cache_Type;
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Protect : Protect_Type;
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User : User_Type;
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end record;
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type Axi4_Address_Interface_Vector is array(natural range <>) of Axi4_Address_Interface;
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type Axi4_WriteData_Interface is record
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-- Handshake signals
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Valid : std_ulogic;
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Ready : std_ulogic;
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-- Payload signals
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Data : Data_Type;
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Strobe : Strobe_Type;
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Last : std_ulogic;
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User : User_Type;
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end record;
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type Axi4_WriteData_Interface_Vector is array(natural range <>) of Axi4_WriteData_Interface;
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type Axi4_WriteResponse_Interface is record
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-- Handshake signals
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Valid : std_ulogic;
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Ready : std_ulogic;
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-- Payload signals
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ID : ID_Type;
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Response : Response_Type;
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User : User_Type;
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end record;
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type Axi4_WriteResponse_Interface_Vector is array(natural range <>) of Axi4_WriteResponse_Interface;
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type Axi4_ReadData_Interface is record
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-- Handshake signals
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Valid : std_ulogic;
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Ready : std_ulogic;
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-- Payload signals
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ID : ID_Type;
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Response : Response_Type;
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Data : Data_Type;
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Last : std_ulogic;
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User : User_Type;
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end record;
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type Axi4_ReadData_Interface_Vector is array(natural range <>) of Axi4_ReadData_Interface;
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type Axi4_Interface is record
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WriteAddress : Axi4_Address_Interface;
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WriteData : Axi4_WriteData_Interface;
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WriteResponse : Axi4_WriteResponse_Interface;
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ReadAddress : Axi4_Address_Interface;
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ReadData : Axi4_ReadData_Interface;
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end record;
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type Axi4_Interface_Vector is array(natural range <>) of Axi4_Interface;
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-- All lower-level views are defined from the driver's point of view.
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view Axi4_Address_ManagerView of Axi4_Address_Interface is
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-- Handshake signals
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Valid : out;
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Ready : in;
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-- Payload signals
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ID : out;
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Address : out;
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Length : out;
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Size : out;
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Burst : out;
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Lock : out;
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QoS : out;
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Region : out;
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Cache : out;
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Protect : out;
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User : out;
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end view;
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alias Axi4_Address_SubordinateView is Axi4_Address_ManagerView'converse;
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view Axi4_WriteData_ManagerView of Axi4_WriteData_Interface is
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-- Handshake signals
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Valid : out;
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Ready : in;
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-- Payload signals
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Data : out;
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Strobe : out;
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Last : out;
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User : out;
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end view;
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alias Axi4_WriteData_SubordinateView is Axi4_WriteData_ManagerView'converse;
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view Axi4_WriteResponse_ManagerView of Axi4_WriteResponse_Interface is
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-- Handshake signals
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Valid : in;
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Ready : out;
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-- Payload signals
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ID : in;
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Response : in;
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User : in;
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end view;
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alias Axi4_WriteResponse_SubordinateView is Axi4_WriteResponse_ManagerView'converse;
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view Axi4_ReadData_ManagerView of Axi4_ReadData_Interface is
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-- Handshake signals
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Valid : in;
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Ready : out;
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-- Payload signals
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ID : in;
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Response : in;
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Data : in;
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Last : in;
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User : in;
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end view;
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alias Axi4_ReadData_SubordinateView is Axi4_ReadData_ManagerView'converse;
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view Axi4_ManagerView of Axi4_Interface is
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WriteAddress : view Axi4_Address_ManagerView;
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WriteData : view Axi4_WriteData_ManagerView;
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WriteResponse : view Axi4_WriteResponse_ManagerView;
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ReadAddress : view Axi4_Address_ManagerView;
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ReadData : view Axi4_ReadData_ManagerView;
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end view;
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alias Axi4_SubordinateView is Axi4_ManagerView'converse;
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end package;

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