FIR-Module-FPGA/.gitignore at main · VRM21-Studios/FIR-Module-FPGA · GitHub

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# ============================================================
# Vivado / FPGA
# ============================================================
*.jou
*.log
*.str
*.xpr
*.bit
*.hwh
*.xsa
*.dcp
*.ltx

.cache/
.runs/
.xil/
.sim/
xsim.dir/

# ============================================================
# Simulation Outputs
# ============================================================
*.wdb
*.vcd
*.fst
*.fsdb

# ============================================================
# Vitis / SDK
# ============================================================
.metadata/
Debug/
Release/

# ============================================================
# OS / Editor
# ============================================================
.DS_Store
Thumbs.db
.vscode/
*.swp