From 590f9b52f76803ff8d00d048a0cbc13c430d8c0e Mon Sep 17 00:00:00 2001
From: sunkhaskasis <19194315+sunkhaskasis@users.noreply.github.com>
Date: Wed, 18 Feb 2026 20:44:03 +0300
Subject: [PATCH 01/16] Update Nuked-OPM

---
 emu/cores/nukedopm_int.h | 72 ++++++++++++++++++----------------------
 1 file changed, 32 insertions(+), 40 deletions(-)

diff --git a/emu/cores/nukedopm_int.h b/emu/cores/nukedopm_int.h
index f4986337..6297163d 100644
--- a/emu/cores/nukedopm_int.h
+++ b/emu/cores/nukedopm_int.h
@@ -1,7 +1,5 @@
-// license:LGPL-2.1+
-// copyright-holders:Nuke.YKT
 /* Nuked OPM
- * Copyright (C) 2020 Nuke.YKT
+ * Copyright (C) 2020, 2026 Nuke.YKT
  *
  * This file is part of Nuked OPM.
  *
@@ -20,10 +18,12 @@
  *
  *  Nuked OPM emulator.
  *  Thanks:
- *      siliconpr0n.org(digshadow, John McMaster):
+ *      John McMaster(siliconpr0n.org):
  *          YM2151 and other FM chip decaps and die shots.
+ *      gtr3qq (https://github.com/gtr3qq):
+ *          YM2164 decap
  *
- * version: 0.9.2 beta
+ * version: 1.0
  */
 #ifndef NUKEDOPM_INT_H
 #define NUKEDOPM_INT_H
@@ -36,24 +36,16 @@
 extern "C" {
 #endif
 
-#define RSM_FRAC 10
-#define OPN_WRITEBUF_SIZE 2048
-#define OPN_WRITEBUF_DELAY 36
+enum {
+    opm_flags_none = 0,
+    opm_flags_ym2164 = 1,   /* YM2164(OPP) */
+};
 
 typedef struct {
-    uint64_t time;
-    uint8_t port;
-    uint8_t data;
-} opm_writebuf;
-
-typedef struct {
-    DEV_DATA _devData;  // to alias DEV_DATA struct
-    uint32_t clock;
-    uint32_t smplRate;
-
     uint32_t cycles;
     uint8_t ic;
     uint8_t ic2;
+    uint8_t opp;
     // IO
     uint8_t write_data;
     uint8_t write_a;
@@ -101,6 +93,7 @@ typedef struct {
     uint8_t eg_rate[2];
     uint8_t eg_sl[2];
     uint8_t eg_tl[3];
+    uint16_t eg_tl_opp;
     uint8_t eg_zr[2];
     uint8_t eg_timershift_lock;
     uint8_t eg_timer_lock;
@@ -136,6 +129,8 @@ typedef struct {
     uint8_t pg_reset[32];
     uint8_t pg_reset_latch[32];
     uint32_t pg_serial;
+    uint8_t pg_opp_pms;
+    uint8_t pg_opp_dt2[32];
 
     // Operator
     uint16_t op_phase_in;
@@ -159,6 +154,8 @@ typedef struct {
     int16_t op_fb[2];
     uint8_t op_mixl;
     uint8_t op_mixr;
+    uint8_t op_opp_rl;
+    uint8_t op_opp_fb[3];
 
     // Mixer
 
@@ -185,7 +182,7 @@ typedef struct {
     uint32_t noise_timer;
     uint8_t noise_timer_of;
     uint8_t noise_update;
-    uint8_t noise_temp;
+    uint8_t noise_bit;
 
     // Register set
     uint8_t mode_test[8];
@@ -220,6 +217,13 @@ typedef struct {
     uint8_t noise_en;
     uint8_t noise_freq;
 
+    // OPP
+    uint8_t ch_ramp_div[8];
+    uint8_t reg_20_delay;
+    uint8_t reg_28_delay;
+    uint8_t reg_30_delay;
+    uint8_t opp_tl_cnt[8];
+    uint16_t opp_tl[32];
 
     // Timer
     uint16_t timer_a_reg;
@@ -269,31 +273,19 @@ typedef struct {
     uint8_t dac_osh1, dac_osh2;
     uint16_t dac_bits;
     int32_t dac_output[2];
-
-    uint32_t mute[8];
-    int32_t rateratio;
-    int32_t samplecnt;
-    int32_t oldsamples[2];
-    int32_t samples[2];
-
-    uint64_t writebuf_samplecnt;
-    uint32_t writebuf_cur;
-    uint32_t writebuf_last;
-    uint64_t writebuf_lasttime;
-    opm_writebuf writebuf[OPN_WRITEBUF_SIZE];
 } opm_t;
 
-void NOPM_Clock(opm_t *chip, int32_t *output, uint8_t *sh1, uint8_t *sh2, uint8_t *so);
-void NOPM_Write(opm_t *chip, uint32_t port, uint8_t data);
-uint8_t NOPM_Read(opm_t *chip, uint32_t port);
-uint8_t NOPM_ReadIRQ(opm_t *chip);
-uint8_t NOPM_ReadCT1(opm_t *chip);
-uint8_t NOPM_ReadCT2(opm_t *chip);
-void NOPM_SetIC(opm_t *chip, uint8_t ic);
-void NOPM_Reset(opm_t* chip, uint32_t rate, uint32_t clock);
+void OPM_Clock(opm_t *chip, int32_t *output, uint8_t *sh1, uint8_t *sh2, uint8_t *so);
+void OPM_Write(opm_t *chip, uint32_t port, uint8_t data);
+uint8_t OPM_Read(opm_t *chip, uint32_t port);
+uint8_t OPM_ReadIRQ(opm_t *chip);
+uint8_t OPM_ReadCT1(opm_t *chip);
+uint8_t OPM_ReadCT2(opm_t *chip);
+void OPM_SetIC(opm_t *chip, uint8_t ic);
+void OPM_Reset(opm_t *chip, uint32_t flags);
 
 #ifdef __cplusplus
 } // extern "C"
 #endif
 
-#endif	// NUKEDOPM_INT_H
+#endif

From cc5b6561000d2c4623adf5258a6e75ce672cf410 Mon Sep 17 00:00:00 2001
From: sunkhaskasis <19194315+sunkhaskasis@users.noreply.github.com>
Date: Wed, 18 Feb 2026 20:54:10 +0300
Subject: [PATCH 02/16] Update nukedopm_int.h

---
 emu/cores/nukedopm_int.h | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/emu/cores/nukedopm_int.h b/emu/cores/nukedopm_int.h
index 6297163d..b6051c73 100644
--- a/emu/cores/nukedopm_int.h
+++ b/emu/cores/nukedopm_int.h
@@ -36,6 +36,16 @@
 extern "C" {
 #endif
 
+#define RSM_FRAC 10
+#define OPN_WRITEBUF_SIZE 2048
+#define OPN_WRITEBUF_DELAY 36
+
+typedef struct {
+    uint64_t time;
+    uint8_t port;
+    uint8_t data;
+} opm_writebuf;
+
 enum {
     opm_flags_none = 0,
     opm_flags_ym2164 = 1,   /* YM2164(OPP) */

From ef6fee8c6f95180ca3010b113fd5730276fda550 Mon Sep 17 00:00:00 2001
From: sunkhaskasis <19194315+sunkhaskasis@users.noreply.github.com>
Date: Wed, 18 Feb 2026 20:58:18 +0300
Subject: [PATCH 03/16] Update Nuked-OPM

---
 emu/cores/nukedopm.c | 835 +++++++++++++++++++++++--------------------
 1 file changed, 450 insertions(+), 385 deletions(-)

diff --git a/emu/cores/nukedopm.c b/emu/cores/nukedopm.c
index 84ec2bd6..3d6dc5c4 100644
--- a/emu/cores/nukedopm.c
+++ b/emu/cores/nukedopm.c
@@ -1,7 +1,5 @@
-// license:LGPL-2.1+
-// copyright-holders:Nuke.YKT
 /* Nuked OPM
- * Copyright (C) 2022 Nuke.YKT
+ * Copyright (C) 2020, 2026 Nuke.YKT
  *
  * This file is part of Nuked OPM.
  *
@@ -20,10 +18,12 @@
  *
  *  Nuked OPM emulator.
  *  Thanks:
- *      siliconpr0n.org(digshadow, John McMaster):
+ *      John McMaster(siliconpr0n.org):
  *          YM2151 and other FM chip decaps and die shots.
+ *      gtr3qq (https://github.com/gtr3qq):
+ *          YM2164 decap
  *
- * version: 0.9.3 beta
+ * version: 1.0
  */
 #include <string.h>
 #include <stdlib.h>
@@ -441,24 +441,32 @@ static int32_t OPM_CalcKCode(int32_t kcf, int32_t lfo, int32_t lfo_sign, int32_t
 
 static void OPM_PhaseCalcFNumBlock(opm_t *chip)
 {
-    uint32_t slot = (chip->cycles + 7) % 32;
-    uint32_t channel = slot % 8;
+    uint32_t slot = (chip->cycles + 7) & 31;
+    uint32_t channel = slot & 7;
     uint32_t kcf = (chip->ch_kc[channel] << 6) + chip->ch_kf[channel];
     uint32_t lfo = chip->lfo_pmd ? chip->lfo_pm_lock : 0;
-    uint32_t pms = chip->ch_pms[channel];
-    uint32_t dt = chip->sl_dt2[slot];
+    uint32_t pms = chip->opp ? chip->pg_opp_pms : chip->ch_pms[channel];
+    uint32_t dt = chip->opp ? chip->pg_opp_dt2[slot] : chip->sl_dt2[slot];
     int32_t lfo_pm = OPM_LFOApplyPMS(lfo & 127, pms);
     uint32_t kcode = OPM_CalcKCode(kcf, lfo_pm, (lfo & 0x80) != 0 && pms != 0 ? 0 : 1, dt);
     uint32_t fnum = OPM_KCToFNum(kcode);
     uint32_t kcode_h = kcode >> 8;
     chip->pg_fnum[slot] = fnum;
     chip->pg_kcode[slot] = kcode_h;
+
+    if (chip->opp)
+    {
+        uint32_t slot = chip->cycles & 31;
+        uint32_t channel = slot & 7;
+        chip->pg_opp_pms = chip->ch_pms[channel];
+        chip->pg_opp_dt2[slot] = chip->sl_dt2[slot];
+    }
 }
 
 static void OPM_PhaseCalcIncrement(opm_t *chip)
 {
     uint32_t slot = chip->cycles;
-    uint32_t channel = slot % 8;
+    uint32_t channel = slot & 7;
     uint32_t dt = chip->sl_dt1[slot];
     uint32_t dt_l = dt & 3;
     uint32_t detune = 0;
@@ -505,16 +513,16 @@ static void OPM_PhaseCalcIncrement(opm_t *chip)
 
 static void OPM_PhaseGenerate(opm_t *chip)
 {
-    uint32_t slot = (chip->cycles + 27) % 32;
+    uint32_t slot = (chip->cycles + 27) & 31;
     chip->pg_reset_latch[slot] = chip->pg_reset[slot];
-    slot = (chip->cycles + 25) % 32;
+    slot = (chip->cycles + 25) & 31;
     /* Mask increment */
     if (chip->pg_reset_latch[slot])
     {
         chip->pg_inc[slot] = 0;
     }
     /* Phase step */
-    slot = (chip->cycles + 24) % 32;
+    slot = (chip->cycles + 24) & 31;
     if (chip->pg_reset_latch[slot] || chip->mode_test[3])
     {
         chip->pg_phase[slot] = 0;
@@ -534,7 +542,7 @@ static void OPM_PhaseDebug(opm_t *chip)
 
 static void OPM_KeyOn1(opm_t *chip)
 {
-    uint32_t cycles = (chip->cycles + 1) % 32;
+    uint32_t cycles = (chip->cycles + 1) & 31;
     chip->kon_chanmatch = 0;
     if (chip->mode_kon_channel + 24 == cycles)
     {
@@ -544,25 +552,20 @@ static void OPM_KeyOn1(opm_t *chip)
 
 static void OPM_KeyOn2(opm_t *chip)
 {
-    uint32_t slot = (chip->cycles + 8) % 32;
+    uint32_t slot = (chip->cycles + 8) & 31;
     if (chip->kon_chanmatch)
     {
-        chip->mode_kon[(slot + 0) % 32] = chip->mode_kon_operator[0];
-        chip->mode_kon[(slot + 8) % 32] = chip->mode_kon_operator[2];
-        chip->mode_kon[(slot + 16) % 32] = chip->mode_kon_operator[1];
-        chip->mode_kon[(slot + 24) % 32] = chip->mode_kon_operator[3];
+        chip->mode_kon[(slot + 0) & 31] = chip->mode_kon_operator[0];
+        chip->mode_kon[(slot + 8) & 31] = chip->mode_kon_operator[2];
+        chip->mode_kon[(slot + 16) & 31] = chip->mode_kon_operator[1];
+        chip->mode_kon[(slot + 24) & 31] = chip->mode_kon_operator[3];
     }
 }
 
 static void OPM_EnvelopePhase1(opm_t *chip)
 {
-    uint32_t slot = (chip->cycles + 2) % 32;
+    uint32_t slot = (chip->cycles + 2) & 31;
     uint32_t kon = chip->mode_kon[slot] | chip->kon_csm;
-    uint32_t konevent = !chip->kon[slot] && kon;
-    if (konevent)
-    {
-        chip->eg_state[slot] = eg_num_attack;
-    }
 
     chip->kon2[slot] = chip->kon[slot];
     chip->kon[slot] = kon;
@@ -571,9 +574,13 @@ static void OPM_EnvelopePhase1(opm_t *chip)
 static void OPM_EnvelopePhase2(opm_t *chip)
 {
     uint32_t slot = chip->cycles;
-    uint32_t chan = slot % 8;
+    uint32_t chan = slot & 7;
     uint8_t rate = 0, ksv, zr, ams;
-    switch (chip->eg_state[slot])
+
+    uint8_t sel = chip->eg_state[slot];
+    if (chip->kon[slot] && !chip->kon2[slot])
+        sel = eg_num_attack;
+    switch (sel)
     {
     case eg_num_attack:
         rate = chip->sl_ar[slot];
@@ -608,12 +615,20 @@ static void OPM_EnvelopePhase2(opm_t *chip)
         rate = 63;
     }
 
-    chip->eg_tl[2] = chip->eg_tl[1];
-    chip->eg_tl[1] = chip->eg_tl[0];
-    chip->eg_tl[0] = chip->sl_tl[slot];
+    if (chip->opp)
+    {
+        uint32_t slot = (chip->cycles + 30) & 31;
+        chip->eg_tl_opp = chip->opp_tl[slot];
+    }
+    else
+    {
+        chip->eg_tl[2] = chip->eg_tl[1];
+        chip->eg_tl[1] = chip->eg_tl[0];
+        chip->eg_tl[0] = chip->sl_tl[slot];
+    }
     chip->eg_sl[1] = chip->eg_sl[0];
     chip->eg_sl[0] = chip->sl_d1l[slot];
-    if (chip->sl_d1l[slot] == 15)
+    if (chip->eg_sl[0] == 15)
     {
         chip->eg_sl[0] = 31;
     }
@@ -644,7 +659,7 @@ static void OPM_EnvelopePhase2(opm_t *chip)
 
 static void OPM_EnvelopePhase3(opm_t *chip)
 {
-    uint32_t slot = (chip->cycles + 31) % 32;
+    uint32_t slot = (chip->cycles + 31) & 31;
     chip->eg_shift = (chip->eg_timershift_lock + (chip->eg_rate[0] >> 2)) & 15;
     chip->eg_inchi = eg_stephi[chip->eg_rate[0] & 3][chip->eg_timer_lock & 3];
 
@@ -658,7 +673,7 @@ static void OPM_EnvelopePhase3(opm_t *chip)
 
 static void OPM_EnvelopePhase4(opm_t *chip)
 {
-    uint32_t slot = (chip->cycles + 30) % 32;
+    uint32_t slot = (chip->cycles + 30) & 31;
     uint8_t inc = 0;
     uint8_t kon, eg_off, eg_zero, slreach;
     if (chip->eg_clock & 2)
@@ -764,7 +779,7 @@ static void OPM_EnvelopePhase4(opm_t *chip)
 
 static void OPM_EnvelopePhase5(opm_t *chip)
 {
-    uint32_t slot = (chip->cycles + 29) % 32;
+    uint32_t slot = (chip->cycles + 29) & 31;
     uint32_t level = chip->eg_level[slot];
     uint32_t step = 0;
     if (chip->eg_instantattack)
@@ -789,7 +804,11 @@ static void OPM_EnvelopePhase5(opm_t *chip)
     level += step;
     chip->eg_level[slot] = (uint16_t)level;
 
-    chip->eg_out[0] = chip->eg_outtemp[1] + (chip->eg_tl[2] << 3);
+    chip->eg_out[0] = chip->eg_outtemp[1];
+    if (chip->opp)
+        chip->eg_out[0] += chip->eg_tl_opp;
+    else
+        chip->eg_out[0] += chip->eg_tl[2] << 3;
     if (chip->eg_out[0] & 1024)
     {
         chip->eg_out[0] = 1023;
@@ -805,7 +824,7 @@ static void OPM_EnvelopePhase5(opm_t *chip)
 
 static void OPM_EnvelopePhase6(opm_t *chip)
 {
-    uint32_t slot = (chip->cycles + 28) % 32;
+    uint32_t slot = (chip->cycles + 28) & 31;
     chip->eg_serial_bit = (chip->eg_serial >> 9) & 1;
     if (chip->cycles == 3)
     {
@@ -838,16 +857,16 @@ static void OPM_EnvelopeClock(opm_t *chip)
 
 static void OPM_EnvelopeTimer(opm_t *chip)
 {
-    uint32_t cycle = (chip->cycles + 31) % 16;
+    uint32_t cycle = (chip->cycles + 31) & 15;
     uint32_t cycle2;
-    uint8_t inc = ((chip->cycles + 31) % 32) < 16 && (chip->eg_clock & 1) != 0 && (cycle == 0 || chip->eg_timercarry);
+    uint8_t inc = ((chip->cycles + 31) & 31) < 16 && (chip->eg_clock & 1) != 0 && (cycle == 0 || chip->eg_timercarry);
     uint8_t timerbit = (chip->eg_timer >> cycle) & 1;
     uint8_t sum = timerbit + inc;
     uint8_t sum0 = (sum & 1) && !chip->ic;
     chip->eg_timercarry = sum >> 1;
     chip->eg_timer = (chip->eg_timer & (~(1 << cycle))) | (sum0 << cycle);
 
-    cycle2 = (chip->cycles + 30) % 16;
+    cycle2 = (chip->cycles + 30) & 15;
 
     chip->eg_timer2 <<= 1;
     if ((chip->eg_timer & (1 << cycle2)) != 0 && !chip->eg_timerbstop)
@@ -909,13 +928,13 @@ static void OPM_OperatorPhase1(opm_t *chip)
 
 static void OPM_OperatorPhase2(opm_t *chip)
 {
-    uint32_t slot = (chip->cycles + 31) % 32;
+    uint32_t slot = (chip->cycles + 31) & 31;
     chip->op_phase = (chip->op_phase_in + chip->op_mod_in) & 1023;
 }
 
 static void OPM_OperatorPhase3(opm_t *chip)
 {
-    uint32_t slot = (chip->cycles + 30) % 32;
+    uint32_t slot = (chip->cycles + 30) & 31;
     uint16_t phase = chip->op_phase & 255;
     if (chip->op_phase & 256)
     {
@@ -928,19 +947,19 @@ static void OPM_OperatorPhase3(opm_t *chip)
 
 static void OPM_OperatorPhase4(opm_t *chip)
 {
-    uint32_t slot = (chip->cycles + 29) % 32;
+    uint32_t slot = (chip->cycles + 29) & 31;
     chip->op_logsin[1] = chip->op_logsin[0];
 }
 
 static void OPM_OperatorPhase5(opm_t *chip)
 {
-    uint32_t slot = (chip->cycles + 28) % 32;
+    uint32_t slot = (chip->cycles + 28) & 31;
     chip->op_logsin[2] = chip->op_logsin[1];
 }
 
 static void OPM_OperatorPhase6(opm_t *chip)
 {
-    uint32_t slot = (chip->cycles + 27) % 32;
+    uint32_t slot = (chip->cycles + 27) & 31;
     chip->op_atten = chip->op_logsin[2] + (chip->eg_out[1] << 2);
     if (chip->op_atten & 4096)
     {
@@ -950,92 +969,105 @@ static void OPM_OperatorPhase6(opm_t *chip)
 
 static void OPM_OperatorPhase7(opm_t *chip)
 {
-    uint32_t slot = (chip->cycles + 26) % 32;
+    uint32_t slot = (chip->cycles + 26) & 31;
     chip->op_exp[0] = exprom[chip->op_atten & 255];
     chip->op_pow[0] = chip->op_atten >> 8;
 }
 
 static void OPM_OperatorPhase8(opm_t *chip)
 {
-    uint32_t slot = (chip->cycles + 25) % 32;
+    uint32_t slot = (chip->cycles + 25) & 31;
     chip->op_exp[1] = chip->op_exp[0];
     chip->op_pow[1] = chip->op_pow[0];
 }
 
 static void OPM_OperatorPhase9(opm_t *chip)
 {
-    uint32_t slot = (chip->cycles + 24) % 32;
+    uint32_t slot = (chip->cycles + 24) & 31;
     int16_t out = (chip->op_exp[1] << 2) >> (chip->op_pow[1]);
-    if (chip->op_sign & 32)
+    if (!chip->opp && chip->mode_test[4])
     {
-        out = -out;
+        out |= 0x2000;
     }
     chip->op_out[0] = out;
 }
 
 static void OPM_OperatorPhase10(opm_t *chip)
 {
-    uint32_t slot = (chip->cycles + 23) % 32;
-    chip->op_out[1] = chip->op_out[0];
+    uint32_t slot = (chip->cycles + 23) & 31;
+    int16_t out = chip->op_out[0];
+    if (chip->op_sign & 64)
+    {
+        out ^= 0x3fff;
+        out = (out + 1) & 0x3fff;
+    }
+    out <<= 2; out >>= 2;
+    chip->op_out[1] = out;
 }
 
 static void OPM_OperatorPhase11(opm_t *chip)
 {
-    uint32_t slot = (chip->cycles + 22) % 32;
+    uint32_t slot = (chip->cycles + 22) & 31;
     chip->op_out[2] = chip->op_out[1];
 }
 
 static void OPM_OperatorPhase12(opm_t *chip)
 {
-    uint32_t slot = (chip->cycles + 21) % 32;
+    uint32_t slot = (chip->cycles + 21) & 31;
     chip->op_out[3] = chip->op_out[2];
 }
 
 static void OPM_OperatorPhase13(opm_t *chip)
 {
-    uint32_t slot = (chip->cycles + 20) % 32;
+    uint32_t slot = (chip->cycles + 20) & 31;
+    uint32_t channel = slot & 7;
     chip->op_out[4] = chip->op_out[3];
-    chip->op_connect = chip->ch_connect[slot % 8];
+    chip->op_connect = chip->ch_connect[channel];
+    if (chip->opp)
+    {
+        chip->op_opp_rl = chip->ch_rl[channel];
+        chip->op_opp_fb[2] = chip->op_opp_fb[1];
+        chip->op_opp_fb[1] = chip->op_opp_fb[0];
+        chip->op_opp_fb[0] = chip->ch_fb[channel];
+    }
 }
 
 static void OPM_OperatorPhase14(opm_t *chip)
 {
-    uint32_t slot = (chip->cycles + 19) % 32;
+    uint32_t slot = (chip->cycles + 19) & 31;
     uint32_t channel = slot & 7;
+    uint8_t rl;
     chip->op_mix = chip->op_out[5] = chip->op_out[4];
     chip->op_fbupdate = (chip->op_counter == 0);
     chip->op_c1update = (chip->op_counter == 2);
     chip->op_fbshift <<= 1;
     chip->op_fbshift |= (chip->op_counter == 2);
 
-    chip->op_modtable[0] = fm_algorithm[(chip->op_counter+2)%4][0][chip->op_connect];
-    chip->op_modtable[1] = fm_algorithm[(chip->op_counter+2)%4][1][chip->op_connect];
-    chip->op_modtable[2] = fm_algorithm[(chip->op_counter+2)%4][2][chip->op_connect];
-    chip->op_modtable[3] = fm_algorithm[(chip->op_counter+2)%4][3][chip->op_connect];
-    chip->op_modtable[4] = fm_algorithm[(chip->op_counter+2)%4][4][chip->op_connect];
-    chip->op_mixl = fm_algorithm[chip->op_counter][5][chip->op_connect] && (chip->ch_rl[slot % 8] & 1) != 0;
-    chip->op_mixr = fm_algorithm[chip->op_counter][5][chip->op_connect] && (chip->ch_rl[slot % 8] & 2) != 0;
-    if (chip->mute[channel])
-    {
-        chip->op_mixl = chip->op_mixr = 0;
-    }
+    chip->op_modtable[0] = fm_algorithm[(chip->op_counter + 2) & 3][0][chip->op_connect];
+    chip->op_modtable[1] = fm_algorithm[(chip->op_counter + 2) & 3][1][chip->op_connect];
+    chip->op_modtable[2] = fm_algorithm[(chip->op_counter + 2) & 3][2][chip->op_connect];
+    chip->op_modtable[3] = fm_algorithm[(chip->op_counter + 2) & 3][3][chip->op_connect];
+    chip->op_modtable[4] = fm_algorithm[(chip->op_counter + 2) & 3][4][chip->op_connect];
+    rl = chip->opp ? chip->op_opp_rl : chip->ch_rl[channel];
+    chip->op_mixl = fm_algorithm[chip->op_counter][5][chip->op_connect] && (rl & 1) != 0;
+    chip->op_mixr = fm_algorithm[chip->op_counter][5][chip->op_connect] && (rl & 2) != 0;
 }
 
 static void OPM_OperatorPhase15(opm_t *chip)
 {
-    uint32_t slot = (chip->cycles + 18) % 32;
+    uint32_t slot = (chip->cycles + 18) & 31;
     int16_t mod, mod1 = 0, mod2 = 0;
     if (chip->op_modtable[0])
     {
-        mod2 |= chip->op_m1[slot % 8][0];
+        mod2 |= chip->op_m1[slot & 7][0];
     }
     if (chip->op_modtable[1])
     {
-        mod1 |= chip->op_m1[slot % 8][1];
+        mod1 |= chip->op_m1[slot & 7][1];
     }
     if (chip->op_modtable[2])
     {
-        mod1 |= chip->op_c1[slot % 8];
+        mod1 |= chip->op_c1[slot & 7];
     }
     if (chip->op_modtable[3])
     {
@@ -1049,29 +1081,29 @@ static void OPM_OperatorPhase15(opm_t *chip)
     chip->op_mod[0] = mod;
     if (chip->op_fbupdate)
     {
-        chip->op_m1[slot % 8][1] = chip->op_m1[slot % 8][0];
-        chip->op_m1[slot % 8][0] = chip->op_out[5];
+        chip->op_m1[slot & 7][1] = chip->op_m1[slot & 7][0];
+        chip->op_m1[slot & 7][0] = chip->op_out[5];
     }
     if (chip->op_c1update)
     {
-        chip->op_c1[slot % 8] = chip->op_out[5];
+        chip->op_c1[slot & 7] = chip->op_out[5];
     }
 }
 
 static void OPM_OperatorPhase16(opm_t *chip)
 {
-    uint32_t slot = (chip->cycles + 17) % 32;
+    uint32_t slot = (chip->cycles + 17) & 31;
     // hack
     chip->op_mod[2] = chip->op_mod[1];
     chip->op_fb[1] = chip->op_fb[0];
 
     chip->op_mod[1] = chip->op_mod[0];
-    chip->op_fb[0] = chip->ch_fb[slot % 8];
+    chip->op_fb[0] = chip->opp ? chip->op_opp_fb[2] : chip->ch_fb[slot & 7];
 }
 
 static void OPM_OperatorCounter(opm_t *chip)
 {
-    if ((chip->cycles % 8) == 4)
+    if ((chip->cycles & 7) == 4)
     {
         chip->op_counter++;
     }
@@ -1083,7 +1115,7 @@ static void OPM_OperatorCounter(opm_t *chip)
 
 static void OPM_Mixer2(opm_t *chip)
 {
-    uint32_t cycles = (chip->cycles + 30) % 32;
+    uint32_t cycles = (chip->cycles + 30) & 31;
     uint8_t bit;
     uint8_t top, ex;
     if (cycles < 16)
@@ -1094,14 +1126,12 @@ static void OPM_Mixer2(opm_t *chip)
     {
         bit = chip->mix_serial[1] & 1;
     }
-    if (chip->cycles % 16 == 1)
+    if ((chip->cycles & 15) == 1)
     {
         chip->mix_sign_lock = bit ^ 1;
         chip->mix_top_bits_lock = (chip->mix_bits >> 15) & 63;
     }
-    chip->mix_bits >>= 1;
-    chip->mix_bits |= bit << 20;
-    if (chip->cycles % 16 == 10)
+    if ((chip->cycles & 15) == 7)
     {
         top = chip->mix_top_bits_lock;
         if (chip->mix_sign_lock)
@@ -1140,7 +1170,7 @@ static void OPM_Mixer2(opm_t *chip)
         chip->mix_exp_lock = ex;
     }
     chip->mix_out_bit <<= 1;
-    switch ((chip->cycles + 1) % 16)
+    switch (chip->cycles & 15)
     {
     case 0:
         chip->mix_out_bit |= chip->mix_sign_lock2 ^ 1;
@@ -1161,12 +1191,14 @@ static void OPM_Mixer2(opm_t *chip)
         }
         break;
     }
+    chip->mix_bits >>= 1;
+    chip->mix_bits |= bit << 20;
 }
 
 static void OPM_Output(opm_t *chip)
 {
-    uint32_t slot = (chip->cycles + 27) % 32;
-    chip->smp_so = (chip->mix_out_bit & 4) != 0;
+    uint32_t slot = (chip->cycles + 27) & 31;
+    chip->smp_so = (chip->mix_out_bit & 1) != 0;
     chip->smp_sh1 = (slot & 24) == 8 && !chip->ic;
     chip->smp_sh2 = (slot & 24) == 24 && !chip->ic;
 }
@@ -1196,8 +1228,8 @@ static void OPM_DAC(opm_t *chip)
 
 static void OPM_Mixer(opm_t *chip)
 {
-    uint32_t slot = (chip->cycles + 18) % 32;
-    uint32_t channel = (slot % 8);
+    uint32_t slot = (chip->cycles + 18) & 31;
+    uint32_t channel = (slot & 7);
     // Right channel
     chip->mix_serial[1] >>= 1;
     if (chip->cycles == 13)
@@ -1308,18 +1340,22 @@ static void OPM_Mixer(opm_t *chip)
 
 static void OPM_Noise(opm_t *chip)
 {
-    uint8_t w1 = !chip->ic && !chip->noise_update;
-    uint8_t xr = ((chip->noise_lfsr >> 2) & 1) ^ chip->noise_temp;
-    uint8_t w2t = (chip->noise_lfsr & 0xffff) == 0xffff && chip->noise_temp == 0;
-    uint8_t w2 = !w2t && !xr;
-    uint8_t w3 = !chip->ic && !w1 && !w2;
-    uint8_t w4 = ((chip->noise_lfsr & 1) == 0 || !w1) && !w3;
-    if (!w1)
+    uint8_t noise_step = chip->ic || chip->noise_update;
+    uint8_t bit = 0;
+    if (noise_step)
     {
-        chip->noise_temp = (chip->noise_lfsr & 1) == 0;
+        if (!chip->ic)
+        {
+            uint8_t rst = (chip->noise_lfsr & 0xffff) == 0 && chip->noise_bit == 0;
+            uint8_t xr = ((chip->noise_lfsr >> 2) & 1) ^ chip->noise_bit;
+            bit = rst | xr;
+        }
+        chip->noise_bit = chip->noise_lfsr & 1;
     }
+    else
+        bit = chip->noise_lfsr & 1;
     chip->noise_lfsr >>= 1;
-    chip->noise_lfsr |= w4 << 15;
+    chip->noise_lfsr |= bit << 15;
 }
 
 static void OPM_NoiseTimer(opm_t *chip)
@@ -1328,12 +1364,12 @@ static void OPM_NoiseTimer(opm_t *chip)
 
     chip->noise_update = chip->noise_timer_of;
 
-    if (chip->cycles % 16 == 15)
+    if ((chip->cycles & 15) == 15)
     {
         timer++;
         timer &= 31;
     }
-    if (chip->ic || (chip->noise_timer_of && (chip->cycles % 16 == 15)))
+    if (chip->ic || (chip->noise_timer_of && ((chip->cycles & 15) == 15)))
     {
         timer = 0;
     }
@@ -1401,8 +1437,16 @@ static void OPM_DoTimerB(opm_t *chip)
         chip->timer_b_sub++;
     }
 
-    chip->timer_b_sub_of = (chip->timer_b_sub >> 4) & 1;
-    chip->timer_b_sub &= 15;
+    if (chip->opp)
+    {
+        chip->timer_b_sub_of = (chip->timer_b_sub >> 5) & 1;
+        chip->timer_b_sub &= 31;
+    }
+    else
+    {
+        chip->timer_b_sub_of = (chip->timer_b_sub >> 4) & 1;
+        chip->timer_b_sub &= 15;
+    }
     if (chip->ic)
     {
         chip->timer_b_sub = 0;
@@ -1443,25 +1487,25 @@ static void OPM_DoLFOMult(opm_t *chip)
     switch (chip->lfo_bit_counter & 7)
     {
     case 0:
-        bit = (dp & 64) != 0 && (chip->lfo_out1 & 64) == 0;
+        bit = (dp & 64) != 0 && (chip->lfo_out1 & 64) != 0;
         break;
     case 1:
-        bit = (dp & 32) != 0 && (chip->lfo_out1 & 32) == 0;
+        bit = (dp & 32) != 0 && (chip->lfo_out1 & 32) != 0;
         break;
     case 2:
-        bit = (dp & 16) != 0 && (chip->lfo_out1 & 16) == 0;
+        bit = (dp & 16) != 0 && (chip->lfo_out1 & 16) != 0;
         break;
     case 3:
-        bit = (dp & 8) != 0 && (chip->lfo_out1 & 8) == 0;
+        bit = (dp & 8) != 0 && (chip->lfo_out1 & 8) != 0;
         break;
     case 4:
-        bit = (dp & 4) != 0 && (chip->lfo_out1 & 4) == 0;
+        bit = (dp & 4) != 0 && (chip->lfo_out1 & 4) != 0;
         break;
     case 5:
-        bit = (dp & 2) != 0 && (chip->lfo_out1 & 2) == 0;
+        bit = (dp & 2) != 0 && (chip->lfo_out1 & 2) != 0;
         break;
     case 6:
-        bit = (dp & 1) != 0 && (chip->lfo_out1 & 1) == 0;
+        bit = (dp & 1) != 0 && (chip->lfo_out1 & 1) != 0;
         break;
     }
 
@@ -1471,7 +1515,7 @@ static void OPM_DoLFOMult(opm_t *chip)
         b1 = 0;
     }
     b2 = chip->lfo_mult_carry;
-    if (chip->cycles % 16 == 15)
+    if ((chip->cycles & 15) == 15)
     {
         b2 = 0;
     }
@@ -1485,7 +1529,8 @@ static void OPM_DoLFO1(opm_t *chip)
 {
     uint16_t counter2 = chip->lfo_counter2;
     uint8_t of_old = chip->lfo_counter2_of;
-    uint8_t lfo_bit, noise, sum, carry, w[10];
+    uint8_t lfo_bit, noise, sum, carry;
+    uint8_t bb, sb, x, w2, w3, mulm, mb;
     uint8_t lfo_pm_sign;
     uint8_t ampm_sel = (chip->lfo_bit_counter & 8) != 0;
     counter2 += (chip->lfo_counter1_of1 & 2) != 0 || chip->mode_test[3];
@@ -1501,7 +1546,7 @@ static void OPM_DoLFO1(opm_t *chip)
     chip->lfo_counter2 = counter2 & 32767;
     chip->lfo_counter2_load = chip->lfo_frq_update || of_old;
     chip->lfo_frq_update = 0;
-    if ((chip->cycles % 16) == 12)
+    if ((chip->cycles & 15) == 12)
     {
         chip->lfo_counter1++;
     }
@@ -1534,37 +1579,37 @@ static void OPM_DoLFO1(opm_t *chip)
 
     lfo_pm_sign = chip->lfo_wave == 2 ? chip->lfo_trig_sign : chip->lfo_saw_sign;
 
-    w[5] = ampm_sel ? chip->lfo_saw_sign : (chip->lfo_wave != 2 || !chip->lfo_trig_sign);
 
-    w[1] = !chip->lfo_clock || chip->lfo_wave == 3 || (chip->cycles & 15) != 15;
-    w[2] = chip->lfo_wave == 2 && !w[1];
-    w[4] = chip->lfo_clock_lock && chip->lfo_wave == 3;
-    w[3] = !chip->ic && !chip->mode_test[1] && !w[4] && (chip->lfo_val & 0x8000) != 0;
+    x = chip->lfo_clock && chip->lfo_wave != 3 && (chip->cycles & 15) == 15;
+    w2 = chip->lfo_wave == 2 && x;
+    w3 = !chip->ic && !chip->mode_test[1] && (!chip->lfo_clock_lock || chip->lfo_wave != 3) && (chip->lfo_val & 0x8000) != 0;
 
-    w[7] = ((chip->cycles + 1) % 16) < 8;
+    mulm = ((chip->cycles + 1) & 15) < 8;
 
-    w[6] = w[5] ^ w[3];
+    bb = ampm_sel ? chip->lfo_saw_sign : (chip->lfo_wave != 2 || !chip->lfo_trig_sign);
+    bb ^= w3;
     
-    w[9] = ampm_sel ? ((chip->cycles % 16) == 6) : !chip->lfo_saw_sign;
-
-    w[8] = chip->lfo_wave == 1 ? w[9] : w[6];
+    sb = ampm_sel ? ((chip->cycles & 15) == 6) : !chip->lfo_saw_sign;
 
-    w[8] &= w[7];
+    mb = mulm && (chip->lfo_wave == 1 ? sb : bb);
 
     chip->lfo_out1 <<= 1;
-    chip->lfo_out1 |= !w[8];
+    chip->lfo_out1 |= mb;
 
-    carry = !w[1] || ((chip->cycles & 15) != 15 && chip->lfo_val_carry != 0 && chip->lfo_wave != 3);
-    sum = carry + w[2] + w[3];
-    noise = chip->lfo_clock_lock && (chip->noise_lfsr & 1) != 0;
+    carry = x || ((chip->cycles & 15) != 15 && chip->lfo_val_carry != 0 && chip->lfo_wave != 3);
+    sum = carry + w2 + w3;
     lfo_bit = sum & 1;
-    lfo_bit |= (chip->lfo_wave == 3) && noise;
+    if (chip->lfo_wave == 3 && chip->lfo_clock_lock)
+    {
+        noise = chip->noise_lfsr & 1;
+        lfo_bit |= noise;
+    }
     chip->lfo_val_carry = sum >> 1;
     chip->lfo_val <<= 1;
     chip->lfo_val |= lfo_bit;
     
 
-    if (chip->cycles % 16 == 15 && (chip->lfo_bit_counter & 7) == 7)
+    if ((chip->cycles & 15) == 15 && (chip->lfo_bit_counter & 7) == 7)
     {
         if (ampm_sel)
         {
@@ -1679,81 +1724,184 @@ static void OPM_DoIO(opm_t *chip)
 static void OPM_DoRegWrite(opm_t *chip)
 {
     int32_t i;
-    uint32_t channel = chip->cycles % 8;
-    uint32_t slot = chip->cycles;
+    uint32_t cycles = chip->opp ? (chip->cycles + 1) & 31 : chip->cycles;
+    uint32_t channel = cycles & 7;
+    uint32_t slot = cycles;
 
-    // Register write
-    if (chip->reg_data_ready)
+    if (chip->opp)
     {
-        // Channel
-        if ((chip->reg_address & 0xe7) == (0x20 | channel))
+        uint32_t channel_d1 = (cycles + 7) & 7;
+        uint32_t channel_d4 = (cycles + 4) & 7;
+        if (chip->mode_test[4])
+        {
+            // Clear registers
+            chip->ch_ramp_div[channel] = 0;
+            chip->ch_rl[channel_d4] = 0;
+            chip->ch_fb[channel_d4] = 0;
+            chip->ch_connect[channel_d4] = 0;
+            chip->ch_kc[channel_d1] = 0;
+            chip->ch_kf[channel_d1] = 0;
+            chip->ch_pms[channel] = 0;
+            chip->ch_ams[channel] = 0;
+            
+            chip->sl_dt1[slot] = 0;
+            chip->sl_mul[slot] = 0;
+            chip->sl_tl[slot] = 0;
+            chip->sl_ks[slot] = 0;
+            chip->sl_ar[slot] = 0;
+            chip->sl_am_e[slot] = 0;
+            chip->sl_d1r[slot] = 0;
+            chip->sl_dt2[slot] = 0;
+            chip->sl_d2r[slot] = 0;
+            chip->sl_d1l[slot] = 0;
+            chip->sl_rr[slot] = 0;
+        }
+        else
         {
-            switch (chip->reg_address & 0x18)
+            if (chip->reg_20_delay & 8) // RL, FB, CONNECT
             {
-            case 0x00: // RL, FB, CONNECT
-                chip->ch_rl[channel] = chip->reg_data >> 6;
-                chip->ch_fb[channel] = (chip->reg_data >> 3) & 0x07;
-                chip->ch_connect[channel] = chip->reg_data & 0x07;
-                break;
-            case 0x08: // KC
-                chip->ch_kc[channel] = chip->reg_data & 0x7f;
-                break;
-            case 0x10: // KF
-                chip->ch_kf[channel] = chip->reg_data >> 2;
-                break;
-            case 0x18: // PMS, AMS
-                chip->ch_pms[channel] = (chip->reg_data >> 4) & 0x07;
-                chip->ch_ams[channel] = chip->reg_data & 0x03;
-                break;
-            default:
-                break;
+                chip->ch_rl[channel_d4] = chip->reg_data >> 6;
+                chip->ch_fb[channel_d4] = (chip->reg_data >> 3) & 0x07;
+                chip->ch_connect[channel_d4] = chip->reg_data & 0x07;
+            }
+            if (chip->reg_28_delay) // KC
+            {
+                chip->ch_kc[channel_d1] = chip->reg_data & 0x7f;
+            }
+            if (chip->reg_30_delay) // KF
+            {
+                chip->ch_kf[channel_d1] = chip->reg_data >> 2;
+            }
+            // Register write
+            if (chip->reg_data_ready)
+            {
+                // Channel
+                if (chip->reg_address == channel) // Ramp div
+                {
+                    chip->ch_ramp_div[channel] = chip->reg_data;
+                }
+                if (chip->reg_address == (0x38 | channel)) // PMS, AMS
+                {
+                    chip->ch_pms[channel] = (chip->reg_data >> 4) & 0x07;
+                    chip->ch_ams[channel] = chip->reg_data & 0x03;
+                }
+                // Slot
+                if ((chip->reg_address & 0x1f) == slot)
+                {
+                    switch (chip->reg_address & 0xe0)
+                    {
+                    case 0x40: // DT1, MUL
+                        chip->sl_dt1[slot] = (chip->reg_data >> 4) & 0x07;
+                        chip->sl_mul[slot] = chip->reg_data & 0x0f;
+                        break;
+                    case 0x60: // TL
+                        chip->sl_tl[slot] = chip->reg_data;
+                        break;
+                    case 0x80: // KS, AR
+                        chip->sl_ks[slot] = chip->reg_data >> 6;
+                        chip->sl_ar[slot] = chip->reg_data & 0x1f;
+                        break;
+                    case 0xa0: // AMS-EN, D1R
+                        chip->sl_am_e[slot] = chip->reg_data >> 7;
+                        chip->sl_d1r[slot] = chip->reg_data & 0x1f;
+                        break;
+                    case 0xc0: // DT2, D2R
+                        chip->sl_dt2[slot] = chip->reg_data >> 6;
+                        chip->sl_d2r[slot] = chip->reg_data & 0x1f;
+                        break;
+                    case 0xe0: // D1L, RR
+                        chip->sl_d1l[slot] = chip->reg_data >> 4;
+                        chip->sl_rr[slot] = chip->reg_data & 0x0f;
+                        break;
+                    default:
+                        break;
+                    }
+                }
             }
         }
-        // Slot
-        if ((chip->reg_address & 0x1f) == slot)
+
+        chip->reg_20_delay <<= 1;
+        chip->reg_20_delay |= chip->reg_data_ready && chip->reg_address == (0x20 | channel);
+        chip->reg_28_delay = chip->reg_data_ready && chip->reg_address == (0x28 | channel);
+        chip->reg_30_delay = chip->reg_data_ready && chip->reg_address == (0x30 | channel);
+    }
+    else
+    {
+        // Register write
+        if (chip->reg_data_ready)
         {
-            switch (chip->reg_address & 0xe0)
+            // Channel
+            if ((chip->reg_address & 0xe7) == (0x20 | channel))
             {
-            case 0x40: // DT1, MUL
-                chip->sl_dt1[slot] = (chip->reg_data >> 4) & 0x07;
-                chip->sl_mul[slot] = chip->reg_data & 0x0f;
-                break;
-            case 0x60: // TL
-                chip->sl_tl[slot] = chip->reg_data & 0x7f;
-                break;
-            case 0x80: // KS, AR
-                chip->sl_ks[slot] = chip->reg_data >> 6;
-                chip->sl_ar[slot] = chip->reg_data & 0x1f;
-                break;
-            case 0xa0: // AMS-EN, D1R
-                chip->sl_am_e[slot] = chip->reg_data >> 7;
-                chip->sl_d1r[slot] = chip->reg_data & 0x1f;
-                break;
-            case 0xc0: // DT2, D2R
-                chip->sl_dt2[slot] = chip->reg_data >> 6;
-                chip->sl_d2r[slot] = chip->reg_data & 0x1f;
-                break;
-            case 0xe0: // D1L, RR
-                chip->sl_d1l[slot] = chip->reg_data >> 4;
-                chip->sl_rr[slot] = chip->reg_data & 0x0f;
-                break;
-            default:
-                break;
+                switch (chip->reg_address & 0x18)
+                {
+                case 0x00: // RL, FB, CONNECT
+                    chip->ch_rl[channel] = chip->reg_data >> 6;
+                    chip->ch_fb[channel] = (chip->reg_data >> 3) & 0x07;
+                    chip->ch_connect[channel] = chip->reg_data & 0x07;
+                    break;
+                case 0x08: // KC
+                    chip->ch_kc[channel] = chip->reg_data & 0x7f;
+                    break;
+                case 0x10: // KF
+                    chip->ch_kf[channel] = chip->reg_data >> 2;
+                    break;
+                case 0x18: // PMS, AMS
+                    chip->ch_pms[channel] = (chip->reg_data >> 4) & 0x07;
+                    chip->ch_ams[channel] = chip->reg_data & 0x03;
+                    break;
+                default:
+                    break;
+                }
+            }
+            // Slot
+            if ((chip->reg_address & 0x1f) == slot)
+            {
+                switch (chip->reg_address & 0xe0)
+                {
+                case 0x40: // DT1, MUL
+                    chip->sl_dt1[slot] = (chip->reg_data >> 4) & 0x07;
+                    chip->sl_mul[slot] = chip->reg_data & 0x0f;
+                    break;
+                case 0x60: // TL
+                    chip->sl_tl[slot] = chip->reg_data & 0x7f;
+                    break;
+                case 0x80: // KS, AR
+                    chip->sl_ks[slot] = chip->reg_data >> 6;
+                    chip->sl_ar[slot] = chip->reg_data & 0x1f;
+                    break;
+                case 0xa0: // AMS-EN, D1R
+                    chip->sl_am_e[slot] = chip->reg_data >> 7;
+                    chip->sl_d1r[slot] = chip->reg_data & 0x1f;
+                    break;
+                case 0xc0: // DT2, D2R
+                    chip->sl_dt2[slot] = chip->reg_data >> 6;
+                    chip->sl_d2r[slot] = chip->reg_data & 0x1f;
+                    break;
+                case 0xe0: // D1L, RR
+                    chip->sl_d1l[slot] = chip->reg_data >> 4;
+                    chip->sl_rr[slot] = chip->reg_data & 0x0f;
+                    break;
+                default:
+                    break;
+                }
             }
         }
     }
 
+
     // Mode write
     if (chip->write_d_en)
     {
-        switch (chip->mode_address)
+        if (chip->mode_address == (chip->opp ? 9 : 1))
         {
-        case 0x01:
             for (i = 0; i < 8; i++)
             {
                 chip->mode_test[i] = (chip->write_data >> i) & 0x01;
             }
-            break;
+        }
+        switch (chip->mode_address)
+        {
         case 0x08:
             for (i = 0; i < 4; i++)
             {
@@ -1818,7 +1966,7 @@ static void OPM_DoRegWrite(opm_t *chip)
 
     // Register address write
     chip->reg_address_ready = chip->reg_address_ready && !chip->write_a_en;
-    if (chip->write_a_en && (chip->write_data & 0xe0) != 0)
+    if (chip->write_a_en && ((chip->write_data & 0xe0) != 0 || (chip->opp && (chip->write_data & 0xf8) == 0)))
     {
         chip->reg_address = chip->write_data;
         chip->reg_address_ready = 1;
@@ -1831,29 +1979,63 @@ static void OPM_DoRegWrite(opm_t *chip)
 
 static void OPM_DoIC(opm_t *chip)
 {
-    uint32_t channel = chip->cycles % 8;
+    uint32_t channel = chip->cycles & 7;
     uint32_t slot = chip->cycles;
     if (chip->ic)
     {
-        chip->ch_rl[channel] = 0;
-        chip->ch_fb[channel] = 0;
-        chip->ch_connect[channel] = 0;
-        chip->ch_kc[channel] = 0;
-        chip->ch_kf[channel] = 0;
-        chip->ch_pms[channel] = 0;
-        chip->ch_ams[channel] = 0;
-
-        chip->sl_dt1[slot] = 0;
-        chip->sl_mul[slot] = 0;
-        chip->sl_tl[slot] = 0;
-        chip->sl_ks[slot] = 0;
-        chip->sl_ar[slot] = 0;
-        chip->sl_am_e[slot] = 0;
-        chip->sl_d1r[slot] = 0;
-        chip->sl_dt2[slot] = 0;
-        chip->sl_d2r[slot] = 0;
-        chip->sl_d1l[slot] = 0;
-        chip->sl_rr[slot] = 0;
+        if (chip->opp)
+        {
+            uint32_t i;
+            for (i = 0; i < 2; i++)
+            {
+                uint8_t ch = (channel + 4 * i) & 7;
+                chip->ch_ramp_div[ch] = 0;
+                chip->ch_rl[ch] = 0;
+                chip->ch_fb[ch] = 0;
+                chip->ch_connect[ch] = 0;
+                chip->ch_kc[ch] = 0;
+                chip->ch_kf[ch] = 0;
+                chip->ch_pms[ch] = 0;
+                chip->ch_ams[ch] = 0;
+            }
+            for (i = 0; i < 8; i++)
+            {
+                uint8_t sl = (slot + 4 * i) & 31;
+                chip->sl_dt1[sl] = 0;
+                chip->sl_mul[sl] = 0;
+                chip->sl_tl[sl] = 0;
+                chip->sl_ks[sl] = 0;
+                chip->sl_ar[sl] = 0;
+                chip->sl_am_e[sl] = 0;
+                chip->sl_d1r[sl] = 0;
+                chip->sl_dt2[sl] = 0;
+                chip->sl_d2r[sl] = 0;
+                chip->sl_d1l[sl] = 0;
+                chip->sl_rr[sl] = 0;
+            }
+        }
+        else
+        {
+            chip->ch_rl[channel] = 0;
+            chip->ch_fb[channel] = 0;
+            chip->ch_connect[channel] = 0;
+            chip->ch_kc[channel] = 0;
+            chip->ch_kf[channel] = 0;
+            chip->ch_pms[channel] = 0;
+            chip->ch_ams[channel] = 0;
+
+            chip->sl_dt1[slot] = 0;
+            chip->sl_mul[slot] = 0;
+            chip->sl_tl[slot] = 0;
+            chip->sl_ks[slot] = 0;
+            chip->sl_ar[slot] = 0;
+            chip->sl_am_e[slot] = 0;
+            chip->sl_d1r[slot] = 0;
+            chip->sl_dt2[slot] = 0;
+            chip->sl_d2r[slot] = 0;
+            chip->sl_d1l[slot] = 0;
+            chip->sl_rr[slot] = 0;
+        }
 
         chip->timer_a_reg = 0;
         chip->timer_b_reg = 0;
@@ -1879,7 +2061,7 @@ static void OPM_DoIC(opm_t *chip)
         chip->mode_kon_operator[1] = 0;
         chip->mode_kon_operator[2] = 0;
         chip->mode_kon_operator[3] = 0;
-        chip->mode_kon[(slot + 8) % 32] = 0;
+        chip->mode_kon[(slot + 8) & 31] = 0;
 
         chip->lfo_pmd = 0;
         chip->lfo_amd = 0;
@@ -1896,8 +2078,41 @@ static void OPM_DoIC(opm_t *chip)
     chip->ic2 = chip->ic;
 }
 
-void NOPM_Clock(opm_t *chip, int32_t *output, uint8_t *sh1, uint8_t *sh2, uint8_t *so)
+static void OPP_TLRamp(opm_t *chip)
 {
+    uint32_t slot = chip->cycles;
+    uint32_t channel = slot & 7;
+    uint32_t step = ((chip->cycles + 1) & 31) < 8;
+    uint32_t ramp = chip->ch_ramp_div[channel];
+
+    uint32_t match = ramp == chip->opp_tl_cnt[channel];
+    uint32_t tl = chip->sl_tl[slot];
+
+    if (chip->ic || (step && match))
+        chip->opp_tl_cnt[channel] = 0;
+    else
+        chip->opp_tl_cnt[channel] += step;
+
+    if (tl & 128)
+    {
+        if (match)
+        {
+            uint32_t val = chip->opp_tl[slot] >> 3;
+            tl &= 127;
+            if (val < tl)
+                chip->opp_tl[slot]++;
+            else if (val > tl)
+                chip->opp_tl[slot]--;
+        }
+    }
+    else
+        chip->opp_tl[slot] = tl << 3;
+}
+
+void OPM_Clock(opm_t *chip, int32_t *output, uint8_t *sh1, uint8_t *sh2, uint8_t *so)
+{
+    OPM_Output(chip);
+    OPM_DAC(chip);
     OPM_Mixer2(chip);
     OPM_Mixer(chip);
 
@@ -1927,6 +2142,9 @@ void NOPM_Clock(opm_t *chip, int32_t *output, uint8_t *sh1, uint8_t *sh2, uint8_
     OPM_EnvelopePhase2(chip);
     OPM_EnvelopePhase1(chip);
 
+    if (chip->opp)
+        OPP_TLRamp(chip);
+
     OPM_PhaseDebug(chip);
     OPM_PhaseGenerate(chip);
     OPM_PhaseCalcIncrement(chip);
@@ -1949,8 +2167,6 @@ void NOPM_Clock(opm_t *chip, int32_t *output, uint8_t *sh1, uint8_t *sh2, uint8_
     OPM_DoLFO2(chip);
     OPM_CSM(chip);
     OPM_NoiseChannel(chip);
-    OPM_Output(chip);
-    OPM_DAC(chip);
     OPM_DoIC(chip);
     if (sh1)
     {
@@ -1969,10 +2185,10 @@ void NOPM_Clock(opm_t *chip, int32_t *output, uint8_t *sh1, uint8_t *sh2, uint8_
         output[0] = chip->dac_output[0];
         output[1] = chip->dac_output[1];
     }
-    chip->cycles = (chip->cycles + 1) % 32;
+    chip->cycles = (chip->cycles + 1) & 31;
 }
 
-void NOPM_Write(opm_t *chip, uint32_t port, uint8_t data)
+void OPM_Write(opm_t *chip, uint32_t port, uint8_t data)
 {
     chip->write_data = data;
     if (chip->ic)
@@ -1989,9 +2205,11 @@ void NOPM_Write(opm_t *chip, uint32_t port, uint8_t data)
     }
 }
 
-uint8_t NOPM_Read(opm_t *chip, uint32_t port)
+uint8_t OPM_Read(opm_t *chip, uint32_t port)
 {
     uint16_t testdata;
+    if ((port & 1) == 0)
+        return 0xff;
     if (chip->mode_test[6])
     {
         testdata = chip->op_out[5] | ((chip->eg_serial_bit ^ 1) << 14) | ((chip->pg_serial & 1) << 15);
@@ -2007,26 +2225,38 @@ uint8_t NOPM_Read(opm_t *chip, uint32_t port)
     return (chip->write_busy << 7) | (chip->timer_b_status << 1) | chip->timer_a_status;
 }
 
-uint8_t NOPM_ReadIRQ(opm_t *chip)
+uint8_t OPM_ReadIRQ(opm_t *chip)
 {
     return chip->timer_irq;
 }
 
-uint8_t NOPM_ReadCT1(opm_t *chip)
+uint8_t OPM_ReadCT1(opm_t *chip)
 {
-    if(chip->mode_test[3])
+    if (chip->opp)
+    {
+        return chip->io_ct2;
+    }
+    if (chip->mode_test[3])
     {
         return chip->lfo_clock_test;
     }
     return chip->io_ct1;
 }
 
-uint8_t NOPM_ReadCT2(opm_t *chip)
+uint8_t OPM_ReadCT2(opm_t *chip)
 {
+    if (chip->opp)
+    {
+        if (chip->mode_test[3])
+        {
+            return chip->lfo_clock_test;
+        }
+        return chip->io_ct1;
+    }
     return chip->io_ct2;
 }
 
-void NOPM_SetIC(opm_t *chip, uint8_t ic)
+void OPM_SetIC(opm_t *chip, uint8_t ic)
 {
     if (chip->ic != ic)
     {
@@ -2038,180 +2268,15 @@ void NOPM_SetIC(opm_t *chip, uint8_t ic)
     }
 }
 
-void NOPM_Reset(opm_t* chip, uint32_t rate, uint32_t clock)
+void OPM_Reset(opm_t *chip, uint32_t flags)
 {
     uint32_t i;
     memset(chip, 0, sizeof(opm_t));
-    chip->clock = clock;
-    chip->smplRate = rate;
-    NOPM_SetIC(chip, 1);
+    chip->opp = (flags & opm_flags_ym2164) != 0;
+    OPM_SetIC(chip, 1);
     for (i = 0; i < 32 * 64; i++)
     {
-        NOPM_Clock(chip, NULL, NULL, NULL, NULL);
-    }
-    NOPM_SetIC(chip, 0);
-
-    // ratio: sampleRate / (clock / 64) * (1 << resamplerFraction)
-    chip->rateratio = (uint32_t)((((uint64_t)64 * chip->smplRate) << RSM_FRAC) / chip->clock);
-    if (abs(chip->rateratio - (1 << RSM_FRAC)) <= 1)
-        chip->rateratio = (1 << RSM_FRAC);
-}
-
-
-static void OPM_WriteBuffered(opm_t *chip, uint32_t port, uint8_t data)
-{
-    uint64_t time1, time2;
-    int32_t buffer[2];
-    uint64_t skip;
-
-    if (chip->writebuf[chip->writebuf_last].port & 0x02)
-    {
-        NOPM_Write(chip, chip->writebuf[chip->writebuf_last].port & 0x01,
-                   chip->writebuf[chip->writebuf_last].data);
-
-        chip->writebuf[chip->writebuf_last].port &= 0x01;
-        chip->writebuf_cur = (chip->writebuf_last + 1) % OPN_WRITEBUF_SIZE;
-        skip = chip->writebuf[chip->writebuf_last].time - chip->writebuf_samplecnt;
-        chip->writebuf_samplecnt = chip->writebuf[chip->writebuf_last].time;
-        while (skip--)
-        {
-            NOPM_Clock(chip, buffer, NULL, NULL, NULL);
-        }
-    }
-
-    chip->writebuf[chip->writebuf_last].port = (port & 0x01) | 0x02;
-    chip->writebuf[chip->writebuf_last].data = data;
-    time1 = chip->writebuf_lasttime + OPN_WRITEBUF_DELAY;
-    time2 = chip->writebuf_samplecnt;
-
-    if (time1 < time2)
-    {
-        time1 = time2;
-    }
-
-    chip->writebuf[chip->writebuf_last].time = time1;
-    chip->writebuf_lasttime = time1;
-    chip->writebuf_last = (chip->writebuf_last + 1) % OPN_WRITEBUF_SIZE;
-}
-
-static void OPM_GenerateResampled(opm_t *chip, int32_t *buf)
-{
-    uint32_t i;
-    int32_t buffer[2];
-    
-    while (chip->samplecnt >= chip->rateratio)
-    {
-        chip->oldsamples[0] = chip->samples[0];
-        chip->oldsamples[1] = chip->samples[1];
-        chip->samples[0] = chip->samples[1] = 0;
-        for (i = 0; i < 32; i++)
-        {
-            NOPM_Clock(chip, buffer, NULL, NULL, NULL);
-            if (i == 0)
-            {
-                chip->samples[0] += buffer[0];
-                chip->samples[1] += buffer[1];
-            }
-
-            while (chip->writebuf[chip->writebuf_cur].time <= chip->writebuf_samplecnt)
-            {
-                if (!(chip->writebuf[chip->writebuf_cur].port & 0x02))
-                {
-                    break;
-                }
-                chip->writebuf[chip->writebuf_cur].port &= 0x01;
-                NOPM_Write(chip, chip->writebuf[chip->writebuf_cur].port,
-                              chip->writebuf[chip->writebuf_cur].data);
-                chip->writebuf_cur = (chip->writebuf_cur + 1) % OPN_WRITEBUF_SIZE;
-            }
-            chip->writebuf_samplecnt++;
-        }
-        chip->samplecnt -= chip->rateratio;
+        OPM_Clock(chip, NULL, NULL, NULL, NULL);
     }
-    buf[0] = (int32_t)((chip->oldsamples[0] * (chip->rateratio - chip->samplecnt)
-                     + chip->samples[0] * chip->samplecnt) / chip->rateratio);
-    buf[1] = (int32_t)((chip->oldsamples[1] * (chip->rateratio - chip->samplecnt)
-                     + chip->samples[1] * chip->samplecnt) / chip->rateratio);
-    chip->samplecnt += 1 << RSM_FRAC;
-}
-
-static void nukedopm_write(void *chip, UINT8 a, UINT8 v)
-{
-    OPM_WriteBuffered((opm_t *)chip, a, v);
-}
-
-static UINT8 device_start_ym2151_nuked(const DEV_GEN_CFG* cfg, DEV_INFO* retDevInf)
-{
-    opm_t* chip;
-    UINT32 rate;
-    
-    rate = cfg->clock / 64;
-    SRATE_CUSTOM_HIGHEST(cfg->srMode, rate, cfg->smplRate);
-    
-    chip = (opm_t*)calloc(1, sizeof(opm_t));
-    if (chip == NULL)
-        return 0xFF;
-    
-    chip->clock = cfg->clock;
-    chip->smplRate = rate; // save for reset
-    nukedopm_set_mute_mask(chip, 0x00);
-    
-    chip->_devData.chipInf = chip;
-    INIT_DEVINF(retDevInf, &chip->_devData, rate, &devDef_YM2151_Nuked);
-    return 0x00;
-}
-
-static void nukedopm_shutdown(void *chip)
-{
-    free(chip);
-    
-    return;
-}
-
-static void nukedopm_reset_chip(void *chipptr)
-{
-    opm_t *chip = (opm_t *)chipptr;
-    UINT8 chn;
-    DEV_DATA devData;
-    UINT32 mute;
-    
-    devData = chip->_devData;
-    mute = 0;
-    for (chn = 0; chn < 8; chn ++)
-        mute |= (chip->mute[chn] << chn);
-    
-    NOPM_Reset(chip, chip->smplRate, chip->clock);
-    
-    chip->_devData = devData;
-    for (chn = 0; chn < 8; chn ++)
-        chip->mute[chn] = (mute >> chn) & 0x01;
-    
-    return;
-}
-
-static void nukedopm_update(void *chipptr, UINT32 samples, DEV_SMPL **out)
-{
-    opm_t *chip = (opm_t *)chipptr;
-    int32_t buffer[2];
-    UINT32 i;
-    
-    for (i = 0; i < samples; i ++)
-    {
-        OPM_GenerateResampled(chip, buffer);
-        out[0][i] = buffer[0];
-        out[1][i] = buffer[1];
-    }
-    
-    return;
-}
-
-static void nukedopm_set_mute_mask(void *chipptr, UINT32 MuteMask)
-{
-    opm_t *chip = (opm_t *)chipptr;
-    UINT8 chn;
-    
-    for (chn = 0; chn < 8; chn ++)
-        chip->mute[chn] = (MuteMask >> chn) & 0x01;
-    
-    return;
+    OPM_SetIC(chip, 0);
 }

From a0e6dbeaedfbf3f3781dd5993ad5e89e23af124f Mon Sep 17 00:00:00 2001
From: sunkhaskasis <19194315+sunkhaskasis@users.noreply.github.com>
Date: Wed, 18 Feb 2026 22:25:13 +0300
Subject: [PATCH 04/16] Update nukedopm_int.h

---
 emu/cores/nukedopm_int.h | 20 ++++++++++++++++++--
 1 file changed, 18 insertions(+), 2 deletions(-)

diff --git a/emu/cores/nukedopm_int.h b/emu/cores/nukedopm_int.h
index b6051c73..7ddb9136 100644
--- a/emu/cores/nukedopm_int.h
+++ b/emu/cores/nukedopm_int.h
@@ -52,6 +52,10 @@ enum {
 };
 
 typedef struct {
+    DEV_DATA _devData;  // to alias DEV_DATA struct
+    uint32_t clock;
+    uint32_t smplRate;
+
     uint32_t cycles;
     uint8_t ic;
     uint8_t ic2;
@@ -283,6 +287,18 @@ typedef struct {
     uint8_t dac_osh1, dac_osh2;
     uint16_t dac_bits;
     int32_t dac_output[2];
+
+    uint32_t mute[8];
+    int32_t rateratio;
+    int32_t samplecnt;
+    int32_t oldsamples[2];
+    int32_t samples[2];
+
+    uint64_t writebuf_samplecnt;
+    uint32_t writebuf_cur;
+    uint32_t writebuf_last;
+    uint64_t writebuf_lasttime;
+    opm_writebuf writebuf[OPN_WRITEBUF_SIZE];
 } opm_t;
 
 void OPM_Clock(opm_t *chip, int32_t *output, uint8_t *sh1, uint8_t *sh2, uint8_t *so);
@@ -292,10 +308,10 @@ uint8_t OPM_ReadIRQ(opm_t *chip);
 uint8_t OPM_ReadCT1(opm_t *chip);
 uint8_t OPM_ReadCT2(opm_t *chip);
 void OPM_SetIC(opm_t *chip, uint8_t ic);
-void OPM_Reset(opm_t *chip, uint32_t flags);
+void OPM_Reset(opm_t *chip, uint32_t flags, uint32_t rate, uint32_t clock);
 
 #ifdef __cplusplus
 } // extern "C"
 #endif
 
-#endif
+#endif // NUKEDOPM_INT_H

From 912b9ae4b7984f4c3d651c60c7fc3785c00bc68b Mon Sep 17 00:00:00 2001
From: sunkhaskasis <19194315+sunkhaskasis@users.noreply.github.com>
Date: Wed, 18 Feb 2026 22:31:26 +0300
Subject: [PATCH 05/16] Update nukedopm.c

---
 emu/cores/nukedopm.c | 173 ++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 171 insertions(+), 2 deletions(-)

diff --git a/emu/cores/nukedopm.c b/emu/cores/nukedopm.c
index 3d6dc5c4..1475bbbb 100644
--- a/emu/cores/nukedopm.c
+++ b/emu/cores/nukedopm.c
@@ -1051,6 +1051,10 @@ static void OPM_OperatorPhase14(opm_t *chip)
     rl = chip->opp ? chip->op_opp_rl : chip->ch_rl[channel];
     chip->op_mixl = fm_algorithm[chip->op_counter][5][chip->op_connect] && (rl & 1) != 0;
     chip->op_mixr = fm_algorithm[chip->op_counter][5][chip->op_connect] && (rl & 2) != 0;
+    if (chip->mute[channel])
+    {
+        chip->op_mixl = chip->op_mixr = 0;
+    }
 }
 
 static void OPM_OperatorPhase15(opm_t *chip)
@@ -2268,15 +2272,180 @@ void OPM_SetIC(opm_t *chip, uint8_t ic)
     }
 }
 
-void OPM_Reset(opm_t *chip, uint32_t flags)
+void OPM_Reset(opm_t* chip, uint32_t rate, uint32_t clock)
 {
     uint32_t i;
     memset(chip, 0, sizeof(opm_t));
-    chip->opp = (flags & opm_flags_ym2164) != 0;
+    chip->clock = clock;
+    chip->smplRate = rate;
     OPM_SetIC(chip, 1);
     for (i = 0; i < 32 * 64; i++)
     {
         OPM_Clock(chip, NULL, NULL, NULL, NULL);
     }
     OPM_SetIC(chip, 0);
+
+    // ratio: sampleRate / (clock / 64) * (1 << resamplerFraction)
+    chip->rateratio = (uint32_t)((((uint64_t)64 * chip->smplRate) << RSM_FRAC) / chip->clock);
+    if (abs(chip->rateratio - (1 << RSM_FRAC)) <= 1)
+        chip->rateratio = (1 << RSM_FRAC);
+}
+
+
+static void OPM_WriteBuffered(opm_t *chip, uint32_t port, uint8_t data)
+{
+    uint64_t time1, time2;
+    int32_t buffer[2];
+    uint64_t skip;
+
+    if (chip->writebuf[chip->writebuf_last].port & 0x02)
+    {
+        OPM_Write(chip, chip->writebuf[chip->writebuf_last].port & 0x01,
+                   chip->writebuf[chip->writebuf_last].data);
+
+        chip->writebuf[chip->writebuf_last].port &= 0x01;
+        chip->writebuf_cur = (chip->writebuf_last + 1) % OPN_WRITEBUF_SIZE;
+        skip = chip->writebuf[chip->writebuf_last].time - chip->writebuf_samplecnt;
+        chip->writebuf_samplecnt = chip->writebuf[chip->writebuf_last].time;
+        while (skip--)
+        {
+            OPM_Clock(chip, buffer, NULL, NULL, NULL);
+        }
+    }
+
+    chip->writebuf[chip->writebuf_last].port = (port & 0x01) | 0x02;
+    chip->writebuf[chip->writebuf_last].data = data;
+    time1 = chip->writebuf_lasttime + OPN_WRITEBUF_DELAY;
+    time2 = chip->writebuf_samplecnt;
+
+    if (time1 < time2)
+    {
+        time1 = time2;
+    }
+
+    chip->writebuf[chip->writebuf_last].time = time1;
+    chip->writebuf_lasttime = time1;
+    chip->writebuf_last = (chip->writebuf_last + 1) % OPN_WRITEBUF_SIZE;
+}
+
+static void OPM_GenerateResampled(opm_t *chip, int32_t *buf)
+{
+    uint32_t i;
+    int32_t buffer[2];
+    
+    while (chip->samplecnt >= chip->rateratio)
+    {
+        chip->oldsamples[0] = chip->samples[0];
+        chip->oldsamples[1] = chip->samples[1];
+        chip->samples[0] = chip->samples[1] = 0;
+        for (i = 0; i < 32; i++)
+        {
+            OPM_Clock(chip, buffer, NULL, NULL, NULL);
+            if (i == 0)
+            {
+                chip->samples[0] += buffer[0];
+                chip->samples[1] += buffer[1];
+            }
+
+            while (chip->writebuf[chip->writebuf_cur].time <= chip->writebuf_samplecnt)
+            {
+                if (!(chip->writebuf[chip->writebuf_cur].port & 0x02))
+                {
+                    break;
+                }
+                chip->writebuf[chip->writebuf_cur].port &= 0x01;
+                OPM_Write(chip, chip->writebuf[chip->writebuf_cur].port,
+                              chip->writebuf[chip->writebuf_cur].data);
+                chip->writebuf_cur = (chip->writebuf_cur + 1) % OPN_WRITEBUF_SIZE;
+            }
+            chip->writebuf_samplecnt++;
+        }
+        chip->samplecnt -= chip->rateratio;
+    }
+    buf[0] = (int32_t)((chip->oldsamples[0] * (chip->rateratio - chip->samplecnt)
+                     + chip->samples[0] * chip->samplecnt) / chip->rateratio);
+    buf[1] = (int32_t)((chip->oldsamples[1] * (chip->rateratio - chip->samplecnt)
+                     + chip->samples[1] * chip->samplecnt) / chip->rateratio);
+    chip->samplecnt += 1 << RSM_FRAC;
+}
+
+static void nukedopm_write(void *chip, UINT8 a, UINT8 v)
+{
+    OPM_WriteBuffered((opm_t *)chip, a, v);
+}
+
+static UINT8 device_start_ym2151_nuked(const DEV_GEN_CFG* cfg, DEV_INFO* retDevInf)
+{
+    opm_t* chip;
+    UINT32 rate;
+    
+    rate = cfg->clock / 64;
+    SRATE_CUSTOM_HIGHEST(cfg->srMode, rate, cfg->smplRate);
+    
+    chip = (opm_t*)calloc(1, sizeof(opm_t));
+    if (chip == NULL)
+        return 0xFF;
+    
+    chip->clock = cfg->clock;
+    chip->smplRate = rate; // save for reset
+    nukedopm_set_mute_mask(chip, 0x00);
+    
+    chip->_devData.chipInf = chip;
+    INIT_DEVINF(retDevInf, &chip->_devData, rate, &devDef_YM2151_Nuked);
+    return 0x00;
+}
+
+static void nukedopm_shutdown(void *chip)
+{
+    free(chip);
+    
+    return;
+}
+
+static void nukedopm_reset_chip(void *chipptr)
+{
+    opm_t *chip = (opm_t *)chipptr;
+    UINT8 chn;
+    DEV_DATA devData;
+    UINT32 mute;
+    
+    devData = chip->_devData;
+    mute = 0;
+    for (chn = 0; chn < 8; chn ++)
+        mute |= (chip->mute[chn] << chn);
+    
+    OPM_Reset(chip, chip->smplRate, chip->clock);
+    
+    chip->_devData = devData;
+    for (chn = 0; chn < 8; chn ++)
+        chip->mute[chn] = (mute >> chn) & 0x01;
+    
+    return;
+}
+
+static void nukedopm_update(void *chipptr, UINT32 samples, DEV_SMPL **out)
+{
+    opm_t *chip = (opm_t *)chipptr;
+    int32_t buffer[2];
+    UINT32 i;
+    
+    for (i = 0; i < samples; i ++)
+    {
+        OPM_GenerateResampled(chip, buffer);
+        out[0][i] = buffer[0];
+        out[1][i] = buffer[1];
+    }
+    
+    return;
+}
+
+static void nukedopm_set_mute_mask(void *chipptr, UINT32 MuteMask)
+{
+    opm_t *chip = (opm_t *)chipptr;
+    UINT8 chn;
+    
+    for (chn = 0; chn < 8; chn ++)
+        chip->mute[chn] = (MuteMask >> chn) & 0x01;
+    
+    return;
 }

From a8ad1fbfc37b0dc66cbf20aa6c08ed6e4e1d11ee Mon Sep 17 00:00:00 2001
From: sunkhaskasis <19194315+sunkhaskasis@users.noreply.github.com>
Date: Wed, 18 Feb 2026 22:34:49 +0300
Subject: [PATCH 06/16] Update nukedopm.c

---
 emu/cores/nukedopm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/emu/cores/nukedopm.c b/emu/cores/nukedopm.c
index 1475bbbb..86b391a1 100644
--- a/emu/cores/nukedopm.c
+++ b/emu/cores/nukedopm.c
@@ -2272,7 +2272,7 @@ void OPM_SetIC(opm_t *chip, uint8_t ic)
     }
 }
 
-void OPM_Reset(opm_t* chip, uint32_t rate, uint32_t clock)
+void OPM_Reset(opm_t *chip, uint32_t rate, uint32_t clock)
 {
     uint32_t i;
     memset(chip, 0, sizeof(opm_t));

From cdeaab5c8f2f656eca9a06bbf42b43a47f8e6cdf Mon Sep 17 00:00:00 2001
From: sunkhaskasis <19194315+sunkhaskasis@users.noreply.github.com>
Date: Wed, 18 Feb 2026 23:10:46 +0300
Subject: [PATCH 07/16] OPM -> NOPM

---
 emu/cores/nukedopm.c | 262 +++++++++++++++++++++----------------------
 1 file changed, 131 insertions(+), 131 deletions(-)

diff --git a/emu/cores/nukedopm.c b/emu/cores/nukedopm.c
index 86b391a1..e013084b 100644
--- a/emu/cores/nukedopm.c
+++ b/emu/cores/nukedopm.c
@@ -52,7 +52,7 @@ static DEVDEF_RWFUNC devFunc[] =
 };
 DEV_DEF devDef_YM2151_Nuked =
 {
-	"YM2151", "Nuked OPM", FCC_NUKE,
+	"YM2151", "Nuked ", FCC_NUKE,
 	
 	device_start_ym2151_nuked,
 	nukedopm_shutdown,
@@ -277,7 +277,7 @@ static uint16_t lfo_counter2_table[] = {
     0x7ff8, 0x7ffc, 0x7ffe, 0x7fff
 };
 
-static int32_t OPM_KCToFNum(int32_t kcode)
+static int32_t NOPM_KCToFNum(int32_t kcode)
 {
     int32_t kcode_h = (kcode >> 4) & 63;
     int32_t kcode_l = kcode & 15;
@@ -320,7 +320,7 @@ static int32_t OPM_KCToFNum(int32_t kcode)
     return pg_freqtable[kcode_h].basefreq + (sum >> 1);
 }
 
-static int32_t OPM_LFOApplyPMS(int32_t lfo, int32_t pms)
+static int32_t NOPM_LFOApplyPMS(int32_t lfo, int32_t pms)
 {
     int32_t t, out;
     int32_t top = (lfo >> 4) & 7;
@@ -370,7 +370,7 @@ static int32_t OPM_LFOApplyPMS(int32_t lfo, int32_t pms)
     return out;
 }
 
-static int32_t OPM_CalcKCode(int32_t kcf, int32_t lfo, int32_t lfo_sign, int32_t dt)
+static int32_t NOPM_CalcKCode(int32_t kcf, int32_t lfo, int32_t lfo_sign, int32_t dt)
 {
     int32_t t2, t3, b0, b1, b2, b3, w2, w3, w6;
     int32_t overflow1 = 0;
@@ -439,7 +439,7 @@ static int32_t OPM_CalcKCode(int32_t kcf, int32_t lfo, int32_t lfo_sign, int32_t
     return sum;
 }
 
-static void OPM_PhaseCalcFNumBlock(opm_t *chip)
+static void NOPM_PhaseCalcFNumBlock(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 7) & 31;
     uint32_t channel = slot & 7;
@@ -447,9 +447,9 @@ static void OPM_PhaseCalcFNumBlock(opm_t *chip)
     uint32_t lfo = chip->lfo_pmd ? chip->lfo_pm_lock : 0;
     uint32_t pms = chip->opp ? chip->pg_opp_pms : chip->ch_pms[channel];
     uint32_t dt = chip->opp ? chip->pg_opp_dt2[slot] : chip->sl_dt2[slot];
-    int32_t lfo_pm = OPM_LFOApplyPMS(lfo & 127, pms);
-    uint32_t kcode = OPM_CalcKCode(kcf, lfo_pm, (lfo & 0x80) != 0 && pms != 0 ? 0 : 1, dt);
-    uint32_t fnum = OPM_KCToFNum(kcode);
+    int32_t lfo_pm = NOPM_LFOApplyPMS(lfo & 127, pms);
+    uint32_t kcode = NOPM_CalcKCode(kcf, lfo_pm, (lfo & 0x80) != 0 && pms != 0 ? 0 : 1, dt);
+    uint32_t fnum = NOPM_KCToFNum(kcode);
     uint32_t kcode_h = kcode >> 8;
     chip->pg_fnum[slot] = fnum;
     chip->pg_kcode[slot] = kcode_h;
@@ -463,7 +463,7 @@ static void OPM_PhaseCalcFNumBlock(opm_t *chip)
     }
 }
 
-static void OPM_PhaseCalcIncrement(opm_t *chip)
+static void NOPM_PhaseCalcIncrement(opm_t *chip)
 {
     uint32_t slot = chip->cycles;
     uint32_t channel = slot & 7;
@@ -511,7 +511,7 @@ static void OPM_PhaseCalcIncrement(opm_t *chip)
     chip->pg_inc[slot] = inc;
 }
 
-static void OPM_PhaseGenerate(opm_t *chip)
+static void NOPM_PhaseGenerate(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 27) & 31;
     chip->pg_reset_latch[slot] = chip->pg_reset[slot];
@@ -531,7 +531,7 @@ static void OPM_PhaseGenerate(opm_t *chip)
     chip->pg_phase[slot] &= 0xfffff;
 }
 
-static void OPM_PhaseDebug(opm_t *chip)
+static void NOPM_PhaseDebug(opm_t *chip)
 {
     chip->pg_serial >>= 1;
     if (chip->cycles == 5)
@@ -540,7 +540,7 @@ static void OPM_PhaseDebug(opm_t *chip)
     }
 }
 
-static void OPM_KeyOn1(opm_t *chip)
+static void NOPM_KeyOn1(opm_t *chip)
 {
     uint32_t cycles = (chip->cycles + 1) & 31;
     chip->kon_chanmatch = 0;
@@ -550,7 +550,7 @@ static void OPM_KeyOn1(opm_t *chip)
     }
 }
 
-static void OPM_KeyOn2(opm_t *chip)
+static void NOPM_KeyOn2(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 8) & 31;
     if (chip->kon_chanmatch)
@@ -562,7 +562,7 @@ static void OPM_KeyOn2(opm_t *chip)
     }
 }
 
-static void OPM_EnvelopePhase1(opm_t *chip)
+static void NOPM_EnvelopePhase1(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 2) & 31;
     uint32_t kon = chip->mode_kon[slot] | chip->kon_csm;
@@ -571,7 +571,7 @@ static void OPM_EnvelopePhase1(opm_t *chip)
     chip->kon[slot] = kon;
 }
 
-static void OPM_EnvelopePhase2(opm_t *chip)
+static void NOPM_EnvelopePhase2(opm_t *chip)
 {
     uint32_t slot = chip->cycles;
     uint32_t chan = slot & 7;
@@ -657,7 +657,7 @@ static void OPM_EnvelopePhase2(opm_t *chip)
     }
 }
 
-static void OPM_EnvelopePhase3(opm_t *chip)
+static void NOPM_EnvelopePhase3(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 31) & 31;
     chip->eg_shift = (chip->eg_timershift_lock + (chip->eg_rate[0] >> 2)) & 15;
@@ -671,7 +671,7 @@ static void OPM_EnvelopePhase3(opm_t *chip)
     }
 }
 
-static void OPM_EnvelopePhase4(opm_t *chip)
+static void NOPM_EnvelopePhase4(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 30) & 31;
     uint8_t inc = 0;
@@ -777,7 +777,7 @@ static void OPM_EnvelopePhase4(opm_t *chip)
     }
 }
 
-static void OPM_EnvelopePhase5(opm_t *chip)
+static void NOPM_EnvelopePhase5(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 29) & 31;
     uint32_t level = chip->eg_level[slot];
@@ -822,7 +822,7 @@ static void OPM_EnvelopePhase5(opm_t *chip)
     chip->eg_test = chip->mode_test[5];
 }
 
-static void OPM_EnvelopePhase6(opm_t *chip)
+static void NOPM_EnvelopePhase6(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 28) & 31;
     chip->eg_serial_bit = (chip->eg_serial >> 9) & 1;
@@ -838,7 +838,7 @@ static void OPM_EnvelopePhase6(opm_t *chip)
     chip->eg_out[1] = chip->eg_out[0];
 }
 
-static void OPM_EnvelopeClock(opm_t *chip)
+static void NOPM_EnvelopeClock(opm_t *chip)
 {
     chip->eg_clock <<= 1;
     if ((chip->eg_clockcnt & 2) != 0 || chip->mode_test[0])
@@ -855,7 +855,7 @@ static void OPM_EnvelopeClock(opm_t *chip)
     }
 }
 
-static void OPM_EnvelopeTimer(opm_t *chip)
+static void NOPM_EnvelopeTimer(opm_t *chip)
 {
     uint32_t cycle = (chip->cycles + 31) & 15;
     uint32_t cycle2;
@@ -907,7 +907,7 @@ static void OPM_EnvelopeTimer(opm_t *chip)
     }
 }
 
-static void OPM_OperatorPhase1(opm_t *chip)
+static void NOPM_OperatorPhase1(opm_t *chip)
 {
     uint32_t slot = chip->cycles;
     int16_t mod = chip->op_mod[2];
@@ -926,13 +926,13 @@ static void OPM_OperatorPhase1(opm_t *chip)
     chip->op_mod_in = mod;
 }
 
-static void OPM_OperatorPhase2(opm_t *chip)
+static void NOPM_OperatorPhase2(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 31) & 31;
     chip->op_phase = (chip->op_phase_in + chip->op_mod_in) & 1023;
 }
 
-static void OPM_OperatorPhase3(opm_t *chip)
+static void NOPM_OperatorPhase3(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 30) & 31;
     uint16_t phase = chip->op_phase & 255;
@@ -945,19 +945,19 @@ static void OPM_OperatorPhase3(opm_t *chip)
     chip->op_sign |= (chip->op_phase >> 9) & 1;
 }
 
-static void OPM_OperatorPhase4(opm_t *chip)
+static void NOPM_OperatorPhase4(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 29) & 31;
     chip->op_logsin[1] = chip->op_logsin[0];
 }
 
-static void OPM_OperatorPhase5(opm_t *chip)
+static void NOPM_OperatorPhase5(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 28) & 31;
     chip->op_logsin[2] = chip->op_logsin[1];
 }
 
-static void OPM_OperatorPhase6(opm_t *chip)
+static void NOPM_OperatorPhase6(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 27) & 31;
     chip->op_atten = chip->op_logsin[2] + (chip->eg_out[1] << 2);
@@ -967,21 +967,21 @@ static void OPM_OperatorPhase6(opm_t *chip)
     }
 }
 
-static void OPM_OperatorPhase7(opm_t *chip)
+static void NOPM_OperatorPhase7(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 26) & 31;
     chip->op_exp[0] = exprom[chip->op_atten & 255];
     chip->op_pow[0] = chip->op_atten >> 8;
 }
 
-static void OPM_OperatorPhase8(opm_t *chip)
+static void NOPM_OperatorPhase8(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 25) & 31;
     chip->op_exp[1] = chip->op_exp[0];
     chip->op_pow[1] = chip->op_pow[0];
 }
 
-static void OPM_OperatorPhase9(opm_t *chip)
+static void NOPM_OperatorPhase9(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 24) & 31;
     int16_t out = (chip->op_exp[1] << 2) >> (chip->op_pow[1]);
@@ -992,7 +992,7 @@ static void OPM_OperatorPhase9(opm_t *chip)
     chip->op_out[0] = out;
 }
 
-static void OPM_OperatorPhase10(opm_t *chip)
+static void NOPM_OperatorPhase10(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 23) & 31;
     int16_t out = chip->op_out[0];
@@ -1005,19 +1005,19 @@ static void OPM_OperatorPhase10(opm_t *chip)
     chip->op_out[1] = out;
 }
 
-static void OPM_OperatorPhase11(opm_t *chip)
+static void NOPM_OperatorPhase11(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 22) & 31;
     chip->op_out[2] = chip->op_out[1];
 }
 
-static void OPM_OperatorPhase12(opm_t *chip)
+static void NOPM_OperatorPhase12(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 21) & 31;
     chip->op_out[3] = chip->op_out[2];
 }
 
-static void OPM_OperatorPhase13(opm_t *chip)
+static void NOPM_OperatorPhase13(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 20) & 31;
     uint32_t channel = slot & 7;
@@ -1032,7 +1032,7 @@ static void OPM_OperatorPhase13(opm_t *chip)
     }
 }
 
-static void OPM_OperatorPhase14(opm_t *chip)
+static void NOPM_OperatorPhase14(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 19) & 31;
     uint32_t channel = slot & 7;
@@ -1057,7 +1057,7 @@ static void OPM_OperatorPhase14(opm_t *chip)
     }
 }
 
-static void OPM_OperatorPhase15(opm_t *chip)
+static void NOPM_OperatorPhase15(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 18) & 31;
     int16_t mod, mod1 = 0, mod2 = 0;
@@ -1094,7 +1094,7 @@ static void OPM_OperatorPhase15(opm_t *chip)
     }
 }
 
-static void OPM_OperatorPhase16(opm_t *chip)
+static void NOPM_OperatorPhase16(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 17) & 31;
     // hack
@@ -1105,7 +1105,7 @@ static void OPM_OperatorPhase16(opm_t *chip)
     chip->op_fb[0] = chip->opp ? chip->op_opp_fb[2] : chip->ch_fb[slot & 7];
 }
 
-static void OPM_OperatorCounter(opm_t *chip)
+static void NOPM_OperatorCounter(opm_t *chip)
 {
     if ((chip->cycles & 7) == 4)
     {
@@ -1117,7 +1117,7 @@ static void OPM_OperatorCounter(opm_t *chip)
     }
 }
 
-static void OPM_Mixer2(opm_t *chip)
+static void NOPM_Mixer2(opm_t *chip)
 {
     uint32_t cycles = (chip->cycles + 30) & 31;
     uint8_t bit;
@@ -1199,7 +1199,7 @@ static void OPM_Mixer2(opm_t *chip)
     chip->mix_bits |= bit << 20;
 }
 
-static void OPM_Output(opm_t *chip)
+static void NOPM_Output(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 27) & 31;
     chip->smp_so = (chip->mix_out_bit & 1) != 0;
@@ -1207,7 +1207,7 @@ static void OPM_Output(opm_t *chip)
     chip->smp_sh2 = (slot & 24) == 24 && !chip->ic;
 }
 
-static void OPM_DAC(opm_t *chip)
+static void NOPM_DAC(opm_t *chip)
 {
     int32_t exp, mant;
     if (chip->dac_osh1 && !chip->smp_sh1)
@@ -1230,7 +1230,7 @@ static void OPM_DAC(opm_t *chip)
     chip->dac_osh2 = chip->smp_sh2;
 }
 
-static void OPM_Mixer(opm_t *chip)
+static void NOPM_Mixer(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 18) & 31;
     uint32_t channel = (slot & 7);
@@ -1342,7 +1342,7 @@ static void OPM_Mixer(opm_t *chip)
     chip->mix[1] += chip->op_mix * chip->op_mixr;
 }
 
-static void OPM_Noise(opm_t *chip)
+static void NOPM_Noise(opm_t *chip)
 {
     uint8_t noise_step = chip->ic || chip->noise_update;
     uint8_t bit = 0;
@@ -1362,7 +1362,7 @@ static void OPM_Noise(opm_t *chip)
     chip->noise_lfsr |= bit << 15;
 }
 
-static void OPM_NoiseTimer(opm_t *chip)
+static void NOPM_NoiseTimer(opm_t *chip)
 {
     uint32_t timer = chip->noise_timer;
 
@@ -1382,7 +1382,7 @@ static void OPM_NoiseTimer(opm_t *chip)
     chip->noise_timer = timer;
 }
 
-static void OPM_DoTimerA(opm_t *chip)
+static void NOPM_DoTimerA(opm_t *chip)
 {
     uint16_t value = chip->timer_a_val;
     value += chip->timer_a_inc;
@@ -1399,7 +1399,7 @@ static void OPM_DoTimerA(opm_t *chip)
     chip->timer_a_val = value & 1023;
 }
 
-static void OPM_DoTimerA2(opm_t *chip)
+static void NOPM_DoTimerA2(opm_t *chip)
 {
     if (chip->cycles == 1)
     {
@@ -1420,7 +1420,7 @@ static void OPM_DoTimerA2(opm_t *chip)
     chip->timer_reseta = 0;
 }
 
-static void OPM_DoTimerB(opm_t *chip)
+static void NOPM_DoTimerB(opm_t *chip)
 {
     uint16_t value = chip->timer_b_val;
     value += chip->timer_b_inc;
@@ -1457,7 +1457,7 @@ static void OPM_DoTimerB(opm_t *chip)
     }
 }
 
-static void OPM_DoTimerB2(opm_t *chip)
+static void NOPM_DoTimerB2(opm_t *chip)
 {
     chip->timer_b_inc = chip->mode_test[2] || (chip->timer_loadb && chip->timer_b_sub_of);
     chip->timer_b_do_load = chip->timer_b_of || (chip->timer_loadb && chip->timer_b_temp);
@@ -1474,12 +1474,12 @@ static void OPM_DoTimerB2(opm_t *chip)
     chip->timer_resetb = 0;
 }
 
-static void OPM_DoTimerIRQ(opm_t *chip)
+static void NOPM_DoTimerIRQ(opm_t *chip)
 {
     chip->timer_irq = chip->timer_a_status || chip->timer_b_status;
 }
 
-static void OPM_DoLFOMult(opm_t *chip)
+static void NOPM_DoLFOMult(opm_t *chip)
 {
     uint8_t ampm_sel = (chip->lfo_bit_counter & 8) != 0;
     uint8_t dp = ampm_sel ? chip->lfo_pmd : chip->lfo_amd;
@@ -1529,7 +1529,7 @@ static void OPM_DoLFOMult(opm_t *chip)
     chip->lfo_mult_carry = sum >> 1;
 }
 
-static void OPM_DoLFO1(opm_t *chip)
+static void NOPM_DoLFO1(opm_t *chip)
 {
     uint16_t counter2 = chip->lfo_counter2;
     uint8_t of_old = chip->lfo_counter2_of;
@@ -1637,7 +1637,7 @@ static void OPM_DoLFO1(opm_t *chip)
     chip->lfo_counter1_of2 = chip->lfo_counter1 == 2;
 }
 
-static void OPM_DoLFO2(opm_t *chip)
+static void NOPM_DoLFO2(opm_t *chip)
 {
     chip->lfo_clock_test = chip->lfo_clock;
     chip->lfo_clock = (chip->lfo_counter2_of || chip->lfo_test || chip->lfo_counter3_step);
@@ -1669,7 +1669,7 @@ static void OPM_DoLFO2(opm_t *chip)
     chip->lfo_test = chip->mode_test[2];
 }
 
-static void OPM_CSM(opm_t *chip)
+static void NOPM_CSM(opm_t *chip)
 {
     chip->kon_csm = chip->kon_csm_lock;
     if (chip->cycles == 1)
@@ -1678,7 +1678,7 @@ static void OPM_CSM(opm_t *chip)
     }
 }
 
-static void OPM_NoiseChannel(opm_t *chip)
+static void NOPM_NoiseChannel(opm_t *chip)
 {
     chip->nc_active |= chip->eg_serial_bit & 1;
     if (chip->cycles == 13)
@@ -1708,7 +1708,7 @@ static void OPM_NoiseChannel(opm_t *chip)
     }
 }
 
-static void OPM_DoIO(opm_t *chip)
+static void NOPM_DoIO(opm_t *chip)
 {
     // Busy
     chip->write_busy_cnt += chip->write_busy;
@@ -1725,7 +1725,7 @@ static void OPM_DoIO(opm_t *chip)
     chip->write_d = 0;
 }
 
-static void OPM_DoRegWrite(opm_t *chip)
+static void NOPM_DoRegWrite(opm_t *chip)
 {
     int32_t i;
     uint32_t cycles = chip->opp ? (chip->cycles + 1) & 31 : chip->cycles;
@@ -1981,7 +1981,7 @@ static void OPM_DoRegWrite(opm_t *chip)
     }
 }
 
-static void OPM_DoIC(opm_t *chip)
+static void NOPM_DoIC(opm_t *chip)
 {
     uint32_t channel = chip->cycles & 7;
     uint32_t slot = chip->cycles;
@@ -2113,65 +2113,65 @@ static void OPP_TLRamp(opm_t *chip)
         chip->opp_tl[slot] = tl << 3;
 }
 
-void OPM_Clock(opm_t *chip, int32_t *output, uint8_t *sh1, uint8_t *sh2, uint8_t *so)
-{
-    OPM_Output(chip);
-    OPM_DAC(chip);
-    OPM_Mixer2(chip);
-    OPM_Mixer(chip);
-
-    OPM_OperatorPhase16(chip);
-    OPM_OperatorPhase15(chip);
-    OPM_OperatorPhase14(chip);
-    OPM_OperatorPhase13(chip);
-    OPM_OperatorPhase12(chip);
-    OPM_OperatorPhase11(chip);
-    OPM_OperatorPhase10(chip);
-    OPM_OperatorPhase9(chip);
-    OPM_OperatorPhase8(chip);
-    OPM_OperatorPhase7(chip);
-    OPM_OperatorPhase6(chip);
-    OPM_OperatorPhase5(chip);
-    OPM_OperatorPhase4(chip);
-    OPM_OperatorPhase3(chip);
-    OPM_OperatorPhase2(chip);
-    OPM_OperatorPhase1(chip);
-    OPM_OperatorCounter(chip);
-
-    OPM_EnvelopeTimer(chip);
-    OPM_EnvelopePhase6(chip);
-    OPM_EnvelopePhase5(chip);
-    OPM_EnvelopePhase4(chip);
-    OPM_EnvelopePhase3(chip);
-    OPM_EnvelopePhase2(chip);
-    OPM_EnvelopePhase1(chip);
+void NOPM_Clock(opm_t *chip, int32_t *output, uint8_t *sh1, uint8_t *sh2, uint8_t *so)
+{
+    NOPM_Output(chip);
+    NOPM_DAC(chip);
+    NOPM_Mixer2(chip);
+    NOPM_Mixer(chip);
+
+    NOPM_OperatorPhase16(chip);
+    NOPM_OperatorPhase15(chip);
+    NOPM_OperatorPhase14(chip);
+    NOPM_OperatorPhase13(chip);
+    NOPM_OperatorPhase12(chip);
+    NOPM_OperatorPhase11(chip);
+    NOPM_OperatorPhase10(chip);
+    NOPM_OperatorPhase9(chip);
+    NOPM_OperatorPhase8(chip);
+    NOPM_OperatorPhase7(chip);
+    NOPM_OperatorPhase6(chip);
+    NOPM_OperatorPhase5(chip);
+    NOPM_OperatorPhase4(chip);
+    NOPM_OperatorPhase3(chip);
+    NOPM_OperatorPhase2(chip);
+    NOPM_OperatorPhase1(chip);
+    NOPM_OperatorCounter(chip);
+
+    NOPM_EnvelopeTimer(chip);
+    NOPM_EnvelopePhase6(chip);
+    NOPM_EnvelopePhase5(chip);
+    NOPM_EnvelopePhase4(chip);
+    NOPM_EnvelopePhase3(chip);
+    NOPM_EnvelopePhase2(chip);
+    NOPM_EnvelopePhase1(chip);
 
     if (chip->opp)
         OPP_TLRamp(chip);
 
-    OPM_PhaseDebug(chip);
-    OPM_PhaseGenerate(chip);
-    OPM_PhaseCalcIncrement(chip);
-    OPM_PhaseCalcFNumBlock(chip);
-
-    OPM_DoTimerIRQ(chip);
-    OPM_DoTimerA(chip);
-    OPM_DoTimerB(chip);
-    OPM_DoLFOMult(chip);
-    OPM_DoLFO1(chip);
-    OPM_Noise(chip);
-    OPM_KeyOn2(chip);
-    OPM_DoRegWrite(chip);
-    OPM_EnvelopeClock(chip);
-    OPM_NoiseTimer(chip);
-    OPM_KeyOn1(chip);
-    OPM_DoIO(chip);
-    OPM_DoTimerA2(chip);
-    OPM_DoTimerB2(chip);
-    OPM_DoLFO2(chip);
-    OPM_CSM(chip);
-    OPM_NoiseChannel(chip);
-    OPM_DoIC(chip);
+    NOPM_PhaseDebug(chip);
+    NOPM_PhaseGenerate(chip);
+    NOPM_PhaseCalcIncrement(chip);
+    NOPM_PhaseCalcFNumBlock(chip);
+
+    NOPM_DoTimerIRQ(chip);
+    NOPM_DoTimerA(chip);
+    NOPM_DoTimerB(chip);
+    NOPM_DoLFOMult(chip);
+    NOPM_DoLFO1(chip);
+    NOPM_Noise(chip);
+    NOPM_KeyOn2(chip);
+    NOPM_DoRegWrite(chip);
+    NOPM_EnvelopeClock(chip);
+    NOPM_NoiseTimer(chip);
+    NOPM_KeyOn1(chip);
+    NOPM_DoIO(chip);
+    NOPM_DoTimerA2(chip);
+    NOPM_DoTimerB2(chip);
+    NOPM_DoLFO2(chip);
+    NOPM_CSM(chip);
+    NOPM_NoiseChannel(chip);
+    NOPM_DoIC(chip);
     if (sh1)
     {
         *sh1 = chip->smp_sh1;
@@ -2192,7 +2192,7 @@ void OPM_Clock(opm_t *chip, int32_t *output, uint8_t *sh1, uint8_t *sh2, uint8_t
     chip->cycles = (chip->cycles + 1) & 31;
 }
 
-void OPM_Write(opm_t *chip, uint32_t port, uint8_t data)
+void NOPM_Write(opm_t *chip, uint32_t port, uint8_t data)
 {
     chip->write_data = data;
     if (chip->ic)
@@ -2209,7 +2209,7 @@ void OPM_Write(opm_t *chip, uint32_t port, uint8_t data)
     }
 }
 
-uint8_t OPM_Read(opm_t *chip, uint32_t port)
+uint8_t NOPM_Read(opm_t *chip, uint32_t port)
 {
     uint16_t testdata;
     if ((port & 1) == 0)
@@ -2229,12 +2229,12 @@ uint8_t OPM_Read(opm_t *chip, uint32_t port)
     return (chip->write_busy << 7) | (chip->timer_b_status << 1) | chip->timer_a_status;
 }
 
-uint8_t OPM_ReadIRQ(opm_t *chip)
+uint8_t NOPM_ReadIRQ(opm_t *chip)
 {
     return chip->timer_irq;
 }
 
-uint8_t OPM_ReadCT1(opm_t *chip)
+uint8_t NOPM_ReadCT1(opm_t *chip)
 {
     if (chip->opp)
     {
@@ -2247,7 +2247,7 @@ uint8_t OPM_ReadCT1(opm_t *chip)
     return chip->io_ct1;
 }
 
-uint8_t OPM_ReadCT2(opm_t *chip)
+uint8_t NOPM_ReadCT2(opm_t *chip)
 {
     if (chip->opp)
     {
@@ -2260,7 +2260,7 @@ uint8_t OPM_ReadCT2(opm_t *chip)
     return chip->io_ct2;
 }
 
-void OPM_SetIC(opm_t *chip, uint8_t ic)
+void NOPM_SetIC(opm_t *chip, uint8_t ic)
 {
     if (chip->ic != ic)
     {
@@ -2272,18 +2272,18 @@ void OPM_SetIC(opm_t *chip, uint8_t ic)
     }
 }
 
-void OPM_Reset(opm_t *chip, uint32_t rate, uint32_t clock)
+void NOPM_Reset(opm_t *chip, uint32_t flags, uint32_t rate, uint32_t clock);
 {
     uint32_t i;
     memset(chip, 0, sizeof(opm_t));
     chip->clock = clock;
     chip->smplRate = rate;
-    OPM_SetIC(chip, 1);
+    NOPM_SetIC(chip, 1);
     for (i = 0; i < 32 * 64; i++)
     {
-        OPM_Clock(chip, NULL, NULL, NULL, NULL);
+        NOPM_Clock(chip, NULL, NULL, NULL, NULL);
     }
-    OPM_SetIC(chip, 0);
+    NOPM_SetIC(chip, 0);
 
     // ratio: sampleRate / (clock / 64) * (1 << resamplerFraction)
     chip->rateratio = (uint32_t)((((uint64_t)64 * chip->smplRate) << RSM_FRAC) / chip->clock);
@@ -2292,7 +2292,7 @@ void OPM_Reset(opm_t *chip, uint32_t rate, uint32_t clock)
 }
 
 
-static void OPM_WriteBuffered(opm_t *chip, uint32_t port, uint8_t data)
+static void NOPM_WriteBuffered(opm_t *chip, uint32_t port, uint8_t data)
 {
     uint64_t time1, time2;
     int32_t buffer[2];
@@ -2300,7 +2300,7 @@ static void OPM_WriteBuffered(opm_t *chip, uint32_t port, uint8_t data)
 
     if (chip->writebuf[chip->writebuf_last].port & 0x02)
     {
-        OPM_Write(chip, chip->writebuf[chip->writebuf_last].port & 0x01,
+        NOPM_Write(chip, chip->writebuf[chip->writebuf_last].port & 0x01,
                    chip->writebuf[chip->writebuf_last].data);
 
         chip->writebuf[chip->writebuf_last].port &= 0x01;
@@ -2309,7 +2309,7 @@ static void OPM_WriteBuffered(opm_t *chip, uint32_t port, uint8_t data)
         chip->writebuf_samplecnt = chip->writebuf[chip->writebuf_last].time;
         while (skip--)
         {
-            OPM_Clock(chip, buffer, NULL, NULL, NULL);
+            NOPM_Clock(chip, buffer, NULL, NULL, NULL);
         }
     }
 
@@ -2328,7 +2328,7 @@ static void OPM_WriteBuffered(opm_t *chip, uint32_t port, uint8_t data)
     chip->writebuf_last = (chip->writebuf_last + 1) % OPN_WRITEBUF_SIZE;
 }
 
-static void OPM_GenerateResampled(opm_t *chip, int32_t *buf)
+static void NOPM_GenerateResampled(opm_t *chip, int32_t *buf)
 {
     uint32_t i;
     int32_t buffer[2];
@@ -2340,7 +2340,7 @@ static void OPM_GenerateResampled(opm_t *chip, int32_t *buf)
         chip->samples[0] = chip->samples[1] = 0;
         for (i = 0; i < 32; i++)
         {
-            OPM_Clock(chip, buffer, NULL, NULL, NULL);
+            NOPM_Clock(chip, buffer, NULL, NULL, NULL);
             if (i == 0)
             {
                 chip->samples[0] += buffer[0];
@@ -2354,7 +2354,7 @@ static void OPM_GenerateResampled(opm_t *chip, int32_t *buf)
                     break;
                 }
                 chip->writebuf[chip->writebuf_cur].port &= 0x01;
-                OPM_Write(chip, chip->writebuf[chip->writebuf_cur].port,
+                NOPM_Write(chip, chip->writebuf[chip->writebuf_cur].port,
                               chip->writebuf[chip->writebuf_cur].data);
                 chip->writebuf_cur = (chip->writebuf_cur + 1) % OPN_WRITEBUF_SIZE;
             }
@@ -2371,7 +2371,7 @@ static void OPM_GenerateResampled(opm_t *chip, int32_t *buf)
 
 static void nukedopm_write(void *chip, UINT8 a, UINT8 v)
 {
-    OPM_WriteBuffered((opm_t *)chip, a, v);
+    NOPM_WriteBuffered((opm_t *)chip, a, v);
 }
 
 static UINT8 device_start_ym2151_nuked(const DEV_GEN_CFG* cfg, DEV_INFO* retDevInf)
@@ -2414,7 +2414,7 @@ static void nukedopm_reset_chip(void *chipptr)
     for (chn = 0; chn < 8; chn ++)
         mute |= (chip->mute[chn] << chn);
     
-    OPM_Reset(chip, chip->smplRate, chip->clock);
+    NOPM_Reset(chip, chip->smplRate, chip->clock);
     
     chip->_devData = devData;
     for (chn = 0; chn < 8; chn ++)
@@ -2431,7 +2431,7 @@ static void nukedopm_update(void *chipptr, UINT32 samples, DEV_SMPL **out)
     
     for (i = 0; i < samples; i ++)
     {
-        OPM_GenerateResampled(chip, buffer);
+        NOPM_GenerateResampled(chip, buffer);
         out[0][i] = buffer[0];
         out[1][i] = buffer[1];
     }

From 4da97e48e6969dbf5de313c5657b9cd8578da3be Mon Sep 17 00:00:00 2001
From: sunkhaskasis <19194315+sunkhaskasis@users.noreply.github.com>
Date: Wed, 18 Feb 2026 23:11:19 +0300
Subject: [PATCH 08/16] OPM -> NOPM

---
 emu/cores/nukedopm_int.h | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/emu/cores/nukedopm_int.h b/emu/cores/nukedopm_int.h
index 7ddb9136..a8a4c3b0 100644
--- a/emu/cores/nukedopm_int.h
+++ b/emu/cores/nukedopm_int.h
@@ -301,14 +301,14 @@ typedef struct {
     opm_writebuf writebuf[OPN_WRITEBUF_SIZE];
 } opm_t;
 
-void OPM_Clock(opm_t *chip, int32_t *output, uint8_t *sh1, uint8_t *sh2, uint8_t *so);
-void OPM_Write(opm_t *chip, uint32_t port, uint8_t data);
-uint8_t OPM_Read(opm_t *chip, uint32_t port);
-uint8_t OPM_ReadIRQ(opm_t *chip);
-uint8_t OPM_ReadCT1(opm_t *chip);
-uint8_t OPM_ReadCT2(opm_t *chip);
-void OPM_SetIC(opm_t *chip, uint8_t ic);
-void OPM_Reset(opm_t *chip, uint32_t flags, uint32_t rate, uint32_t clock);
+void NOPM_Clock(opm_t *chip, int32_t *output, uint8_t *sh1, uint8_t *sh2, uint8_t *so);
+void NOPM_Write(opm_t *chip, uint32_t port, uint8_t data);
+uint8_t NOPM_Read(opm_t *chip, uint32_t port);
+uint8_t NOPM_ReadIRQ(opm_t *chip);
+uint8_t NOPM_ReadCT1(opm_t *chip);
+uint8_t NOPM_ReadCT2(opm_t *chip);
+void NOPM_SetIC(opm_t *chip, uint8_t ic);
+void NOPM_Reset(opm_t *chip, uint32_t flags, uint32_t rate, uint32_t clock);
 
 #ifdef __cplusplus
 } // extern "C"

From 8862cb86520a477fe3428eb5154c02f3e4d134b7 Mon Sep 17 00:00:00 2001
From: sunkhaskasis <19194315+sunkhaskasis@users.noreply.github.com>
Date: Wed, 18 Feb 2026 23:14:37 +0300
Subject: [PATCH 09/16] Update nukedopm.c

---
 emu/cores/nukedopm.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/emu/cores/nukedopm.c b/emu/cores/nukedopm.c
index e013084b..93225b16 100644
--- a/emu/cores/nukedopm.c
+++ b/emu/cores/nukedopm.c
@@ -1,3 +1,5 @@
+// license:LGPL-2.1+
+// copyright-holders:Nuke.YKT
 /* Nuked OPM
  * Copyright (C) 2020, 2026 Nuke.YKT
  *
@@ -52,7 +54,7 @@ static DEVDEF_RWFUNC devFunc[] =
 };
 DEV_DEF devDef_YM2151_Nuked =
 {
-	"YM2151", "Nuked ", FCC_NUKE,
+	"YM2151", "Nuked OPM", FCC_NUKE,
 	
 	device_start_ym2151_nuked,
 	nukedopm_shutdown,

From e82ec0b3c036863afda33bec2b4669e183b25493 Mon Sep 17 00:00:00 2001
From: sunkhaskasis <19194315+sunkhaskasis@users.noreply.github.com>
Date: Wed, 18 Feb 2026 23:14:49 +0300
Subject: [PATCH 10/16] Update nukedopm_int.h

---
 emu/cores/nukedopm_int.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/emu/cores/nukedopm_int.h b/emu/cores/nukedopm_int.h
index a8a4c3b0..bb87db1a 100644
--- a/emu/cores/nukedopm_int.h
+++ b/emu/cores/nukedopm_int.h
@@ -1,3 +1,5 @@
+// license:LGPL-2.1+
+// copyright-holders:Nuke.YKT
 /* Nuked OPM
  * Copyright (C) 2020, 2026 Nuke.YKT
  *

From 430a42154749fe2cabc20352dc60bfd5e4fb8015 Mon Sep 17 00:00:00 2001
From: sunkhaskasis <19194315+sunkhaskasis@users.noreply.github.com>
Date: Thu, 19 Feb 2026 16:02:06 +0300
Subject: [PATCH 11/16] remove "flags" as it's not used

---
 emu/cores/nukedopm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/emu/cores/nukedopm.c b/emu/cores/nukedopm.c
index 93225b16..424b6423 100644
--- a/emu/cores/nukedopm.c
+++ b/emu/cores/nukedopm.c
@@ -2274,7 +2274,7 @@ void NOPM_SetIC(opm_t *chip, uint8_t ic)
     }
 }
 
-void NOPM_Reset(opm_t *chip, uint32_t flags, uint32_t rate, uint32_t clock);
+void NOPM_Reset(opm_t *chip, uint32_t rate, uint32_t clock);
 {
     uint32_t i;
     memset(chip, 0, sizeof(opm_t));

From 7e7e7aa05beb782b7391a6896f59fef357264129 Mon Sep 17 00:00:00 2001
From: sunkhaskasis <19194315+sunkhaskasis@users.noreply.github.com>
Date: Thu, 19 Feb 2026 16:02:44 +0300
Subject: [PATCH 12/16] remove "flags" as it's not used

---
 emu/cores/nukedopm_int.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/emu/cores/nukedopm_int.h b/emu/cores/nukedopm_int.h
index bb87db1a..0b12108d 100644
--- a/emu/cores/nukedopm_int.h
+++ b/emu/cores/nukedopm_int.h
@@ -310,7 +310,7 @@ uint8_t NOPM_ReadIRQ(opm_t *chip);
 uint8_t NOPM_ReadCT1(opm_t *chip);
 uint8_t NOPM_ReadCT2(opm_t *chip);
 void NOPM_SetIC(opm_t *chip, uint8_t ic);
-void NOPM_Reset(opm_t *chip, uint32_t flags, uint32_t rate, uint32_t clock);
+void NOPM_Reset(opm_t *chip, uint32_t rate, uint32_t clock);
 
 #ifdef __cplusplus
 } // extern "C"

From ef1eb57be338b322f0c1c83426688ab4abb46471 Mon Sep 17 00:00:00 2001
From: sunkhaskasis <19194315+sunkhaskasis@users.noreply.github.com>
Date: Thu, 19 Feb 2026 16:10:44 +0300
Subject: [PATCH 13/16] Update nukedopm.c

---
 emu/cores/nukedopm.c | 226 +++++++++++++++++++++----------------------
 1 file changed, 113 insertions(+), 113 deletions(-)

diff --git a/emu/cores/nukedopm.c b/emu/cores/nukedopm.c
index 424b6423..33c37692 100644
--- a/emu/cores/nukedopm.c
+++ b/emu/cores/nukedopm.c
@@ -279,7 +279,7 @@ static uint16_t lfo_counter2_table[] = {
     0x7ff8, 0x7ffc, 0x7ffe, 0x7fff
 };
 
-static int32_t NOPM_KCToFNum(int32_t kcode)
+static int32_t OPM_KCToFNum(int32_t kcode)
 {
     int32_t kcode_h = (kcode >> 4) & 63;
     int32_t kcode_l = kcode & 15;
@@ -322,7 +322,7 @@ static int32_t NOPM_KCToFNum(int32_t kcode)
     return pg_freqtable[kcode_h].basefreq + (sum >> 1);
 }
 
-static int32_t NOPM_LFOApplyPMS(int32_t lfo, int32_t pms)
+static int32_t OPM_LFOApplyPMS(int32_t lfo, int32_t pms)
 {
     int32_t t, out;
     int32_t top = (lfo >> 4) & 7;
@@ -372,7 +372,7 @@ static int32_t NOPM_LFOApplyPMS(int32_t lfo, int32_t pms)
     return out;
 }
 
-static int32_t NOPM_CalcKCode(int32_t kcf, int32_t lfo, int32_t lfo_sign, int32_t dt)
+static int32_t OPM_CalcKCode(int32_t kcf, int32_t lfo, int32_t lfo_sign, int32_t dt)
 {
     int32_t t2, t3, b0, b1, b2, b3, w2, w3, w6;
     int32_t overflow1 = 0;
@@ -441,7 +441,7 @@ static int32_t NOPM_CalcKCode(int32_t kcf, int32_t lfo, int32_t lfo_sign, int32_
     return sum;
 }
 
-static void NOPM_PhaseCalcFNumBlock(opm_t *chip)
+static void OPM_PhaseCalcFNumBlock(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 7) & 31;
     uint32_t channel = slot & 7;
@@ -449,9 +449,9 @@ static void NOPM_PhaseCalcFNumBlock(opm_t *chip)
     uint32_t lfo = chip->lfo_pmd ? chip->lfo_pm_lock : 0;
     uint32_t pms = chip->opp ? chip->pg_opp_pms : chip->ch_pms[channel];
     uint32_t dt = chip->opp ? chip->pg_opp_dt2[slot] : chip->sl_dt2[slot];
-    int32_t lfo_pm = NOPM_LFOApplyPMS(lfo & 127, pms);
-    uint32_t kcode = NOPM_CalcKCode(kcf, lfo_pm, (lfo & 0x80) != 0 && pms != 0 ? 0 : 1, dt);
-    uint32_t fnum = NOPM_KCToFNum(kcode);
+    int32_t lfo_pm = OPM_LFOApplyPMS(lfo & 127, pms);
+    uint32_t kcode = OPM_CalcKCode(kcf, lfo_pm, (lfo & 0x80) != 0 && pms != 0 ? 0 : 1, dt);
+    uint32_t fnum = OPM_KCToFNum(kcode);
     uint32_t kcode_h = kcode >> 8;
     chip->pg_fnum[slot] = fnum;
     chip->pg_kcode[slot] = kcode_h;
@@ -465,7 +465,7 @@ static void NOPM_PhaseCalcFNumBlock(opm_t *chip)
     }
 }
 
-static void NOPM_PhaseCalcIncrement(opm_t *chip)
+static void OPM_PhaseCalcIncrement(opm_t *chip)
 {
     uint32_t slot = chip->cycles;
     uint32_t channel = slot & 7;
@@ -513,7 +513,7 @@ static void NOPM_PhaseCalcIncrement(opm_t *chip)
     chip->pg_inc[slot] = inc;
 }
 
-static void NOPM_PhaseGenerate(opm_t *chip)
+static void OPM_PhaseGenerate(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 27) & 31;
     chip->pg_reset_latch[slot] = chip->pg_reset[slot];
@@ -533,7 +533,7 @@ static void NOPM_PhaseGenerate(opm_t *chip)
     chip->pg_phase[slot] &= 0xfffff;
 }
 
-static void NOPM_PhaseDebug(opm_t *chip)
+static void OPM_PhaseDebug(opm_t *chip)
 {
     chip->pg_serial >>= 1;
     if (chip->cycles == 5)
@@ -542,7 +542,7 @@ static void NOPM_PhaseDebug(opm_t *chip)
     }
 }
 
-static void NOPM_KeyOn1(opm_t *chip)
+static void OPM_KeyOn1(opm_t *chip)
 {
     uint32_t cycles = (chip->cycles + 1) & 31;
     chip->kon_chanmatch = 0;
@@ -552,7 +552,7 @@ static void NOPM_KeyOn1(opm_t *chip)
     }
 }
 
-static void NOPM_KeyOn2(opm_t *chip)
+static void OPM_KeyOn2(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 8) & 31;
     if (chip->kon_chanmatch)
@@ -564,7 +564,7 @@ static void NOPM_KeyOn2(opm_t *chip)
     }
 }
 
-static void NOPM_EnvelopePhase1(opm_t *chip)
+static void OPM_EnvelopePhase1(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 2) & 31;
     uint32_t kon = chip->mode_kon[slot] | chip->kon_csm;
@@ -573,7 +573,7 @@ static void NOPM_EnvelopePhase1(opm_t *chip)
     chip->kon[slot] = kon;
 }
 
-static void NOPM_EnvelopePhase2(opm_t *chip)
+static void OPM_EnvelopePhase2(opm_t *chip)
 {
     uint32_t slot = chip->cycles;
     uint32_t chan = slot & 7;
@@ -659,7 +659,7 @@ static void NOPM_EnvelopePhase2(opm_t *chip)
     }
 }
 
-static void NOPM_EnvelopePhase3(opm_t *chip)
+static void OPM_EnvelopePhase3(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 31) & 31;
     chip->eg_shift = (chip->eg_timershift_lock + (chip->eg_rate[0] >> 2)) & 15;
@@ -673,7 +673,7 @@ static void NOPM_EnvelopePhase3(opm_t *chip)
     }
 }
 
-static void NOPM_EnvelopePhase4(opm_t *chip)
+static void OPM_EnvelopePhase4(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 30) & 31;
     uint8_t inc = 0;
@@ -779,7 +779,7 @@ static void NOPM_EnvelopePhase4(opm_t *chip)
     }
 }
 
-static void NOPM_EnvelopePhase5(opm_t *chip)
+static void OPM_EnvelopePhase5(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 29) & 31;
     uint32_t level = chip->eg_level[slot];
@@ -824,7 +824,7 @@ static void NOPM_EnvelopePhase5(opm_t *chip)
     chip->eg_test = chip->mode_test[5];
 }
 
-static void NOPM_EnvelopePhase6(opm_t *chip)
+static void OPM_EnvelopePhase6(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 28) & 31;
     chip->eg_serial_bit = (chip->eg_serial >> 9) & 1;
@@ -840,7 +840,7 @@ static void NOPM_EnvelopePhase6(opm_t *chip)
     chip->eg_out[1] = chip->eg_out[0];
 }
 
-static void NOPM_EnvelopeClock(opm_t *chip)
+static void OPM_EnvelopeClock(opm_t *chip)
 {
     chip->eg_clock <<= 1;
     if ((chip->eg_clockcnt & 2) != 0 || chip->mode_test[0])
@@ -857,7 +857,7 @@ static void NOPM_EnvelopeClock(opm_t *chip)
     }
 }
 
-static void NOPM_EnvelopeTimer(opm_t *chip)
+static void OPM_EnvelopeTimer(opm_t *chip)
 {
     uint32_t cycle = (chip->cycles + 31) & 15;
     uint32_t cycle2;
@@ -909,7 +909,7 @@ static void NOPM_EnvelopeTimer(opm_t *chip)
     }
 }
 
-static void NOPM_OperatorPhase1(opm_t *chip)
+static void OPM_OperatorPhase1(opm_t *chip)
 {
     uint32_t slot = chip->cycles;
     int16_t mod = chip->op_mod[2];
@@ -928,13 +928,13 @@ static void NOPM_OperatorPhase1(opm_t *chip)
     chip->op_mod_in = mod;
 }
 
-static void NOPM_OperatorPhase2(opm_t *chip)
+static void OPM_OperatorPhase2(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 31) & 31;
     chip->op_phase = (chip->op_phase_in + chip->op_mod_in) & 1023;
 }
 
-static void NOPM_OperatorPhase3(opm_t *chip)
+static void OPM_OperatorPhase3(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 30) & 31;
     uint16_t phase = chip->op_phase & 255;
@@ -947,19 +947,19 @@ static void NOPM_OperatorPhase3(opm_t *chip)
     chip->op_sign |= (chip->op_phase >> 9) & 1;
 }
 
-static void NOPM_OperatorPhase4(opm_t *chip)
+static void OPM_OperatorPhase4(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 29) & 31;
     chip->op_logsin[1] = chip->op_logsin[0];
 }
 
-static void NOPM_OperatorPhase5(opm_t *chip)
+static void OPM_OperatorPhase5(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 28) & 31;
     chip->op_logsin[2] = chip->op_logsin[1];
 }
 
-static void NOPM_OperatorPhase6(opm_t *chip)
+static void OPM_OperatorPhase6(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 27) & 31;
     chip->op_atten = chip->op_logsin[2] + (chip->eg_out[1] << 2);
@@ -969,21 +969,21 @@ static void NOPM_OperatorPhase6(opm_t *chip)
     }
 }
 
-static void NOPM_OperatorPhase7(opm_t *chip)
+static void OPM_OperatorPhase7(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 26) & 31;
     chip->op_exp[0] = exprom[chip->op_atten & 255];
     chip->op_pow[0] = chip->op_atten >> 8;
 }
 
-static void NOPM_OperatorPhase8(opm_t *chip)
+static void OPM_OperatorPhase8(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 25) & 31;
     chip->op_exp[1] = chip->op_exp[0];
     chip->op_pow[1] = chip->op_pow[0];
 }
 
-static void NOPM_OperatorPhase9(opm_t *chip)
+static void OPM_OperatorPhase9(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 24) & 31;
     int16_t out = (chip->op_exp[1] << 2) >> (chip->op_pow[1]);
@@ -994,7 +994,7 @@ static void NOPM_OperatorPhase9(opm_t *chip)
     chip->op_out[0] = out;
 }
 
-static void NOPM_OperatorPhase10(opm_t *chip)
+static void OPM_OperatorPhase10(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 23) & 31;
     int16_t out = chip->op_out[0];
@@ -1007,19 +1007,19 @@ static void NOPM_OperatorPhase10(opm_t *chip)
     chip->op_out[1] = out;
 }
 
-static void NOPM_OperatorPhase11(opm_t *chip)
+static void OPM_OperatorPhase11(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 22) & 31;
     chip->op_out[2] = chip->op_out[1];
 }
 
-static void NOPM_OperatorPhase12(opm_t *chip)
+static void OPM_OperatorPhase12(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 21) & 31;
     chip->op_out[3] = chip->op_out[2];
 }
 
-static void NOPM_OperatorPhase13(opm_t *chip)
+static void OPM_OperatorPhase13(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 20) & 31;
     uint32_t channel = slot & 7;
@@ -1034,7 +1034,7 @@ static void NOPM_OperatorPhase13(opm_t *chip)
     }
 }
 
-static void NOPM_OperatorPhase14(opm_t *chip)
+static void OPM_OperatorPhase14(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 19) & 31;
     uint32_t channel = slot & 7;
@@ -1059,7 +1059,7 @@ static void NOPM_OperatorPhase14(opm_t *chip)
     }
 }
 
-static void NOPM_OperatorPhase15(opm_t *chip)
+static void OPM_OperatorPhase15(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 18) & 31;
     int16_t mod, mod1 = 0, mod2 = 0;
@@ -1096,7 +1096,7 @@ static void NOPM_OperatorPhase15(opm_t *chip)
     }
 }
 
-static void NOPM_OperatorPhase16(opm_t *chip)
+static void OPM_OperatorPhase16(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 17) & 31;
     // hack
@@ -1107,7 +1107,7 @@ static void NOPM_OperatorPhase16(opm_t *chip)
     chip->op_fb[0] = chip->opp ? chip->op_opp_fb[2] : chip->ch_fb[slot & 7];
 }
 
-static void NOPM_OperatorCounter(opm_t *chip)
+static void OPM_OperatorCounter(opm_t *chip)
 {
     if ((chip->cycles & 7) == 4)
     {
@@ -1119,7 +1119,7 @@ static void NOPM_OperatorCounter(opm_t *chip)
     }
 }
 
-static void NOPM_Mixer2(opm_t *chip)
+static void OPM_Mixer2(opm_t *chip)
 {
     uint32_t cycles = (chip->cycles + 30) & 31;
     uint8_t bit;
@@ -1201,7 +1201,7 @@ static void NOPM_Mixer2(opm_t *chip)
     chip->mix_bits |= bit << 20;
 }
 
-static void NOPM_Output(opm_t *chip)
+static void OPM_Output(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 27) & 31;
     chip->smp_so = (chip->mix_out_bit & 1) != 0;
@@ -1209,7 +1209,7 @@ static void NOPM_Output(opm_t *chip)
     chip->smp_sh2 = (slot & 24) == 24 && !chip->ic;
 }
 
-static void NOPM_DAC(opm_t *chip)
+static void OPM_DAC(opm_t *chip)
 {
     int32_t exp, mant;
     if (chip->dac_osh1 && !chip->smp_sh1)
@@ -1232,7 +1232,7 @@ static void NOPM_DAC(opm_t *chip)
     chip->dac_osh2 = chip->smp_sh2;
 }
 
-static void NOPM_Mixer(opm_t *chip)
+static void OPM_Mixer(opm_t *chip)
 {
     uint32_t slot = (chip->cycles + 18) & 31;
     uint32_t channel = (slot & 7);
@@ -1344,7 +1344,7 @@ static void NOPM_Mixer(opm_t *chip)
     chip->mix[1] += chip->op_mix * chip->op_mixr;
 }
 
-static void NOPM_Noise(opm_t *chip)
+static void OPM_Noise(opm_t *chip)
 {
     uint8_t noise_step = chip->ic || chip->noise_update;
     uint8_t bit = 0;
@@ -1364,7 +1364,7 @@ static void NOPM_Noise(opm_t *chip)
     chip->noise_lfsr |= bit << 15;
 }
 
-static void NOPM_NoiseTimer(opm_t *chip)
+static void OPM_NoiseTimer(opm_t *chip)
 {
     uint32_t timer = chip->noise_timer;
 
@@ -1384,7 +1384,7 @@ static void NOPM_NoiseTimer(opm_t *chip)
     chip->noise_timer = timer;
 }
 
-static void NOPM_DoTimerA(opm_t *chip)
+static void OPM_DoTimerA(opm_t *chip)
 {
     uint16_t value = chip->timer_a_val;
     value += chip->timer_a_inc;
@@ -1401,7 +1401,7 @@ static void NOPM_DoTimerA(opm_t *chip)
     chip->timer_a_val = value & 1023;
 }
 
-static void NOPM_DoTimerA2(opm_t *chip)
+static void OPM_DoTimerA2(opm_t *chip)
 {
     if (chip->cycles == 1)
     {
@@ -1422,7 +1422,7 @@ static void NOPM_DoTimerA2(opm_t *chip)
     chip->timer_reseta = 0;
 }
 
-static void NOPM_DoTimerB(opm_t *chip)
+static void OPM_DoTimerB(opm_t *chip)
 {
     uint16_t value = chip->timer_b_val;
     value += chip->timer_b_inc;
@@ -1459,7 +1459,7 @@ static void NOPM_DoTimerB(opm_t *chip)
     }
 }
 
-static void NOPM_DoTimerB2(opm_t *chip)
+static void OPM_DoTimerB2(opm_t *chip)
 {
     chip->timer_b_inc = chip->mode_test[2] || (chip->timer_loadb && chip->timer_b_sub_of);
     chip->timer_b_do_load = chip->timer_b_of || (chip->timer_loadb && chip->timer_b_temp);
@@ -1476,12 +1476,12 @@ static void NOPM_DoTimerB2(opm_t *chip)
     chip->timer_resetb = 0;
 }
 
-static void NOPM_DoTimerIRQ(opm_t *chip)
+static void OPM_DoTimerIRQ(opm_t *chip)
 {
     chip->timer_irq = chip->timer_a_status || chip->timer_b_status;
 }
 
-static void NOPM_DoLFOMult(opm_t *chip)
+static void OPM_DoLFOMult(opm_t *chip)
 {
     uint8_t ampm_sel = (chip->lfo_bit_counter & 8) != 0;
     uint8_t dp = ampm_sel ? chip->lfo_pmd : chip->lfo_amd;
@@ -1531,7 +1531,7 @@ static void NOPM_DoLFOMult(opm_t *chip)
     chip->lfo_mult_carry = sum >> 1;
 }
 
-static void NOPM_DoLFO1(opm_t *chip)
+static void OPM_DoLFO1(opm_t *chip)
 {
     uint16_t counter2 = chip->lfo_counter2;
     uint8_t of_old = chip->lfo_counter2_of;
@@ -1639,7 +1639,7 @@ static void NOPM_DoLFO1(opm_t *chip)
     chip->lfo_counter1_of2 = chip->lfo_counter1 == 2;
 }
 
-static void NOPM_DoLFO2(opm_t *chip)
+static void OPM_DoLFO2(opm_t *chip)
 {
     chip->lfo_clock_test = chip->lfo_clock;
     chip->lfo_clock = (chip->lfo_counter2_of || chip->lfo_test || chip->lfo_counter3_step);
@@ -1671,7 +1671,7 @@ static void NOPM_DoLFO2(opm_t *chip)
     chip->lfo_test = chip->mode_test[2];
 }
 
-static void NOPM_CSM(opm_t *chip)
+static void OPM_CSM(opm_t *chip)
 {
     chip->kon_csm = chip->kon_csm_lock;
     if (chip->cycles == 1)
@@ -1680,7 +1680,7 @@ static void NOPM_CSM(opm_t *chip)
     }
 }
 
-static void NOPM_NoiseChannel(opm_t *chip)
+static void OPM_NoiseChannel(opm_t *chip)
 {
     chip->nc_active |= chip->eg_serial_bit & 1;
     if (chip->cycles == 13)
@@ -1710,7 +1710,7 @@ static void NOPM_NoiseChannel(opm_t *chip)
     }
 }
 
-static void NOPM_DoIO(opm_t *chip)
+static void OPM_DoIO(opm_t *chip)
 {
     // Busy
     chip->write_busy_cnt += chip->write_busy;
@@ -1727,7 +1727,7 @@ static void NOPM_DoIO(opm_t *chip)
     chip->write_d = 0;
 }
 
-static void NOPM_DoRegWrite(opm_t *chip)
+static void OPM_DoRegWrite(opm_t *chip)
 {
     int32_t i;
     uint32_t cycles = chip->opp ? (chip->cycles + 1) & 31 : chip->cycles;
@@ -1983,7 +1983,7 @@ static void NOPM_DoRegWrite(opm_t *chip)
     }
 }
 
-static void NOPM_DoIC(opm_t *chip)
+static void OPM_DoIC(opm_t *chip)
 {
     uint32_t channel = chip->cycles & 7;
     uint32_t slot = chip->cycles;
@@ -2117,63 +2117,63 @@ static void OPP_TLRamp(opm_t *chip)
 
 void NOPM_Clock(opm_t *chip, int32_t *output, uint8_t *sh1, uint8_t *sh2, uint8_t *so)
 {
-    NOPM_Output(chip);
-    NOPM_DAC(chip);
-    NOPM_Mixer2(chip);
-    NOPM_Mixer(chip);
-
-    NOPM_OperatorPhase16(chip);
-    NOPM_OperatorPhase15(chip);
-    NOPM_OperatorPhase14(chip);
-    NOPM_OperatorPhase13(chip);
-    NOPM_OperatorPhase12(chip);
-    NOPM_OperatorPhase11(chip);
-    NOPM_OperatorPhase10(chip);
-    NOPM_OperatorPhase9(chip);
-    NOPM_OperatorPhase8(chip);
-    NOPM_OperatorPhase7(chip);
-    NOPM_OperatorPhase6(chip);
-    NOPM_OperatorPhase5(chip);
-    NOPM_OperatorPhase4(chip);
-    NOPM_OperatorPhase3(chip);
-    NOPM_OperatorPhase2(chip);
-    NOPM_OperatorPhase1(chip);
-    NOPM_OperatorCounter(chip);
-
-    NOPM_EnvelopeTimer(chip);
-    NOPM_EnvelopePhase6(chip);
-    NOPM_EnvelopePhase5(chip);
-    NOPM_EnvelopePhase4(chip);
-    NOPM_EnvelopePhase3(chip);
-    NOPM_EnvelopePhase2(chip);
-    NOPM_EnvelopePhase1(chip);
+    OPM_Output(chip);
+    OPM_DAC(chip);
+    OPM_Mixer2(chip);
+    OPM_Mixer(chip);
+
+    OPM_OperatorPhase16(chip);
+    OPM_OperatorPhase15(chip);
+    OPM_OperatorPhase14(chip);
+    OPM_OperatorPhase13(chip);
+    OPM_OperatorPhase12(chip);
+    OPM_OperatorPhase11(chip);
+    OPM_OperatorPhase10(chip);
+    OPM_OperatorPhase9(chip);
+    OPM_OperatorPhase8(chip);
+    OPM_OperatorPhase7(chip);
+    OPM_OperatorPhase6(chip);
+    OPM_OperatorPhase5(chip);
+    OPM_OperatorPhase4(chip);
+    OPM_OperatorPhase3(chip);
+    OPM_OperatorPhase2(chip);
+    OPM_OperatorPhase1(chip);
+    OPM_OperatorCounter(chip);
+
+    OPM_EnvelopeTimer(chip);
+    OPM_EnvelopePhase6(chip);
+    OPM_EnvelopePhase5(chip);
+    OPM_EnvelopePhase4(chip);
+    OPM_EnvelopePhase3(chip);
+    OPM_EnvelopePhase2(chip);
+    OPM_EnvelopePhase1(chip);
 
     if (chip->opp)
         OPP_TLRamp(chip);
 
-    NOPM_PhaseDebug(chip);
-    NOPM_PhaseGenerate(chip);
-    NOPM_PhaseCalcIncrement(chip);
-    NOPM_PhaseCalcFNumBlock(chip);
-
-    NOPM_DoTimerIRQ(chip);
-    NOPM_DoTimerA(chip);
-    NOPM_DoTimerB(chip);
-    NOPM_DoLFOMult(chip);
-    NOPM_DoLFO1(chip);
-    NOPM_Noise(chip);
-    NOPM_KeyOn2(chip);
-    NOPM_DoRegWrite(chip);
-    NOPM_EnvelopeClock(chip);
-    NOPM_NoiseTimer(chip);
-    NOPM_KeyOn1(chip);
-    NOPM_DoIO(chip);
-    NOPM_DoTimerA2(chip);
-    NOPM_DoTimerB2(chip);
-    NOPM_DoLFO2(chip);
-    NOPM_CSM(chip);
-    NOPM_NoiseChannel(chip);
-    NOPM_DoIC(chip);
+    OPM_PhaseDebug(chip);
+    OPM_PhaseGenerate(chip);
+    OPM_PhaseCalcIncrement(chip);
+    OPM_PhaseCalcFNumBlock(chip);
+
+    OPM_DoTimerIRQ(chip);
+    OPM_DoTimerA(chip);
+    OPM_DoTimerB(chip);
+    OPM_DoLFOMult(chip);
+    OPM_DoLFO1(chip);
+    OPM_Noise(chip);
+    OPM_KeyOn2(chip);
+    OPM_DoRegWrite(chip);
+    OPM_EnvelopeClock(chip);
+    OPM_NoiseTimer(chip);
+    OPM_KeyOn1(chip);
+    OPM_DoIO(chip);
+    OPM_DoTimerA2(chip);
+    OPM_DoTimerB2(chip);
+    OPM_DoLFO2(chip);
+    OPM_CSM(chip);
+    OPM_NoiseChannel(chip);
+    OPM_DoIC(chip);
     if (sh1)
     {
         *sh1 = chip->smp_sh1;
@@ -2294,7 +2294,7 @@ void NOPM_Reset(opm_t *chip, uint32_t rate, uint32_t clock);
 }
 
 
-static void NOPM_WriteBuffered(opm_t *chip, uint32_t port, uint8_t data)
+static void OPM_WriteBuffered(opm_t *chip, uint32_t port, uint8_t data)
 {
     uint64_t time1, time2;
     int32_t buffer[2];
@@ -2330,7 +2330,7 @@ static void NOPM_WriteBuffered(opm_t *chip, uint32_t port, uint8_t data)
     chip->writebuf_last = (chip->writebuf_last + 1) % OPN_WRITEBUF_SIZE;
 }
 
-static void NOPM_GenerateResampled(opm_t *chip, int32_t *buf)
+static void OPM_GenerateResampled(opm_t *chip, int32_t *buf)
 {
     uint32_t i;
     int32_t buffer[2];
@@ -2373,7 +2373,7 @@ static void NOPM_GenerateResampled(opm_t *chip, int32_t *buf)
 
 static void nukedopm_write(void *chip, UINT8 a, UINT8 v)
 {
-    NOPM_WriteBuffered((opm_t *)chip, a, v);
+    OPM_WriteBuffered((opm_t *)chip, a, v);
 }
 
 static UINT8 device_start_ym2151_nuked(const DEV_GEN_CFG* cfg, DEV_INFO* retDevInf)
@@ -2433,7 +2433,7 @@ static void nukedopm_update(void *chipptr, UINT32 samples, DEV_SMPL **out)
     
     for (i = 0; i < samples; i ++)
     {
-        NOPM_GenerateResampled(chip, buffer);
+        OPM_GenerateResampled(chip, buffer);
         out[0][i] = buffer[0];
         out[1][i] = buffer[1];
     }

From 82d01e5f148b9f7430d631b22b7b0cf63caa93f9 Mon Sep 17 00:00:00 2001
From: sunkhaskasis <19194315+sunkhaskasis@users.noreply.github.com>
Date: Thu, 19 Feb 2026 16:14:21 +0300
Subject: [PATCH 14/16] Update nukedopm.c

---
 emu/cores/nukedopm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/emu/cores/nukedopm.c b/emu/cores/nukedopm.c
index 33c37692..d48a56f5 100644
--- a/emu/cores/nukedopm.c
+++ b/emu/cores/nukedopm.c
@@ -2274,7 +2274,7 @@ void NOPM_SetIC(opm_t *chip, uint8_t ic)
     }
 }
 
-void NOPM_Reset(opm_t *chip, uint32_t rate, uint32_t clock);
+void NOPM_Reset(opm_t* chip, uint32_t rate, uint32_t clock);
 {
     uint32_t i;
     memset(chip, 0, sizeof(opm_t));

From 55c34acd57e610c7d27354fe2cd75c974b4c99b5 Mon Sep 17 00:00:00 2001
From: sunkhaskasis <19194315+sunkhaskasis@users.noreply.github.com>
Date: Thu, 19 Feb 2026 16:14:56 +0300
Subject: [PATCH 15/16] Update nukedopm_int.h

---
 emu/cores/nukedopm_int.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/emu/cores/nukedopm_int.h b/emu/cores/nukedopm_int.h
index 0b12108d..ce625a09 100644
--- a/emu/cores/nukedopm_int.h
+++ b/emu/cores/nukedopm_int.h
@@ -310,7 +310,7 @@ uint8_t NOPM_ReadIRQ(opm_t *chip);
 uint8_t NOPM_ReadCT1(opm_t *chip);
 uint8_t NOPM_ReadCT2(opm_t *chip);
 void NOPM_SetIC(opm_t *chip, uint8_t ic);
-void NOPM_Reset(opm_t *chip, uint32_t rate, uint32_t clock);
+void NOPM_Reset(opm_t* chip, uint32_t rate, uint32_t clock);
 
 #ifdef __cplusplus
 } // extern "C"

From 72c6bef4df7f3cd85bdeb419cd8fa073c9afbf64 Mon Sep 17 00:00:00 2001
From: sunkhaskasis <19194315+sunkhaskasis@users.noreply.github.com>
Date: Thu, 19 Feb 2026 21:44:22 +0300
Subject: [PATCH 16/16] Update nukedopm.c

---
 emu/cores/nukedopm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/emu/cores/nukedopm.c b/emu/cores/nukedopm.c
index d48a56f5..d0aefb3d 100644
--- a/emu/cores/nukedopm.c
+++ b/emu/cores/nukedopm.c
@@ -2274,7 +2274,7 @@ void NOPM_SetIC(opm_t *chip, uint8_t ic)
     }
 }
 
-void NOPM_Reset(opm_t* chip, uint32_t rate, uint32_t clock);
+void NOPM_Reset(opm_t* chip, uint32_t rate, uint32_t clock)
 {
     uint32_t i;
     memset(chip, 0, sizeof(opm_t));