@@ -43,8 +43,8 @@ use binaryninja::low_level_il::lifting::{
4343 LiftableLowLevelIL , LiftableLowLevelILWithSize , LowLevelILLabel ,
4444} ;
4545use binaryninja:: low_level_il:: {
46- expression:: ExpressionHandler , instruction:: InstructionHandler , LowLevelILRegisterKind ,
47- MutableLiftedILExpr , MutableLiftedILFunction , RegularLowLevelILFunction ,
46+ expression:: ExpressionHandler , instruction:: InstructionHandler , LowLevelILMutableExpression ,
47+ LowLevelILMutableFunction , LowLevelILRegisterKind , LowLevelILRegularFunction ,
4848} ;
4949use riscv_dis:: {
5050 FloatReg , FloatRegType , Instr , IntRegType , Op , RegFile , Register as RiscVRegister ,
@@ -207,7 +207,10 @@ impl<D: RiscVDisassembler> architecture::Register for Register<D> {
207207impl < ' a , D : RiscVDisassembler > LiftableLowLevelIL < ' a > for Register < D > {
208208 type Result = ValueExpr ;
209209
210- fn lift ( il : & ' a MutableLiftedILFunction , reg : Self ) -> MutableLiftedILExpr < ' a , Self :: Result > {
210+ fn lift (
211+ il : & ' a LowLevelILMutableFunction ,
212+ reg : Self ,
213+ ) -> LowLevelILMutableExpression < ' a , Self :: Result > {
211214 match reg. reg_type ( ) {
212215 RegType :: Integer ( 0 ) => il. const_int ( reg. size ( ) , 0 ) ,
213216 RegType :: Integer ( _) => il. reg ( reg. size ( ) , reg) ,
@@ -218,10 +221,10 @@ impl<'a, D: RiscVDisassembler> LiftableLowLevelIL<'a> for Register<D> {
218221
219222impl < ' a , D : RiscVDisassembler > LiftableLowLevelILWithSize < ' a > for Register < D > {
220223 fn lift_with_size (
221- il : & ' a MutableLiftedILFunction ,
224+ il : & ' a LowLevelILMutableFunction ,
222225 reg : Self ,
223226 size : usize ,
224- ) -> MutableLiftedILExpr < ' a , ValueExpr > {
227+ ) -> LowLevelILMutableExpression < ' a , ValueExpr > {
225228 #[ cfg( debug_assertions) ]
226229 {
227230 if reg. size ( ) < size {
@@ -1062,7 +1065,7 @@ impl<D: RiscVDisassembler> Architecture for RiscVArch<D> {
10621065 & self ,
10631066 data : & [ u8 ] ,
10641067 addr : u64 ,
1065- il : & MutableLiftedILFunction ,
1068+ il : & LowLevelILMutableFunction ,
10661069 ) -> Option < ( usize , bool ) > {
10671070 let max_width = self . default_integer_size ( ) ;
10681071
@@ -1306,41 +1309,41 @@ impl<D: RiscVDisassembler> Architecture for RiscVArch<D> {
13061309 Op :: Ebreak => il. bp ( ) . append ( ) ,
13071310 Op :: Uret => {
13081311 il. intrinsic (
1309- MutableLiftedILFunction :: NO_OUTPUTS ,
1312+ LowLevelILMutableFunction :: NO_OUTPUTS ,
13101313 RiscVIntrinsic :: < D > :: from ( Intrinsic :: Uret ) ,
1311- MutableLiftedILFunction :: NO_INPUTS ,
1314+ LowLevelILMutableFunction :: NO_INPUTS ,
13121315 )
13131316 . append ( ) ;
13141317 il. no_ret ( ) . append ( ) ;
13151318 }
13161319 Op :: Sret => {
13171320 il. intrinsic (
1318- MutableLiftedILFunction :: NO_OUTPUTS ,
1321+ LowLevelILMutableFunction :: NO_OUTPUTS ,
13191322 RiscVIntrinsic :: < D > :: from ( Intrinsic :: Sret ) ,
1320- MutableLiftedILFunction :: NO_INPUTS ,
1323+ LowLevelILMutableFunction :: NO_INPUTS ,
13211324 )
13221325 . append ( ) ;
13231326 il. no_ret ( ) . append ( ) ;
13241327 }
13251328 Op :: Mret => {
13261329 il. intrinsic (
1327- MutableLiftedILFunction :: NO_OUTPUTS ,
1330+ LowLevelILMutableFunction :: NO_OUTPUTS ,
13281331 RiscVIntrinsic :: < D > :: from ( Intrinsic :: Mret ) ,
1329- MutableLiftedILFunction :: NO_INPUTS ,
1332+ LowLevelILMutableFunction :: NO_INPUTS ,
13301333 )
13311334 . append ( ) ;
13321335 il. no_ret ( ) . append ( ) ;
13331336 }
13341337 Op :: Wfi => il
13351338 . intrinsic (
1336- MutableLiftedILFunction :: NO_OUTPUTS ,
1339+ LowLevelILMutableFunction :: NO_OUTPUTS ,
13371340 RiscVIntrinsic :: < D > :: from ( Intrinsic :: Wfi ) ,
1338- MutableLiftedILFunction :: NO_INPUTS ,
1341+ LowLevelILMutableFunction :: NO_INPUTS ,
13391342 )
13401343 . append ( ) ,
13411344 Op :: Fence ( i) => il
13421345 . intrinsic (
1343- MutableLiftedILFunction :: NO_OUTPUTS ,
1346+ LowLevelILMutableFunction :: NO_OUTPUTS ,
13441347 RiscVIntrinsic :: < D > :: from ( Intrinsic :: Fence ) ,
13451348 [ il. const_int ( 4 , i. imm ( ) as u32 as u64 ) ] ,
13461349 )
@@ -1353,7 +1356,7 @@ impl<D: RiscVDisassembler> Architecture for RiscVArch<D> {
13531356
13541357 if i. rd ( ) . id ( ) == 0 {
13551358 il. intrinsic (
1356- MutableLiftedILFunction :: NO_OUTPUTS ,
1359+ LowLevelILMutableFunction :: NO_OUTPUTS ,
13571360 RiscVIntrinsic :: < D > :: from ( Intrinsic :: Csrwr ) ,
13581361 [ csr, rs1] ,
13591362 )
@@ -1404,7 +1407,7 @@ impl<D: RiscVDisassembler> Architecture for RiscVArch<D> {
14041407
14051408 if i. rd ( ) . id ( ) == 0 {
14061409 il. intrinsic (
1407- MutableLiftedILFunction :: NO_OUTPUTS ,
1410+ LowLevelILMutableFunction :: NO_OUTPUTS ,
14081411 RiscVIntrinsic :: < D > :: from ( Intrinsic :: Csrwr ) ,
14091412 [ csr, imm] ,
14101413 )
@@ -2848,7 +2851,7 @@ impl FunctionRecognizer for RiscVELFPLTRecognizer {
28482851 & self ,
28492852 bv : & BinaryView ,
28502853 func : & Function ,
2851- llil : & RegularLowLevelILFunction ,
2854+ llil : & LowLevelILRegularFunction ,
28522855 ) -> bool {
28532856 // Look for the following code pattern:
28542857 // t3 = plt
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