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galenbwillgalenbwill
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[powerpc] Merging PR: Remove dependency on capstone for PowerPC disassembly #6292
- Fixed invalid use of operToIL that should have been operToIL_a - Cleaned up operToIL uses with default arguments - Cleaned up compiler warnings - Added lifting for CMPD and CMPLD - Removed incorrect use of il.MultDoublePrecSigned in FP instructions - Corrected mullw and mullwi to use il.MultDoublePrecSigned - Added lifting for CLRRWI (it was disassembled into its true RLWINM form before by capstone)
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‎arch/powerpc/il.cpp‎

Lines changed: 61 additions & 63 deletions
Original file line numberDiff line numberDiff line change
@@ -398,7 +398,7 @@ static void load_float(LowLevelILFunction& il,
398398
bool update=false
399399
)
400400
{
401-
ExprId tmp;
401+
ExprId tmp = BN_INVALID_EXPR;
402402
const int addrsz = 4;
403403
// assume single
404404
if (!load_sz)
@@ -445,7 +445,6 @@ bool GetLowLevelILForPPCInstruction(Architecture *arch, LowLevelILFunction &il,
445445
size_t addressSize_l = arch->GetAddressSize();
446446

447447
// for ppc_ps
448-
int w_l = 0;
449448
bool rc = true;
450449

451450
/* create convenient access to instruction operands */
@@ -467,7 +466,7 @@ bool GetLowLevelILForPPCInstruction(Architecture *arch, LowLevelILFunction &il,
467466
case 0: while(0);
468467
}
469468

470-
ExprId ei0, ei1, ei2;
469+
ExprId ei0 = BN_INVALID_EXPR, ei1 = BN_INVALID_EXPR, ei2 = BN_INVALID_EXPR;
471470

472471
switch (instruction->id)
473472
{
@@ -603,6 +602,14 @@ bool GetLowLevelILForPPCInstruction(Architecture *arch, LowLevelILFunction &il,
603602
il.AddInstruction(ei2);
604603
break;
605604

605+
case PPC_ID_CMPD: /* compare (signed) d-word(64-bit) */
606+
REQUIRE2OPS
607+
ei0 = operToIL_a(il, oper1, 8);
608+
ei1 = operToIL_a(il, oper2, 8);
609+
ei2 = il.Sub(addressSize_l, ei0, ei1, crxToFlagWriteType(oper0->reg, PPC_SUF_S));
610+
il.AddInstruction(ei2);
611+
break;
612+
606613
case PPC_ID_CMPLW: /* compare logical(unsigned) word(32-bit) */
607614
REQUIRE2OPS
608615
ei0 = operToIL(il, oper1);
@@ -611,6 +618,14 @@ bool GetLowLevelILForPPCInstruction(Architecture *arch, LowLevelILFunction &il,
611618
il.AddInstruction(ei2);
612619
break;
613620

621+
case PPC_ID_CMPLD: /* compare logical(unsigned) d-word(64-bit) */
622+
REQUIRE2OPS
623+
ei0 = operToIL_a(il, oper1, 8);
624+
ei1 = operToIL_a(il, oper2, 8);
625+
ei2 = il.Sub(addressSize_l, ei0, ei1, crxToFlagWriteType(oper0->reg, PPC_SUF_U));
626+
il.AddInstruction(ei2);
627+
break;
628+
614629
case PPC_ID_CMPWI: /* compare (signed) word(32-bit) immediate */
615630
REQUIRE2OPS
616631
ei0 = operToIL(il, oper1);
@@ -629,50 +644,20 @@ bool GetLowLevelILForPPCInstruction(Architecture *arch, LowLevelILFunction &il,
629644

630645
case PPC_ID_CMPDI:
631646
REQUIRE2OPS
632-
ei0 = operToIL(il, oper1, 8);
647+
ei0 = operToIL_a(il, oper1, 8);
633648
ei1 = operToIL_a(il, oper2, 8);
634649
ei2 = il.Sub(8, ei0, ei1, crxToFlagWriteType(oper0->reg, PPC_SUF_S));
635650
il.AddInstruction(ei2);
636651
break;
637652

638653
case PPC_ID_CMPLDI:
639654
REQUIRE2OPS
640-
ei0 = operToIL(il, oper1, 8);
655+
ei0 = operToIL_a(il, oper1, 8);
641656
ei1 = operToIL_a(il, oper2, 8);
642657
ei2 = il.Sub(8, ei0, ei1, crxToFlagWriteType(oper0->reg, PPC_SUF_U));
643658
il.AddInstruction(ei2);
644659
break;
645660

646-
//case PPC_ID_CMPD: /* compare (signed) d-word(64-bit) */
647-
// REQUIRE2OPS
648-
// ei0 = operToIL(il, oper0);
649-
// ei1 = operToIL(il, oper1, OTI_SEXT64_REGS);
650-
// ei2 = il.Sub(4, ei0, ei1, flagWriteType);
651-
// il.AddInstruction(ei2);
652-
// break;
653-
654-
//case PPC_ID_CMPLD: /* compare logical(unsigned) d-word(64-bit) */
655-
// REQUIRE2OPS
656-
// ei0 = operToIL(il, oper0);
657-
// ei1 = operToIL(il, oper1, OTI_ZEXT64_REGS);
658-
// ei2 = il.Sub(4, ei0, ei1, flagWriteType);
659-
// il.AddInstruction(ei2);
660-
// break;
661-
662-
//case PPC_ID_CMPLDI: /* compare logical(unsigned) d-word(64-bit) immediate */
663-
// REQUIRE2OPS
664-
// ei0 = operToIL(il, oper0);
665-
// ei1 = operToIL(il, oper1, OTI_ZEXT64_IMMS);
666-
// ei2 = il.Sub(4, ei0, ei1, flagWriteType);
667-
// il.AddInstruction(ei2);
668-
// break;
669-
670-
// case PPC_ID_FCMPU:
671-
// REQUIRE3OPS
672-
// ei0 = il.FloatSub(4, il.Unimplemented(), il.Unimplemented(), (oper0->reg - PPC_REG_CR0) + IL_FLAGWRITE_INVL0);
673-
// il.AddInstruction(ei0);
674-
// break;
675-
676661
case PPC_ID_CRAND:
677662
case PPC_ID_CRANDC:
678663
case PPC_ID_CRNAND:
@@ -1497,6 +1482,17 @@ bool GetLowLevelILForPPCInstruction(Architecture *arch, LowLevelILFunction &il,
14971482
il.AddInstruction(ei0);
14981483
break;
14991484

1485+
case PPC_ID_CLRRWIx:
1486+
REQUIRE3OPS
1487+
ei0 = il.Const(4, (uint32_t) (0xffffffff << oper2->uimm));
1488+
ei1 = il.Register(4, oper1->reg);
1489+
ei0 = il.And(4, ei1, ei0);
1490+
ei0 = il.SetRegister(4, oper0->reg, ei0,
1491+
instruction->flags.rc ? IL_FLAGWRITE_CR0_S : 0
1492+
);
1493+
il.AddInstruction(ei0);
1494+
break;
1495+
15001496
case PPC_ID_CLRLWIx:
15011497
REQUIRE3OPS
15021498
ei0 = il.Const(4, (uint32_t) (0xffffffff >> oper2->uimm));
@@ -1613,7 +1609,8 @@ bool GetLowLevelILForPPCInstruction(Architecture *arch, LowLevelILFunction &il,
16131609
case PPC_ID_MULLWx:
16141610
REQUIRE3OPS
16151611
ei0 = il.Register(4, oper1->reg);
1616-
ei0 = il.Mult(4, ei0, il.Register(4, oper2->reg));
1612+
ei0 = il.MultDoublePrecUnsigned(4, ei0, il.Register(4, oper2->reg));
1613+
ei0 = il.LowPart(4, ei0);
16171614
il.AddInstruction(il.SetRegister(4, oper0->reg, ei0,
16181615
instruction->flags.rc ? IL_FLAGWRITE_CR0_S : 0
16191616
));
@@ -1622,7 +1619,8 @@ bool GetLowLevelILForPPCInstruction(Architecture *arch, LowLevelILFunction &il,
16221619
case PPC_ID_MULLI:
16231620
REQUIRE3OPS
16241621
ei0 = il.Register(4, oper1->reg);
1625-
ei0 = il.Mult(4, ei0, il.Const(4, oper2->uimm));
1622+
ei0 = il.MultDoublePrecUnsigned(4, ei0, il.Const(4, oper2->uimm));
1623+
ei0 = il.LowPart(4, ei0);
16261624
il.AddInstruction(il.SetRegister(4, oper0->reg, ei0));
16271625
break;
16281626

@@ -1689,8 +1687,8 @@ bool GetLowLevelILForPPCInstruction(Architecture *arch, LowLevelILFunction &il,
16891687

16901688
case PPC_ID_FADDx:
16911689
REQUIRE3OPS
1692-
ei0 = il.FloatAdd(8, operToIL(il, oper1, PPC_IL_OPTIONS_DEFAULT, PPC_IL_EXTRA_DEFAULT, 8),
1693-
operToIL(il, oper2, PPC_IL_OPTIONS_DEFAULT, PPC_IL_EXTRA_DEFAULT, 8));
1690+
ei0 = il.FloatAdd(8, operToIL_a(il, oper1, 8),
1691+
operToIL_a(il, oper2, 8));
16941692
ei0 = il.SetRegister(8, oper0->reg, ei0, (instruction->flags.rc) ? IL_FLAGWRITE_CR0_F : 0);
16951693
il.AddInstruction(ei0);
16961694
break;
@@ -1704,8 +1702,8 @@ bool GetLowLevelILForPPCInstruction(Architecture *arch, LowLevelILFunction &il,
17041702

17051703
case PPC_ID_FSUBx:
17061704
REQUIRE3OPS
1707-
ei0 = il.FloatSub(8, operToIL(il, oper1, PPC_IL_OPTIONS_DEFAULT, PPC_IL_EXTRA_DEFAULT, 8),
1708-
operToIL(il, oper2, PPC_IL_OPTIONS_DEFAULT, PPC_IL_EXTRA_DEFAULT, 8));
1705+
ei0 = il.FloatSub(8, operToIL_a(il, oper1, 8),
1706+
operToIL_a(il, oper2, 8));
17091707
ei0 = il.SetRegister(8, oper0->reg, ei0, (instruction->flags.rc) ? IL_FLAGWRITE_CR0_F : 0);
17101708
il.AddInstruction(ei0);
17111709
break;
@@ -1735,7 +1733,7 @@ bool GetLowLevelILForPPCInstruction(Architecture *arch, LowLevelILFunction &il,
17351733

17361734
case PPC_ID_FMRx:
17371735
REQUIRE2OPS
1738-
ei0 = il.SetRegister(8, oper0->reg, operToIL(il, oper1, PPC_IL_OPTIONS_DEFAULT, PPC_IL_EXTRA_DEFAULT, 8));
1736+
ei0 = il.SetRegister(8, oper0->reg, operToIL_a(il, oper1, 8));
17391737
il.AddInstruction(ei0);
17401738
break;
17411739

@@ -1759,7 +1757,7 @@ bool GetLowLevelILForPPCInstruction(Architecture *arch, LowLevelILFunction &il,
17591757
case PPC_ID_STFD:
17601758
REQUIRE2OPS
17611759
ei0 = il.Store(8, operToIL(il, oper1),
1762-
il.FloatConvert(8, operToIL(il, oper0, PPC_IL_OPTIONS_DEFAULT, PPC_IL_EXTRA_DEFAULT, 8)));
1760+
il.FloatConvert(8, operToIL_a(il, oper0, 8)));
17631761
// ei0 = il.FloatConvert(8, ei0);
17641762
il.AddInstruction(ei0);
17651763
break;
@@ -1812,8 +1810,8 @@ bool GetLowLevelILForPPCInstruction(Architecture *arch, LowLevelILFunction &il,
18121810

18131811
case PPC_ID_FMULx:
18141812
REQUIRE3OPS
1815-
ei0 = il.MultDoublePrecSigned(8, operToIL(il, oper1, PPC_IL_OPTIONS_DEFAULT, PPC_IL_EXTRA_DEFAULT, 8),
1816-
operToIL(il, oper2, PPC_IL_OPTIONS_DEFAULT, PPC_IL_EXTRA_DEFAULT, 8));
1813+
ei0 = il.MultDoublePrecSigned(8, operToIL_a(il, oper1, 8),
1814+
operToIL_a(il, oper2, 8));
18171815
ei1 = il.SetRegister(8, oper0->reg, ei0, (instruction->flags.rc) ? IL_FLAGWRITE_CR0_F : 0);
18181816
il.AddInstruction(ei1);
18191817
break;
@@ -1827,8 +1825,8 @@ bool GetLowLevelILForPPCInstruction(Architecture *arch, LowLevelILFunction &il,
18271825

18281826
case PPC_ID_FDIVx:
18291827
REQUIRE3OPS
1830-
ei0 = il.DivDoublePrecSigned(8, operToIL(il, oper1, PPC_IL_OPTIONS_DEFAULT, PPC_IL_EXTRA_DEFAULT, 8),
1831-
operToIL(il, oper2, PPC_IL_OPTIONS_DEFAULT, PPC_IL_EXTRA_DEFAULT, 8));
1828+
ei0 = il.DivDoublePrecSigned(8, operToIL_a(il, oper1, 8),
1829+
operToIL_a(il, oper2, 8));
18321830
ei1 = il.SetRegister(8, oper0->reg, ei0, (instruction->flags.rc) ? IL_FLAGWRITE_CR0_F : 0);
18331831
il.AddInstruction(ei1);
18341832
break;
@@ -1842,9 +1840,9 @@ bool GetLowLevelILForPPCInstruction(Architecture *arch, LowLevelILFunction &il,
18421840

18431841
case PPC_ID_FMADDx:
18441842
REQUIRE4OPS
1845-
ei0 = il.MultDoublePrecSigned(8, operToIL(il, oper1, PPC_IL_OPTIONS_DEFAULT, PPC_IL_EXTRA_DEFAULT, 8),
1846-
operToIL(il, oper3, PPC_IL_OPTIONS_DEFAULT, PPC_IL_EXTRA_DEFAULT, 8));
1847-
ei0 = il.FloatAdd(8, ei0, operToIL(il, oper2, PPC_IL_OPTIONS_DEFAULT, PPC_IL_EXTRA_DEFAULT, 8));
1843+
ei0 = il.FloatMult(8, operToIL_a(il, oper1, 8),
1844+
operToIL_a(il, oper3, 8));
1845+
ei0 = il.FloatAdd(8, ei0, operToIL_a(il, oper2, 8));
18481846
ei1 = il.SetRegister(8, oper0->reg, ei0, (instruction->flags.rc) ? IL_FLAGWRITE_CR0_F : 0);
18491847
il.AddInstruction(ei1);
18501848
break;
@@ -1859,9 +1857,9 @@ bool GetLowLevelILForPPCInstruction(Architecture *arch, LowLevelILFunction &il,
18591857

18601858
case PPC_ID_FMSUBx:
18611859
REQUIRE4OPS
1862-
ei0 = il.MultDoublePrecSigned(8, operToIL(il, oper1, PPC_IL_OPTIONS_DEFAULT, PPC_IL_EXTRA_DEFAULT, 8),
1863-
operToIL(il, oper3, PPC_IL_OPTIONS_DEFAULT, PPC_IL_EXTRA_DEFAULT, 8));
1864-
ei0 = il.FloatSub(8, ei0, operToIL(il, oper2, PPC_IL_OPTIONS_DEFAULT, PPC_IL_EXTRA_DEFAULT, 8));
1860+
ei0 = il.FloatMult(8, operToIL_a(il, oper1, 8),
1861+
operToIL_a(il, oper3, 8));
1862+
ei0 = il.FloatSub(8, ei0, operToIL_a(il, oper2, 8));
18651863
ei1 = il.SetRegister(8, oper0->reg, ei0, (instruction->flags.rc) ? IL_FLAGWRITE_CR0_F : 0);
18661864
il.AddInstruction(ei1);
18671865
break;
@@ -1896,9 +1894,9 @@ bool GetLowLevelILForPPCInstruction(Architecture *arch, LowLevelILFunction &il,
18961894

18971895
case PPC_ID_FNMADDx:
18981896
REQUIRE4OPS
1899-
ei0 = il.MultDoublePrecSigned(8, operToIL(il, oper1, PPC_IL_OPTIONS_DEFAULT, PPC_IL_EXTRA_DEFAULT, 8),
1900-
operToIL(il, oper3, PPC_IL_OPTIONS_DEFAULT, PPC_IL_EXTRA_DEFAULT, 8));
1901-
ei0 = il.FloatAdd(8, ei0, operToIL(il, oper2, PPC_IL_OPTIONS_DEFAULT, PPC_IL_EXTRA_DEFAULT, 8));
1897+
ei0 = il.FloatMult(8, operToIL_a(il, oper1, 8),
1898+
operToIL_a(il, oper3, 8));
1899+
ei0 = il.FloatAdd(8, ei0, operToIL_a(il, oper2, 8));
19021900
ei0 = il.FloatNeg(8, ei0);
19031901
ei1 = il.SetRegister(8, oper0->reg, ei0, (instruction->flags.rc) ? IL_FLAGWRITE_CR0_F : 0);
19041902
il.AddInstruction(ei1);
@@ -1915,9 +1913,9 @@ bool GetLowLevelILForPPCInstruction(Architecture *arch, LowLevelILFunction &il,
19151913

19161914
case PPC_ID_FNMSUBx:
19171915
REQUIRE4OPS
1918-
ei0 = il.MultDoublePrecSigned(8, operToIL(il, oper1, PPC_IL_OPTIONS_DEFAULT, PPC_IL_EXTRA_DEFAULT, 8),
1919-
operToIL(il, oper3, PPC_IL_OPTIONS_DEFAULT, PPC_IL_EXTRA_DEFAULT, 8));
1920-
ei0 = il.FloatSub(8, ei0, operToIL(il, oper2, PPC_IL_OPTIONS_DEFAULT, PPC_IL_EXTRA_DEFAULT, 8));
1916+
ei0 = il.FloatMult(8, operToIL_a(il, oper1, 8),
1917+
operToIL_a(il, oper3, 8));
1918+
ei0 = il.FloatSub(8, ei0, operToIL_a(il, oper2, 8));
19211919
ei0 = il.FloatNeg(8, ei0);
19221920
ei1 = il.SetRegister(8, oper0->reg, ei0, (instruction->flags.rc) ? IL_FLAGWRITE_CR0_F : 0);
19231921
il.AddInstruction(ei1);
@@ -1953,7 +1951,7 @@ bool GetLowLevelILForPPCInstruction(Architecture *arch, LowLevelILFunction &il,
19531951
case PPC_ID_FRSQRTEx:
19541952
REQUIRE2OPS
19551953
ei0 = il.FloatConstDouble(1);
1956-
ei1 = il.FloatSqrt(8, operToIL(il, oper1, PPC_IL_OPTIONS_DEFAULT, PPC_IL_EXTRA_DEFAULT, 8));
1954+
ei1 = il.FloatSqrt(8, operToIL_a(il, oper1, 8));
19571955
ei1 = il.DivDoublePrecSigned(8, ei0, ei1);
19581956
ei1 = il.SetRegister(8, oper0->reg, ei1, (instruction->flags.rc) ? IL_FLAGWRITE_CR0_F : 0);
19591957
il.AddInstruction(ei1);
@@ -1962,7 +1960,7 @@ bool GetLowLevelILForPPCInstruction(Architecture *arch, LowLevelILFunction &il,
19621960
case PPC_ID_FRSQRTESx:
19631961
REQUIRE2OPS
19641962
ei0 = il.FloatConstSingle(1);
1965-
ei1 = il.FloatSqrt(4, operToIL(il, oper1, PPC_IL_OPTIONS_DEFAULT, PPC_IL_EXTRA_DEFAULT, 8));
1963+
ei1 = il.FloatSqrt(4, operToIL_a(il, oper1, 8));
19661964
ei1 = il.FloatDiv(4, ei0, ei1);
19671965
ei1 = il.SetRegister(4, oper0->reg, ei1, (instruction->flags.rc) ? IL_FLAGWRITE_CR0_F : 0);
19681966
il.AddInstruction(ei1);
@@ -1989,7 +1987,7 @@ bool GetLowLevelILForPPCInstruction(Architecture *arch, LowLevelILFunction &il,
19891987
{RegisterOrFlag::Register(oper0->reg)},
19901988
PPC_PS_INTRIN_QUANTIZE,
19911989
{
1992-
operToIL(il, oper0, PPC_IL_OPTIONS_DEFAULT, PPC_IL_EXTRA_DEFAULT, 4),
1990+
operToIL(il, oper0),
19931991
il.Const(4, oper3->uimm)
19941992
}
19951993
);
@@ -2000,7 +1998,7 @@ bool GetLowLevelILForPPCInstruction(Architecture *arch, LowLevelILFunction &il,
20001998
ei0 = il.Store(8, operToIL(il, oper1),
20011999
// temporary measure to allow it to resemble the instruction, just oper2il oper0
20022000
// ei0
2003-
operToIL(il, oper0, PPC_IL_OPTIONS_DEFAULT, PPC_IL_EXTRA_DEFAULT, 4)
2001+
operToIL(il, oper0)
20042002
// ei2
20052003
);
20062004
il.AddInstruction(ei0);

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