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noonefuzyll
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Remove checks for 64-bit shift instructions
These aren't really needed; if it's for a 32-bit architecture that can't handle 64-bit shifts, then the instruction won't be decoded in the first place. Because the registerSize is derived from the address size, it may interfere with 64-bit architectures that are using signed 32-bit addresses. There are a few other places that check registerSize (for example, the 32->64 bit sign extension idiom and MADD, MADDU) that are suspect, but not included in this commit. The difference is that for 64-bit shifts, checking at all for the register size is the problem; for those, the check is still needed to figure out whether to sign extend or not, but the value of registerSize is suspect.
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arch/mips/il.cpp

Lines changed: 0 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -1493,53 +1493,23 @@ bool GetLowLevelILForInstruction(Architecture* arch, uint64_t addr, LowLevelILFu
14931493
break;
14941494
case MIPS_DSLL:
14951495
case MIPS_DSLL32:
1496-
if (registerSize != 8)
1497-
{
1498-
il.AddInstruction(il.Unimplemented());
1499-
break;
1500-
}
15011496
il.AddInstruction(SetRegisterOrNop(il, 8, registerSize, op1.reg, il.ShiftLeft(8, ReadILOperand(il, instr, 2, registerSize), ReadILOperand(il, instr, 3, registerSize))));
15021497
break;
15031498
case MIPS_DSLLV:
1504-
if (registerSize != 8)
1505-
{
1506-
il.AddInstruction(il.Undefined());
1507-
break;
1508-
}
15091499
il.AddInstruction(SetRegisterOrNop(il, 8, registerSize, op1.reg, il.ShiftLeft(8, ReadILOperand(il, instr, 2, registerSize), il.And(8, ReadILOperand(il, instr, 3, registerSize), il.Const(8, 0x3f)))));
15101500
break;
15111501
case MIPS_DSRL:
15121502
case MIPS_DSRL32:
1513-
if (registerSize != 8)
1514-
{
1515-
il.AddInstruction(il.Unimplemented());
1516-
break;
1517-
}
15181503
il.AddInstruction(SetRegisterOrNop(il, 8, registerSize, op1.reg, il.LogicalShiftRight(8, ReadILOperand(il, instr, 2, registerSize), ReadILOperand(il, instr, 3, registerSize))));
15191504
break;
15201505
case MIPS_DSRLV:
1521-
if (registerSize != 8)
1522-
{
1523-
il.AddInstruction(il.Undefined());
1524-
break;
1525-
}
15261506
il.AddInstruction(SetRegisterOrNop(il, 8, registerSize, op1.reg, il.LogicalShiftRight(8, ReadILOperand(il, instr, 2, registerSize), il.And(8, ReadILOperand(il, instr, 3, registerSize), il.Const(8, 0x3f)))));
15271507
break;
15281508
case MIPS_DSRA:
15291509
case MIPS_DSRA32:
1530-
if (registerSize != 8)
1531-
{
1532-
il.AddInstruction(il.Unimplemented());
1533-
break;
1534-
}
15351510
il.AddInstruction(SetRegisterOrNop(il, 8, registerSize, op1.reg, il.ArithShiftRight(8, ReadILOperand(il, instr, 2, registerSize), ReadILOperand(il, instr, 3, registerSize))));
15361511
break;
15371512
case MIPS_DSRAV:
1538-
if (registerSize != 8)
1539-
{
1540-
il.AddInstruction(il.Undefined());
1541-
break;
1542-
}
15431513
il.AddInstruction(SetRegisterOrNop(il, 8, registerSize, op1.reg, il.ArithShiftRight(8, ReadILOperand(il, instr, 2, registerSize), il.And(8, ReadILOperand(il, instr, 3, registerSize), il.Const(8, 0x3f)))));
15441514
break;
15451515
case MIPS_SB:

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