Skip to content

Commit d59ee7f

Browse files
committed
ARMv7: Add support for register-shifted registers
1 parent f8ca56c commit d59ee7f

File tree

1 file changed

+61
-1
lines changed

1 file changed

+61
-1
lines changed

arch/armv7/il.cpp

Lines changed: 61 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -167,13 +167,73 @@ static ExprId GetShiftedOffset(LowLevelILFunction& il, InstructionOperand& op)
167167
}
168168

169169

170+
static ExprId GetRegisterShiftedRegister(LowLevelILFunction& il, Register reg, Register shiftReg, Shift shiftType)
171+
{
172+
if (shiftType == SHIFT_NONE)
173+
return il.Register(get_register_size(reg), reg);
174+
175+
uint32_t regSize = get_register_size(reg);
176+
uint32_t shiftRegSize = get_register_size(shiftReg);
177+
switch (shiftType)
178+
{
179+
case SHIFT_ASR:
180+
return il.ArithShiftRight(
181+
regSize,
182+
il.Register(regSize, reg),
183+
il.And(
184+
shiftRegSize,
185+
il.Register(shiftRegSize, shiftReg),
186+
il.Const(shiftRegSize, 0xff)
187+
));
188+
case SHIFT_LSL:
189+
return il.ShiftLeft(
190+
regSize,
191+
il.Register(regSize, reg),
192+
il.And(
193+
shiftRegSize,
194+
il.Register(shiftRegSize, shiftReg),
195+
il.Const(shiftRegSize, 0xff)
196+
));
197+
case SHIFT_LSR:
198+
return il.LogicalShiftRight(
199+
regSize,
200+
il.Register(regSize, reg),
201+
il.And(
202+
shiftRegSize,
203+
il.Register(shiftRegSize, shiftReg),
204+
il.Const(shiftRegSize, 0xff)
205+
));
206+
case SHIFT_ROR:
207+
return il.RotateRight(
208+
regSize,
209+
il.Register(regSize, reg),
210+
il.And(
211+
shiftRegSize,
212+
il.Register(shiftRegSize, shiftReg),
213+
il.Const(shiftRegSize, 0xff)
214+
));
215+
case SHIFT_RRX:
216+
//RRX can only shift 1 at a time
217+
return il.RotateRightCarry(
218+
regSize,
219+
il.Register(regSize, reg),
220+
il.Const(1, 1),
221+
il.Flag(IL_FLAG_C)
222+
);
223+
default:
224+
return 0;
225+
}
226+
}
227+
228+
170229
static ExprId GetShiftedRegister(LowLevelILFunction& il, InstructionOperand& op)
171230
{
231+
if (op.flags.offsetRegUsed == 1)
232+
return GetRegisterShiftedRegister(il, op.reg, op.offset, op.shift);
172233
return GetShifted(il, op.reg, op.imm, op.shift);
173234
}
174235

175236

176-
177237
static ExprId ReadAddress(LowLevelILFunction& il, InstructionOperand& op, size_t addr)
178238
{
179239
//This should only be called by with cls or MEM_* or label

0 commit comments

Comments
 (0)