@@ -530,8 +530,13 @@ class MipsArchitecture: public Architecture
530530 {
531531 InstructionInfo instrInfo;
532532 LowLevelILLabel trueCode, falseCode;
533+ auto registerSize = [=](const InstructionOperand& op) -> size_t const
534+ {
535+ return get_register_width (Reg (op.reg ), m_version);
536+ };
537+
533538 SetInstructionInfoForInstruction (addr, instr, instrInfo);
534- il.AddInstruction (il.If (GetConditionForInstruction (il, instr, GetAddressSize () ), trueCode, falseCode));
539+ il.AddInstruction (il.If (GetConditionForInstruction (il, instr, registerSize ), trueCode, falseCode));
535540 il.MarkLabel (trueCode);
536541 il.SetCurrentAddress (this , addr + instr.size );
537542 GetLowLevelILForInstruction (this , addr + instr.size , il, secondInstr, GetAddressSize (), m_decomposeFlags, m_version);
@@ -2108,7 +2113,7 @@ class MipsArchitecture: public Architecture
21082113 {
21092114 BNRegisterInfo result = {reg, 0 , m_bits / 8 , NoExtend};
21102115 if (m_version == MIPS_R5900) {
2111- result.size = get_register_width (reg, m_version);
2116+ result.size = get_register_width (reg, m_version, 16 );
21122117 switch (reg) {
21132118 // case REG_LO:
21142119 // case REG_HI:
@@ -2123,6 +2128,7 @@ class MipsArchitecture: public Architecture
21232128 result.fullWidthRegister = REG_HI;
21242129 break ;
21252130 default :
2131+ break ;
21262132 // if (REG_ZERO <= reg && reg < REG_GP)
21272133 // result.size = 128 / 8;
21282134 }
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