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WIP [mips] Fixing PR for r5900: fixed register sizes depending on instruction context; lifting unsigned unsigned padd* and saturating paddu*
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4 files changed

+759
-431
lines changed

4 files changed

+759
-431
lines changed

arch/mips/arch_mips.cpp

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -530,8 +530,13 @@ class MipsArchitecture: public Architecture
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{
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InstructionInfo instrInfo;
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LowLevelILLabel trueCode, falseCode;
533+
auto registerSize = [=](const InstructionOperand& op) -> size_t const
534+
{
535+
return get_register_width(Reg(op.reg), m_version);
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};
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SetInstructionInfoForInstruction(addr, instr, instrInfo);
534-
il.AddInstruction(il.If(GetConditionForInstruction(il, instr, GetAddressSize()), trueCode, falseCode));
539+
il.AddInstruction(il.If(GetConditionForInstruction(il, instr, registerSize), trueCode, falseCode));
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il.MarkLabel(trueCode);
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il.SetCurrentAddress(this, addr + instr.size);
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GetLowLevelILForInstruction(this, addr + instr.size, il, secondInstr, GetAddressSize(), m_decomposeFlags, m_version);
@@ -2108,7 +2113,7 @@ class MipsArchitecture: public Architecture
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{
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BNRegisterInfo result = {reg, 0, m_bits / 8, NoExtend};
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if (m_version == MIPS_R5900) {
2111-
result.size = get_register_width(reg, m_version);
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result.size = get_register_width(reg, m_version, 16);
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switch (reg) {
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// case REG_LO:
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// case REG_HI:
@@ -2123,6 +2128,7 @@ class MipsArchitecture: public Architecture
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result.fullWidthRegister = REG_HI;
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break;
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default:
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break;
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// if (REG_ZERO <= reg && reg < REG_GP)
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// result.size = 128 / 8;
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}

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