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[SIMD] Make swizzle's opcode name consistent (NFC) (#4585)
Other opcode ends with `Inxm` or `Fnxm` (where n and m are integers), while `i8x16.swizzle`'s opcode name doesn't have an `I` in there.
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14 files changed

+24
-24
lines changed

14 files changed

+24
-24
lines changed

‎scripts/gen-s-parser.py‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -503,7 +503,7 @@
503503
("i64x2.extend_high_i32x4_s", "makeUnary(s, UnaryOp::ExtendHighSVecI32x4ToVecI64x2)"),
504504
("i64x2.extend_low_i32x4_u", "makeUnary(s, UnaryOp::ExtendLowUVecI32x4ToVecI64x2)"),
505505
("i64x2.extend_high_i32x4_u", "makeUnary(s, UnaryOp::ExtendHighUVecI32x4ToVecI64x2)"),
506-
("i8x16.swizzle", "makeBinary(s, BinaryOp::SwizzleVec8x16)"),
506+
("i8x16.swizzle", "makeBinary(s, BinaryOp::SwizzleVecI8x16)"),
507507
("i16x8.extadd_pairwise_i8x16_s", "makeUnary(s, UnaryOp::ExtAddPairwiseSVecI8x16ToI16x8)"),
508508
("i16x8.extadd_pairwise_i8x16_u", "makeUnary(s, UnaryOp::ExtAddPairwiseUVecI8x16ToI16x8)"),
509509
("i32x4.extadd_pairwise_i16x8_s", "makeUnary(s, UnaryOp::ExtAddPairwiseSVecI16x8ToI32x4)"),
@@ -516,7 +516,7 @@
516516
("f64x2.promote_low_f32x4", "makeUnary(s, UnaryOp::PromoteLowVecF32x4ToVecF64x2)"),
517517

518518
# relaxed SIMD ops
519-
("i8x16.relaxed_swizzle", "makeBinary(s, BinaryOp::RelaxedSwizzleVec8x16)"),
519+
("i8x16.relaxed_swizzle", "makeBinary(s, BinaryOp::RelaxedSwizzleVecI8x16)"),
520520
("i32x4.relaxed_trunc_f32x4_s", "makeUnary(s, UnaryOp::RelaxedTruncSVecF32x4ToVecI32x4)"),
521521
("i32x4.relaxed_trunc_f32x4_u", "makeUnary(s, UnaryOp::RelaxedTruncUVecF32x4ToVecI32x4)"),
522522
("i32x4.relaxed_trunc_f64x2_s_zero", "makeUnary(s, UnaryOp::RelaxedTruncZeroSVecF64x2ToVecI32x4)"),

‎src/binaryen-c.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -757,7 +757,7 @@ BinaryenOp BinaryenDemoteZeroVecF64x2ToVecF32x4(void) {
757757
BinaryenOp BinaryenPromoteLowVecF32x4ToVecF64x2(void) {
758758
return PromoteLowVecF32x4ToVecF64x2;
759759
}
760-
BinaryenOp BinaryenSwizzleVec8x16(void) { return SwizzleVec8x16; }
760+
BinaryenOp BinaryenSwizzleVecI8x16(void) { return SwizzleVecI8x16; }
761761
BinaryenOp BinaryenRefIsNull(void) { return RefIsNull; }
762762
BinaryenOp BinaryenRefIsFunc(void) { return RefIsFunc; }
763763
BinaryenOp BinaryenRefIsData(void) { return RefIsData; }

‎src/binaryen-c.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -592,7 +592,7 @@ BINARYEN_API BinaryenOp BinaryenTruncSatZeroSVecF64x2ToVecI32x4(void);
592592
BINARYEN_API BinaryenOp BinaryenTruncSatZeroUVecF64x2ToVecI32x4(void);
593593
BINARYEN_API BinaryenOp BinaryenDemoteZeroVecF64x2ToVecF32x4(void);
594594
BINARYEN_API BinaryenOp BinaryenPromoteLowVecF32x4ToVecF64x2(void);
595-
BINARYEN_API BinaryenOp BinaryenSwizzleVec8x16(void);
595+
BINARYEN_API BinaryenOp BinaryenSwizzleVecI8x16(void);
596596
BINARYEN_API BinaryenOp BinaryenRefIsNull(void);
597597
BINARYEN_API BinaryenOp BinaryenRefIsFunc(void);
598598
BINARYEN_API BinaryenOp BinaryenRefIsData(void);

‎src/gen-s-parser.inc‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2836,7 +2836,7 @@ switch (op[0]) {
28362836
case 'r': {
28372837
switch (op[8]) {
28382838
case 'l':
2839-
if (strcmp(op, "i8x16.relaxed_swizzle") == 0) { return makeBinary(s, BinaryOp::RelaxedSwizzleVec8x16); }
2839+
if (strcmp(op, "i8x16.relaxed_swizzle") == 0) { return makeBinary(s, BinaryOp::RelaxedSwizzleVecI8x16); }
28402840
goto parse_error;
28412841
case 'p':
28422842
if (strcmp(op, "i8x16.replace_lane") == 0) { return makeSIMDReplace(s, SIMDReplaceOp::ReplaceLaneVecI8x16, 16); }
@@ -2891,7 +2891,7 @@ switch (op[0]) {
28912891
}
28922892
}
28932893
case 'w':
2894-
if (strcmp(op, "i8x16.swizzle") == 0) { return makeBinary(s, BinaryOp::SwizzleVec8x16); }
2894+
if (strcmp(op, "i8x16.swizzle") == 0) { return makeBinary(s, BinaryOp::SwizzleVecI8x16); }
28952895
goto parse_error;
28962896
default: goto parse_error;
28972897
}

‎src/ir/cost.h‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -491,8 +491,8 @@ struct CostAnalyzer : public OverriddenVisitor<CostAnalyzer, CostType> {
491491
case NarrowUVecI16x8ToVecI8x16:
492492
case NarrowSVecI32x4ToVecI16x8:
493493
case NarrowUVecI32x4ToVecI16x8:
494-
case SwizzleVec8x16:
495-
case RelaxedSwizzleVec8x16:
494+
case SwizzleVecI8x16:
495+
case RelaxedSwizzleVecI8x16:
496496
case RelaxedQ15MulrSVecI16x8:
497497
ret = 1;
498498
break;

‎src/js/binaryen.js-post.js‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -530,7 +530,7 @@ function initializeConstants() {
530530
'TruncSatZeroUVecF64x2ToVecI32x4',
531531
'DemoteZeroVecF64x2ToVecF32x4',
532532
'PromoteLowVecF32x4ToVecF64x2',
533-
'SwizzleVec8x16',
533+
'SwizzleVecI8x16',
534534
'RefIsNull',
535535
'RefIsFunc',
536536
'RefIsData',
@@ -1597,7 +1597,7 @@ function wrapModule(module, self = {}) {
15971597
return preserveStack(() => Module['_BinaryenSIMDShuffle'](module, left, right, i8sToStack(mask)));
15981598
},
15991599
'swizzle'(left, right) {
1600-
return Module['_BinaryenBinary'](module, Module['SwizzleVec8x16'], left, right);
1600+
return Module['_BinaryenBinary'](module, Module['SwizzleVecI8x16'], left, right);
16011601
},
16021602
'splat'(value) {
16031603
return Module['_BinaryenUnary'](module, Module['SplatVecI8x16'], value);

‎src/passes/Print.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1832,7 +1832,7 @@ struct PrintExpressionContents
18321832
o << "i16x8.narrow_i32x4_u";
18331833
break;
18341834

1835-
case SwizzleVec8x16:
1835+
case SwizzleVecI8x16:
18361836
o << "i8x16.swizzle";
18371837
break;
18381838

@@ -1848,7 +1848,7 @@ struct PrintExpressionContents
18481848
case RelaxedMaxVecF64x2:
18491849
o << "f64x2.relaxed_max";
18501850
break;
1851-
case RelaxedSwizzleVec8x16:
1851+
case RelaxedSwizzleVecI8x16:
18521852
o << "i8x16.relaxed_swizzle";
18531853
break;
18541854
case RelaxedQ15MulrSVecI16x8:

‎src/tools/fuzzing/fuzzing.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2442,7 +2442,7 @@ Expression* TranslateToFuzzReader::makeBinary(Type type) {
24422442
NarrowUVecI16x8ToVecI8x16,
24432443
NarrowSVecI32x4ToVecI16x8,
24442444
NarrowUVecI32x4ToVecI16x8,
2445-
SwizzleVec8x16),
2445+
SwizzleVecI8x16),
24462446
make(Type::v128),
24472447
make(Type::v128)});
24482448
}

‎src/wasm-interpreter.h‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1012,8 +1012,8 @@ class ExpressionRunner : public OverriddenVisitor<SubType, Flow> {
10121012
case NarrowUVecI32x4ToVecI16x8:
10131013
return left.narrowUToI16x8(right);
10141014

1015-
case SwizzleVec8x16:
1016-
case RelaxedSwizzleVec8x16:
1015+
case SwizzleVecI8x16:
1016+
case RelaxedSwizzleVecI8x16:
10171017
return left.swizzleI8x16(right);
10181018

10191019
case InvalidBinary:

‎src/wasm.h‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -464,10 +464,10 @@ enum BinaryOp {
464464
NarrowUVecI32x4ToVecI16x8,
465465

466466
// SIMD Swizzle
467-
SwizzleVec8x16,
467+
SwizzleVecI8x16,
468468

469469
// Relaxed SIMD
470-
RelaxedSwizzleVec8x16,
470+
RelaxedSwizzleVecI8x16,
471471
RelaxedMinVecF32x4,
472472
RelaxedMaxVecF32x4,
473473
RelaxedMinVecF64x2,

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