Implement pause (#7751)

tlively · web-flow · commit 7bee1a13991b · 2025-07-25T11:44:08.000-07:00
The `pause` instruction is introduced by the shared-everything-threads
proposal to make spinlocks more efficient. It has no observable
semantics, so it is essentially a fancy nop.
diff --git a/scripts/gen-s-parser.py b/scripts/gen-s-parser.py
@@ -207,6 +207,7 @@
     ("memory.atomic.wait32",    "makeAtomicWait(Type::i32)"),
     ("memory.atomic.wait64",    "makeAtomicWait(Type::i64)"),
     ("atomic.fence",            "makeAtomicFence()"),
+    ("pause",                   "makePause()"),
     ("i32.atomic.load8_u",      "makeLoad(Type::i32, /*signed=*/false, 1, /*isAtomic=*/true)"),
     ("i32.atomic.load16_u",     "makeLoad(Type::i32, /*signed=*/false, 2, /*isAtomic=*/true)"),
     ("i32.atomic.load",         "makeLoad(Type::i32, /*signed=*/false, 4, /*isAtomic=*/true)"),
diff --git a/src/gen-s-parser.inc b/src/gen-s-parser.inc
@@ -4859,12 +4859,23 @@ switch (buf[0]) {
       return Ok{};
     }
     goto parse_error;
-  case 'p':
-    if (op == "pop"sv) {
-      CHECK_ERR(makePop(ctx, pos, annotations));
-      return Ok{};
+  case 'p': {
+    switch (buf[1]) {
+      case 'a':
+        if (op == "pause"sv) {
+          CHECK_ERR(makePause(ctx, pos, annotations));
+          return Ok{};
+        }
+        goto parse_error;
+      case 'o':
+        if (op == "pop"sv) {
+          CHECK_ERR(makePop(ctx, pos, annotations));
+          return Ok{};
+        }
+        goto parse_error;
+      default: goto parse_error;
     }
-    goto parse_error;
+  }
   case 'r': {
     switch (buf[2]) {
       case 'f': {
diff --git a/src/interpreter/interpreter.cpp b/src/interpreter/interpreter.cpp
@@ -78,6 +78,7 @@ struct ExpressionInterpreter : OverriddenVisitor<ExpressionInterpreter, Flow> {
   Flow visitAtomicWait(AtomicWait* curr) { WASM_UNREACHABLE("TODO"); }
   Flow visitAtomicNotify(AtomicNotify* curr) { WASM_UNREACHABLE("TODO"); }
   Flow visitAtomicFence(AtomicFence* curr) { WASM_UNREACHABLE("TODO"); }
+  Flow visitPause(Pause* curr) { WASM_UNREACHABLE("TODO"); }
   Flow visitSIMDExtract(SIMDExtract* curr) { WASM_UNREACHABLE("TODO"); }
   Flow visitSIMDReplace(SIMDReplace* curr) { WASM_UNREACHABLE("TODO"); }
   Flow visitSIMDShuffle(SIMDShuffle* curr) { WASM_UNREACHABLE("TODO"); }
diff --git a/src/ir/ReFinalize.cpp b/src/ir/ReFinalize.cpp
@@ -91,6 +91,7 @@ void ReFinalize::visitAtomicCmpxchg(AtomicCmpxchg* curr) { curr->finalize(); }
 void ReFinalize::visitAtomicWait(AtomicWait* curr) { curr->finalize(); }
 void ReFinalize::visitAtomicNotify(AtomicNotify* curr) { curr->finalize(); }
 void ReFinalize::visitAtomicFence(AtomicFence* curr) { curr->finalize(); }
+void ReFinalize::visitPause(Pause* curr) { curr->finalize(); }
 void ReFinalize::visitSIMDExtract(SIMDExtract* curr) { curr->finalize(); }
 void ReFinalize::visitSIMDReplace(SIMDReplace* curr) { curr->finalize(); }
 void ReFinalize::visitSIMDShuffle(SIMDShuffle* curr) { curr->finalize(); }
diff --git a/src/ir/child-typer.h b/src/ir/child-typer.h
@@ -244,6 +244,8 @@ template<typename Subtype> struct ChildTyper : OverriddenVisitor<Subtype> {
 
   void visitAtomicFence(AtomicFence* curr) {}
 
+  void visitPause(Pause* curr) {}
+
   void visitSIMDExtract(SIMDExtract* curr) { note(&curr->vec, Type::v128); }
 
   void visitSIMDReplace(SIMDReplace* curr) {
diff --git a/src/ir/cost.h b/src/ir/cost.h
@@ -116,6 +116,11 @@ struct CostAnalyzer : public OverriddenVisitor<CostAnalyzer, CostType> {
     return AtomicCost + visit(curr->ptr) + visit(curr->notifyCount);
   }
   CostType visitAtomicFence(AtomicFence* curr) { return AtomicCost; }
+  CostType visitPause(Pause* curr) {
+    // When used properly, pause only makes things more efficient, so we do not
+    // model it as having any cost.
+    return 0;
+  }
   CostType visitConst(Const* curr) { return 1; }
   CostType visitUnary(Unary* curr) {
     CostType ret = 0;
diff --git a/src/ir/effects.h b/src/ir/effects.h
@@ -643,6 +643,11 @@ class EffectAnalyzer {
       parent.writesMemory = true;
       parent.isAtomic = true;
     }
+    void visitPause(Pause* curr) {
+      // It's not much of a problem if pause gets reordered with anything, but
+      // we don't want it to be removed entirely.
+      parent.isAtomic = true;
+    }
     void visitSIMDExtract(SIMDExtract* curr) {}
     void visitSIMDReplace(SIMDReplace* curr) {}
     void visitSIMDShuffle(SIMDShuffle* curr) {}
diff --git a/src/ir/possible-contents.cpp b/src/ir/possible-contents.cpp
@@ -593,6 +593,7 @@ struct InfoCollector
   void visitAtomicWait(AtomicWait* curr) { addRoot(curr); }
   void visitAtomicNotify(AtomicNotify* curr) { addRoot(curr); }
   void visitAtomicFence(AtomicFence* curr) {}
+  void visitPause(Pause* curr) {}
   void visitSIMDExtract(SIMDExtract* curr) { addRoot(curr); }
   void visitSIMDReplace(SIMDReplace* curr) { addRoot(curr); }
   void visitSIMDShuffle(SIMDShuffle* curr) { addRoot(curr); }
diff --git a/src/ir/subtype-exprs.h b/src/ir/subtype-exprs.h
@@ -188,6 +188,7 @@ struct SubtypingDiscoverer : public OverriddenVisitor<SubType> {
   void visitAtomicWait(AtomicWait* curr) {}
   void visitAtomicNotify(AtomicNotify* curr) {}
   void visitAtomicFence(AtomicFence* curr) {}
+  void visitPause(Pause* curr) {}
   void visitSIMDExtract(SIMDExtract* curr) {}
   void visitSIMDReplace(SIMDReplace* curr) {}
   void visitSIMDShuffle(SIMDShuffle* curr) {}
diff --git a/src/parser/contexts.h b/src/parser/contexts.h
@@ -593,6 +593,7 @@ struct NullInstrParserCtx {
   Result<> makeAtomicFence(Index, const std::vector<Annotation>&) {
     return Ok{};
   }
+  Result<> makePause(Index, const std::vector<Annotation>&) { return Ok{}; }
   Result<> makeSIMDExtract(Index,
                            const std::vector<Annotation>&,
                            SIMDExtractOp,
@@ -2301,6 +2302,10 @@ struct ParseDefsCtx : TypeParserCtx<ParseDefsCtx>, AnnotationParserCtx {
     return withLoc(pos, irBuilder.makeAtomicFence());
   }
 
+  Result<> makePause(Index pos, const std::vector<Annotation>& annotations) {
+    return withLoc(pos, irBuilder.makePause());
+  }
+
   Result<> makeSIMDExtract(Index pos,
                            const std::vector<Annotation>& annotations,
                            SIMDExtractOp op,
diff --git a/src/parser/parsers.h b/src/parser/parsers.h
@@ -142,6 +142,8 @@ Result<> makeAtomicNotify(Ctx&, Index, const std::vector<Annotation>&);
 template<typename Ctx>
 Result<> makeAtomicFence(Ctx&, Index, const std::vector<Annotation>&);
 template<typename Ctx>
+Result<> makePause(Ctx&, Index, const std::vector<Annotation>&);
+template<typename Ctx>
 Result<> makeSIMDExtract(
   Ctx&, Index, const std::vector<Annotation>&, SIMDExtractOp op, size_t lanes);
 template<typename Ctx>
@@ -1815,6 +1817,12 @@ Result<> makeAtomicFence(Ctx& ctx,
   return ctx.makeAtomicFence(pos, annotations);
 }
 
+template<typename Ctx>
+Result<>
+makePause(Ctx& ctx, Index pos, const std::vector<Annotation>& annotations) {
+  return ctx.makePause(pos, annotations);
+}
+
 template<typename Ctx>
 Result<> makeSIMDExtract(Ctx& ctx,
                          Index pos,
diff --git a/src/passes/Print.cpp b/src/passes/Print.cpp
@@ -689,6 +689,7 @@ struct PrintExpressionContents
     }
   }
   void visitAtomicFence(AtomicFence* curr) { printMedium(o, "atomic.fence"); }
+  void visitPause(Pause* curr) { printMedium(o, "pause"); }
   void visitSIMDExtract(SIMDExtract* curr) {
     prepareColor(o);
     switch (curr->op) {
diff --git a/src/passes/TypeGeneralizing.cpp b/src/passes/TypeGeneralizing.cpp
@@ -417,6 +417,7 @@ struct TransferFn : OverriddenVisitor<TransferFn> {
   void visitAtomicWait(AtomicWait* curr) {}
   void visitAtomicNotify(AtomicNotify* curr) {}
   void visitAtomicFence(AtomicFence* curr) {}
+  void visitPause(Pause* curr) {}
   void visitSIMDExtract(SIMDExtract* curr) {}
   void visitSIMDReplace(SIMDReplace* curr) {}
   void visitSIMDShuffle(SIMDShuffle* curr) {}
diff --git a/src/wasm-binary.h b/src/wasm-binary.h
@@ -693,6 +693,7 @@ enum ASTNodes {
   I32AtomicWait = 0x01,
   I64AtomicWait = 0x02,
   AtomicFence = 0x03,
+  Pause = 0x04,
 
   I32AtomicLoad = 0x10,
   I64AtomicLoad = 0x11,
diff --git a/src/wasm-builder.h b/src/wasm-builder.h
@@ -399,6 +399,7 @@ class Builder {
     return notify;
   }
   AtomicFence* makeAtomicFence() { return wasm.allocator.alloc<AtomicFence>(); }
+  Pause* makePause() { return wasm.allocator.alloc<Pause>(); }
   Store* makeStore(unsigned bytes,
                    Address offset,
                    unsigned align,
diff --git a/src/wasm-delegations-fields.def b/src/wasm-delegations-fields.def
@@ -407,6 +407,9 @@ DELEGATE_FIELD_CASE_START(AtomicFence)
 DELEGATE_FIELD_INT(AtomicFence, order)
 DELEGATE_FIELD_CASE_END(AtomicFence)
 
+DELEGATE_FIELD_CASE_START(Pause)
+DELEGATE_FIELD_CASE_END(Pause)
+
 DELEGATE_FIELD_CASE_START(SIMDExtract)
 DELEGATE_FIELD_CHILD(SIMDExtract, vec)
 DELEGATE_FIELD_INT(SIMDExtract, op)
diff --git a/src/wasm-delegations.def b/src/wasm-delegations.def
@@ -33,6 +33,7 @@ DELEGATE(AtomicCmpxchg);
 DELEGATE(AtomicWait);
 DELEGATE(AtomicNotify);
 DELEGATE(AtomicFence);
+DELEGATE(Pause);
 DELEGATE(SIMDExtract);
 DELEGATE(SIMDReplace);
 DELEGATE(SIMDShuffle);
diff --git a/src/wasm-interpreter.h b/src/wasm-interpreter.h
@@ -1469,6 +1469,10 @@ class ExpressionRunner : public OverriddenVisitor<SubType, Flow> {
     NOTE_ENTER("AtomicFence");
     return Flow();
   }
+  Flow visitPause(Pause* curr) {
+    NOTE_ENTER("AtomicFence");
+    return Flow();
+  }
   Flow visitTupleMake(TupleMake* curr) {
     NOTE_ENTER("tuple.make");
     Literals arguments;
diff --git a/src/wasm-ir-builder.h b/src/wasm-ir-builder.h
@@ -165,6 +165,7 @@ class IRBuilder : public UnifiedExpressionVisitor<IRBuilder, Result<>> {
   Result<> makeAtomicWait(Type type, Address offset, Name mem);
   Result<> makeAtomicNotify(Address offset, Name mem);
   Result<> makeAtomicFence();
+  Result<> makePause();
   Result<> makeSIMDExtract(SIMDExtractOp op, uint8_t lane);
   Result<> makeSIMDReplace(SIMDReplaceOp op, uint8_t lane);
   Result<> makeSIMDShuffle(const std::array<uint8_t, 16>& lanes);
diff --git a/src/wasm.h b/src/wasm.h
@@ -685,6 +685,7 @@ class Expression {
     AtomicWaitId,
     AtomicNotifyId,
     AtomicFenceId,
+    PauseId,
     SIMDExtractId,
     SIMDReplaceId,
     SIMDShuffleId,
@@ -1085,8 +1086,12 @@ class AtomicFence : public SpecificExpression<Expression::AtomicFenceId> {
   // other orderings may be added in the future. This field is reserved for
   // that, and currently set to 0.
   uint8_t order = 0;
+};
 
-  void finalize();
+class Pause : public SpecificExpression<Expression::PauseId> {
+public:
+  Pause() = default;
+  Pause(MixedArena& allocator) {}
 };
 
 class SIMDExtract : public SpecificExpression<Expression::SIMDExtractId> {
diff --git a/src/wasm/wasm-binary.cpp b/src/wasm/wasm-binary.cpp
@@ -3728,6 +3728,8 @@ Result<> WasmBinaryReader::readInst() {
             return Err{"expected 0x00 byte immediate on atomic.fence"};
           }
           return builder.makeAtomicFence();
+        case BinaryConsts::Pause:
+          return builder.makePause();
         case BinaryConsts::StructAtomicGet:
         case BinaryConsts::StructAtomicGetS:
         case BinaryConsts::StructAtomicGetU: {
diff --git a/src/wasm/wasm-ir-builder.cpp b/src/wasm/wasm-ir-builder.cpp
@@ -1648,6 +1648,11 @@ Result<> IRBuilder::makeAtomicFence() {
   return Ok{};
 }
 
+Result<> IRBuilder::makePause() {
+  push(builder.makePause());
+  return Ok{};
+}
+
 Result<> IRBuilder::makeSIMDExtract(SIMDExtractOp op, uint8_t lane) {
   SIMDExtract curr;
   CHECK_ERR(visitSIMDExtract(&curr));
diff --git a/src/wasm/wasm-stack.cpp b/src/wasm/wasm-stack.cpp
@@ -569,6 +569,10 @@ void BinaryInstWriter::visitAtomicFence(AtomicFence* curr) {
     << int8_t(curr->order);
 }
 
+void BinaryInstWriter::visitPause(Pause* curr) {
+  o << int8_t(BinaryConsts::AtomicPrefix) << U32LEB(BinaryConsts::Pause);
+}
+
 void BinaryInstWriter::visitSIMDExtract(SIMDExtract* curr) {
   o << int8_t(BinaryConsts::SIMDPrefix);
   switch (curr->op) {
diff --git a/src/wasm/wasm.cpp b/src/wasm/wasm.cpp
@@ -376,8 +376,6 @@ void AtomicNotify::finalize() {
   }
 }
 
-void AtomicFence::finalize() { type = Type::none; }
-
 void SIMDExtract::finalize() {
   assert(vec);
   switch (op) {
diff --git a/src/wasm2js.h b/src/wasm2js.h
@@ -2141,6 +2141,11 @@ Ref Wasm2JSBuilder::processExpression(Expression* curr,
 
     // TODOs
 
+    Ref visitPause(Pause* curr) {
+      unimplemented(curr);
+      WASM_UNREACHABLE("unimp");
+    }
+
     Ref visitSIMDExtract(SIMDExtract* curr) {
       unimplemented(curr);
       WASM_UNREACHABLE("unimp");
diff --git a/test/binaryen.js/exception-handling.js.txt b/test/binaryen.js/exception-handling.js.txt
@@ -34,7 +34,7 @@
  )
 )
 
-getExpressionInfo(throw) = {"id":55,"type":1,"tag":"e"}
-getExpressionInfo(rethrow) = {"id":56,"type":1,"target":"l0"}
-getExpressionInfo(try_catch) = {"id":53,"type":1,"name":"l0","hasCatchAll":false,"delegateTarget":null,"isDelegate":false}
-getExpressionInfo(try_delegate) = {"id":53,"type":0,"name":"try_outer","hasCatchAll":true,"delegateTarget":null,"isDelegate":false}
+getExpressionInfo(throw) = {"id":56,"type":1,"tag":"e"}
+getExpressionInfo(rethrow) = {"id":57,"type":1,"target":"l0"}
+getExpressionInfo(try_catch) = {"id":54,"type":1,"name":"l0","hasCatchAll":false,"delegateTarget":null,"isDelegate":false}
+getExpressionInfo(try_delegate) = {"id":54,"type":0,"name":"try_outer","hasCatchAll":true,"delegateTarget":null,"isDelegate":false}
diff --git a/test/binaryen.js/expressions.js b/test/binaryen.js/expressions.js
@@ -1324,9 +1324,6 @@ console.log("# AtomicFence");
 
   theAtomicFence.order = 1;
   assert(theAtomicFence.order === 1);
-  theAtomicFence.type = binaryen.f64;
-  theAtomicFence.finalize();
-  assert(theAtomicFence.type === binaryen.none);
 
   info = binaryen.getExpressionInfo(theAtomicFence);
   assert(info.type === theAtomicFence.type);
diff --git a/test/binaryen.js/kitchen-sink.js.txt b/test/binaryen.js/kitchen-sink.js.txt
diff --git a/test/lit/basic/pause.wast b/test/lit/basic/pause.wast
