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Rename idx to index in SIMD code for consistency (#1836)
1 parent 6974dbb commit af0ff22

18 files changed

+161
-161
lines changed

‎build-js.sh‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -685,12 +685,12 @@ export_function "_BinaryenAtomicWakeGetWakeCount"
685685
# 'SIMDExtract' expression operations
686686
export_function "_BinaryenSIMDExtractGetOp"
687687
export_function "_BinaryenSIMDExtractGetVec"
688-
export_function "_BinaryenSIMDExtractGetIdx"
688+
export_function "_BinaryenSIMDExtractGetIndex"
689689

690690
# 'SIMDReplace' expression operations
691691
export_function "_BinaryenSIMDReplaceGetOp"
692692
export_function "_BinaryenSIMDReplaceGetVec"
693-
export_function "_BinaryenSIMDReplaceGetIdx"
693+
export_function "_BinaryenSIMDReplaceGetIndex"
694694
export_function "_BinaryenSIMDReplaceGetValue"
695695

696696
# 'SIMDShuffle' expression operations

‎src/binaryen-c.cpp‎

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -1027,17 +1027,17 @@ BinaryenExpressionRef BinaryenAtomicWake(BinaryenModuleRef module, BinaryenExpre
10271027

10281028
return static_cast<Expression*>(ret);
10291029
}
1030-
BinaryenExpressionRef BinaryenSIMDExtract(BinaryenModuleRef module, BinaryenOp op, BinaryenExpressionRef vec, uint8_t idx) {
1031-
auto* ret = Builder(*((Module*)module)).makeSIMDExtract(SIMDExtractOp(op), (Expression*) vec, idx);
1030+
BinaryenExpressionRef BinaryenSIMDExtract(BinaryenModuleRef module, BinaryenOp op, BinaryenExpressionRef vec, uint8_t index) {
1031+
auto* ret = Builder(*((Module*)module)).makeSIMDExtract(SIMDExtractOp(op), (Expression*) vec, index);
10321032
if (tracing) {
1033-
traceExpression(ret, "BinaryenSIMDExtract", op, vec, int(idx));
1033+
traceExpression(ret, "BinaryenSIMDExtract", op, vec, int(index));
10341034
}
10351035
return static_cast<Expression*>(ret);
10361036
}
1037-
BinaryenExpressionRef BinaryenSIMDReplace(BinaryenModuleRef module, BinaryenOp op, BinaryenExpressionRef vec, uint8_t idx, BinaryenExpressionRef value) {
1038-
auto* ret = Builder(*((Module*)module)).makeSIMDReplace(SIMDReplaceOp(op), (Expression*) vec, idx, (Expression*)value);
1037+
BinaryenExpressionRef BinaryenSIMDReplace(BinaryenModuleRef module, BinaryenOp op, BinaryenExpressionRef vec, uint8_t index, BinaryenExpressionRef value) {
1038+
auto* ret = Builder(*((Module*)module)).makeSIMDReplace(SIMDReplaceOp(op), (Expression*) vec, index, (Expression*)value);
10391039
if (tracing) {
1040-
traceExpression(ret, "BinaryenSIMDReplace", op, vec, int(idx), value);
1040+
traceExpression(ret, "BinaryenSIMDReplace", op, vec, int(index), value);
10411041
}
10421042
return static_cast<Expression*>(ret);
10431043
}
@@ -1843,14 +1843,14 @@ BinaryenExpressionRef BinaryenSIMDExtractGetVec(BinaryenExpressionRef expr) {
18431843
assert(expression->is<SIMDExtract>());
18441844
return static_cast<SIMDExtract*>(expression)->vec;
18451845
}
1846-
uint8_t BinaryenSIMDExtractGetIdx(BinaryenExpressionRef expr) {
1846+
uint8_t BinaryenSIMDExtractGetIndex(BinaryenExpressionRef expr) {
18471847
if (tracing) {
1848-
std::cout << " BinaryenSIMDExtractGetIdx(expressions[" << expressions[expr] << "]);\n";
1848+
std::cout << " BinaryenSIMDExtractGetIndex(expressions[" << expressions[expr] << "]);\n";
18491849
}
18501850

18511851
auto* expression = (Expression*)expr;
18521852
assert(expression->is<SIMDExtract>());
1853-
return static_cast<SIMDExtract*>(expression)->idx;
1853+
return static_cast<SIMDExtract*>(expression)->index;
18541854
}
18551855
// SIMDReplace
18561856
BinaryenOp BinaryenSIMDReplaceGetOp(BinaryenExpressionRef expr) {
@@ -1871,14 +1871,14 @@ BinaryenExpressionRef BinaryenSIMDReplaceGetVec(BinaryenExpressionRef expr) {
18711871
assert(expression->is<SIMDReplace>());
18721872
return static_cast<SIMDReplace*>(expression)->vec;
18731873
}
1874-
uint8_t BinaryenSIMDReplaceGetIdx(BinaryenExpressionRef expr) {
1874+
uint8_t BinaryenSIMDReplaceGetIndex(BinaryenExpressionRef expr) {
18751875
if (tracing) {
1876-
std::cout << " BinaryenSIMDReplaceGetIdx(expressions[" << expressions[expr] << "]);\n";
1876+
std::cout << " BinaryenSIMDReplaceGetIndex(expressions[" << expressions[expr] << "]);\n";
18771877
}
18781878

18791879
auto* expression = (Expression*)expr;
18801880
assert(expression->is<SIMDReplace>());
1881-
return static_cast<SIMDReplace*>(expression)->idx;
1881+
return static_cast<SIMDReplace*>(expression)->index;
18821882
}
18831883
BinaryenExpressionRef BinaryenSIMDReplaceGetValue(BinaryenExpressionRef expr) {
18841884
if (tracing) {

‎src/binaryen-c.h‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -535,8 +535,8 @@ BinaryenExpressionRef BinaryenAtomicRMW(BinaryenModuleRef module, BinaryenOp op,
535535
BinaryenExpressionRef BinaryenAtomicCmpxchg(BinaryenModuleRef module, BinaryenIndex bytes, BinaryenIndex offset, BinaryenExpressionRef ptr, BinaryenExpressionRef expected, BinaryenExpressionRef replacement, BinaryenType type);
536536
BinaryenExpressionRef BinaryenAtomicWait(BinaryenModuleRef module, BinaryenExpressionRef ptr, BinaryenExpressionRef expected, BinaryenExpressionRef timeout, BinaryenType type);
537537
BinaryenExpressionRef BinaryenAtomicWake(BinaryenModuleRef module, BinaryenExpressionRef ptr, BinaryenExpressionRef wakeCount);
538-
BinaryenExpressionRef BinaryenSIMDExtract(BinaryenModuleRef module, BinaryenOp op, BinaryenExpressionRef vec, uint8_t idx);
539-
BinaryenExpressionRef BinaryenSIMDReplace(BinaryenModuleRef module, BinaryenOp op, BinaryenExpressionRef vec, uint8_t idx, BinaryenExpressionRef value);
538+
BinaryenExpressionRef BinaryenSIMDExtract(BinaryenModuleRef module, BinaryenOp op, BinaryenExpressionRef vec, uint8_t index);
539+
BinaryenExpressionRef BinaryenSIMDReplace(BinaryenModuleRef module, BinaryenOp op, BinaryenExpressionRef vec, uint8_t index, BinaryenExpressionRef value);
540540
BinaryenExpressionRef BinaryenSIMDShuffle(BinaryenModuleRef module, BinaryenExpressionRef left, BinaryenExpressionRef right, const uint8_t mask[16]);
541541
BinaryenExpressionRef BinaryenSIMDBitselect(BinaryenModuleRef module, BinaryenExpressionRef left, BinaryenExpressionRef right, BinaryenExpressionRef cond);
542542
BinaryenExpressionRef BinaryenSIMDShift(BinaryenModuleRef module, BinaryenOp op, BinaryenExpressionRef vec, BinaryenExpressionRef shift);
@@ -648,11 +648,11 @@ BinaryenExpressionRef BinaryenAtomicWakeGetWakeCount(BinaryenExpressionRef expr)
648648

649649
BinaryenOp BinaryenSIMDExtractGetOp(BinaryenExpressionRef expr);
650650
BinaryenExpressionRef BinaryenSIMDExtractGetVec(BinaryenExpressionRef expr);
651-
uint8_t BinaryenSIMDExtractGetIdx(BinaryenExpressionRef expr);
651+
uint8_t BinaryenSIMDExtractGetIndex(BinaryenExpressionRef expr);
652652

653653
BinaryenOp BinaryenSIMDReplaceGetOp(BinaryenExpressionRef expr);
654654
BinaryenExpressionRef BinaryenSIMDReplaceGetVec(BinaryenExpressionRef expr);
655-
uint8_t BinaryenSIMDReplaceGetIdx(BinaryenExpressionRef expr);
655+
uint8_t BinaryenSIMDReplaceGetIndex(BinaryenExpressionRef expr);
656656
BinaryenExpressionRef BinaryenSIMDReplaceGetValue(BinaryenExpressionRef expr);
657657

658658
BinaryenExpressionRef BinaryenSIMDShuffleGetLeft(BinaryenExpressionRef expr);

‎src/ir/ExpressionAnalyzer.cpp‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -251,13 +251,13 @@ bool ExpressionAnalyzer::flexibleEqual(Expression* left, Expression* right, Expr
251251
}
252252
case Expression::Id::SIMDExtractId: {
253253
CHECK(SIMDExtract, op);
254-
CHECK(SIMDExtract, idx);
254+
CHECK(SIMDExtract, index);
255255
PUSH(SIMDExtract, vec);
256256
break;
257257
}
258258
case Expression::Id::SIMDReplaceId: {
259259
CHECK(SIMDReplace, op);
260-
CHECK(SIMDReplace, idx);
260+
CHECK(SIMDReplace, index);
261261
PUSH(SIMDReplace, vec);
262262
PUSH(SIMDReplace, value);
263263
break;
@@ -530,13 +530,13 @@ HashType ExpressionAnalyzer::hash(Expression* curr) {
530530
}
531531
case Expression::Id::SIMDExtractId: {
532532
HASH(SIMDExtract, op);
533-
HASH(SIMDExtract, idx);
533+
HASH(SIMDExtract, index);
534534
PUSH(SIMDExtract, vec);
535535
break;
536536
}
537537
case Expression::Id::SIMDReplaceId: {
538538
HASH(SIMDReplace, op);
539-
HASH(SIMDReplace, idx);
539+
HASH(SIMDReplace, index);
540540
PUSH(SIMDReplace, vec);
541541
PUSH(SIMDReplace, value);
542542
break;

‎src/ir/ExpressionManipulator.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -115,10 +115,10 @@ Expression* flexibleCopy(Expression* original, Module& wasm, CustomCopier custom
115115
return builder.makeAtomicWake(copy(curr->ptr), copy(curr->wakeCount), curr->offset);
116116
}
117117
Expression* visitSIMDExtract(SIMDExtract* curr) {
118-
return builder.makeSIMDExtract(curr->op, copy(curr->vec), curr->idx);
118+
return builder.makeSIMDExtract(curr->op, copy(curr->vec), curr->index);
119119
}
120120
Expression* visitSIMDReplace(SIMDReplace* curr) {
121-
return builder.makeSIMDReplace(curr->op, copy(curr->vec), curr->idx, copy(curr->value));
121+
return builder.makeSIMDReplace(curr->op, copy(curr->vec), curr->index, copy(curr->value));
122122
}
123123
Expression* visitSIMDShuffle(SIMDShuffle* curr) {
124124
return builder.makeSIMDShuffle(copy(curr->left), copy(curr->right), curr->mask);

‎src/js/binaryen.js-post.js‎

Lines changed: 30 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -1245,14 +1245,14 @@ function wrapModule(module, self) {
12451245
'splat': function(value) {
12461246
return Module['_BinaryenUnary'](module, Module['SplatVecI8x16'], value);
12471247
},
1248-
'extract_lane_s': function(vec, idx) {
1249-
return Module['_BinaryenSIMDExtract'](module, Module['ExtractLaneSVecI8x16'], vec, idx);
1248+
'extract_lane_s': function(vec, index) {
1249+
return Module['_BinaryenSIMDExtract'](module, Module['ExtractLaneSVecI8x16'], vec, index);
12501250
},
1251-
'extract_lane_u': function(vec, idx) {
1252-
return Module['_BinaryenSIMDExtract'](module, Module['ExtractLaneUVecI8x16'], vec, idx);
1251+
'extract_lane_u': function(vec, index) {
1252+
return Module['_BinaryenSIMDExtract'](module, Module['ExtractLaneUVecI8x16'], vec, index);
12531253
},
1254-
'replace_lane': function(vec, idx, value) {
1255-
return Module['_BinaryenSIMDReplace'](module, Module['ReplaceLaneVecI8x16'], vec, idx, value);
1254+
'replace_lane': function(vec, index, value) {
1255+
return Module['_BinaryenSIMDReplace'](module, Module['ReplaceLaneVecI8x16'], vec, index, value);
12561256
},
12571257
'eq': function(left, right) {
12581258
return Module['_BinaryenBinary'](module, Module['EqVecI8x16'], left, right);
@@ -1329,14 +1329,14 @@ function wrapModule(module, self) {
13291329
'splat': function(value) {
13301330
return Module['_BinaryenUnary'](module, Module['SplatVecI16x8'], value);
13311331
},
1332-
'extract_lane_s': function(vec, idx) {
1333-
return Module['_BinaryenSIMDExtract'](module, Module['ExtractLaneSVecI16x8'], vec, idx);
1332+
'extract_lane_s': function(vec, index) {
1333+
return Module['_BinaryenSIMDExtract'](module, Module['ExtractLaneSVecI16x8'], vec, index);
13341334
},
1335-
'extract_lane_u': function(vec, idx) {
1336-
return Module['_BinaryenSIMDExtract'](module, Module['ExtractLaneUVecI16x8'], vec, idx);
1335+
'extract_lane_u': function(vec, index) {
1336+
return Module['_BinaryenSIMDExtract'](module, Module['ExtractLaneUVecI16x8'], vec, index);
13371337
},
1338-
'replace_lane': function(vec, idx, value) {
1339-
return Module['_BinaryenSIMDReplace'](module, Module['ReplaceLaneVecI16x8'], vec, idx, value);
1338+
'replace_lane': function(vec, index, value) {
1339+
return Module['_BinaryenSIMDReplace'](module, Module['ReplaceLaneVecI16x8'], vec, index, value);
13401340
},
13411341
'eq': function(left, right) {
13421342
return Module['_BinaryenBinary'](module, Module['EqVecI16x8'], left, right);
@@ -1413,11 +1413,11 @@ function wrapModule(module, self) {
14131413
'splat': function(value) {
14141414
return Module['_BinaryenUnary'](module, Module['SplatVecI32x4'], value);
14151415
},
1416-
'extract_lane': function(vec, idx) {
1417-
return Module['_BinaryenSIMDExtract'](module, Module['ExtractLaneVecI32x4'], vec, idx);
1416+
'extract_lane': function(vec, index) {
1417+
return Module['_BinaryenSIMDExtract'](module, Module['ExtractLaneVecI32x4'], vec, index);
14181418
},
1419-
'replace_lane': function(vec, idx, value) {
1420-
return Module['_BinaryenSIMDReplace'](module, Module['ReplaceLaneVecI32x4'], vec, idx, value);
1419+
'replace_lane': function(vec, index, value) {
1420+
return Module['_BinaryenSIMDReplace'](module, Module['ReplaceLaneVecI32x4'], vec, index, value);
14211421
},
14221422
'eq': function(left, right) {
14231423
return Module['_BinaryenBinary'](module, Module['EqVecI32x4'], left, right);
@@ -1488,11 +1488,11 @@ function wrapModule(module, self) {
14881488
'splat': function(value) {
14891489
return Module['_BinaryenUnary'](module, Module['SplatVecI64x2'], value);
14901490
},
1491-
'extract_lane': function(vec, idx) {
1492-
return Module['_BinaryenSIMDExtract'](module, Module['ExtractLaneVecI64x2'], vec, idx);
1491+
'extract_lane': function(vec, index) {
1492+
return Module['_BinaryenSIMDExtract'](module, Module['ExtractLaneVecI64x2'], vec, index);
14931493
},
1494-
'replace_lane': function(vec, idx, value) {
1495-
return Module['_BinaryenSIMDReplace'](module, Module['ReplaceLaneVecI64x2'], vec, idx, value);
1494+
'replace_lane': function(vec, index, value) {
1495+
return Module['_BinaryenSIMDReplace'](module, Module['ReplaceLaneVecI64x2'], vec, index, value);
14961496
},
14971497
'neg': function(value) {
14981498
return Module['_BinaryenUnary'](module, Module['NegVecI64x2'], value);
@@ -1530,11 +1530,11 @@ function wrapModule(module, self) {
15301530
'splat': function(value) {
15311531
return Module['_BinaryenUnary'](module, Module['SplatVecF32x4'], value);
15321532
},
1533-
'extract_lane': function(vec, idx) {
1534-
return Module['_BinaryenSIMDExtract'](module, Module['ExtractLaneVecF32x4'], vec, idx);
1533+
'extract_lane': function(vec, index) {
1534+
return Module['_BinaryenSIMDExtract'](module, Module['ExtractLaneVecF32x4'], vec, index);
15351535
},
1536-
'replace_lane': function(vec, idx, value) {
1537-
return Module['_BinaryenSIMDReplace'](module, Module['ReplaceLaneVecF32x4'], vec, idx, value);
1536+
'replace_lane': function(vec, index, value) {
1537+
return Module['_BinaryenSIMDReplace'](module, Module['ReplaceLaneVecF32x4'], vec, index, value);
15381538
},
15391539
'eq': function(left, right) {
15401540
return Module['_BinaryenBinary'](module, Module['EqVecF32x4'], left, right);
@@ -1593,11 +1593,11 @@ function wrapModule(module, self) {
15931593
'splat': function(value) {
15941594
return Module['_BinaryenUnary'](module, Module['SplatVecF64x2'], value);
15951595
},
1596-
'extract_lane': function(vec, idx) {
1597-
return Module['_BinaryenSIMDExtract'](module, Module['ExtractLaneVecF64x2'], vec, idx);
1596+
'extract_lane': function(vec, index) {
1597+
return Module['_BinaryenSIMDExtract'](module, Module['ExtractLaneVecF64x2'], vec, index);
15981598
},
1599-
'replace_lane': function(vec, idx, value) {
1600-
return Module['_BinaryenSIMDReplace'](module, Module['ReplaceLaneVecF64x2'], vec, idx, value);
1599+
'replace_lane': function(vec, index, value) {
1600+
return Module['_BinaryenSIMDReplace'](module, Module['ReplaceLaneVecF64x2'], vec, index, value);
16011601
},
16021602
'eq': function(left, right) {
16031603
return Module['_BinaryenBinary'](module, Module['EqVecF64x2'], left, right);
@@ -2154,15 +2154,15 @@ Module['getExpressionInfo'] = function(expr) {
21542154
'type': type,
21552155
'op': Module['_BinaryenSIMDExtractGetOp'](expr),
21562156
'vec': Module['_BinaryenSIMDExtractGetVec'](expr),
2157-
'idx': Module['_BinaryenSIMDExtractGetIdx'](expr)
2157+
'index': Module['_BinaryenSIMDExtractGetIndex'](expr)
21582158
};
21592159
case Module['SIMDReplaceId']:
21602160
return {
21612161
'id': id,
21622162
'type': type,
21632163
'op': Module['_BinaryenSIMDReplaceGetOp'](expr),
21642164
'vec': Module['_BinaryenSIMDReplaceGetVec'](expr),
2165-
'idx': Module['_BinaryenSIMDReplaceGetIdx'](expr),
2165+
'index': Module['_BinaryenSIMDReplaceGetIndex'](expr),
21662166
'value': Module['_BinaryenSIMDReplaceGetValue'](expr)
21672167
};
21682168
case Module['SIMDShuffleId']:

‎src/literal.h‎

Lines changed: 14 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -205,25 +205,25 @@ class Literal {
205205

206206
Literal shuffleV8x16(const Literal& other, const std::array<uint8_t, 16>& mask) const;
207207
Literal splatI8x16() const;
208-
Literal extractLaneSI8x16(uint8_t idx) const;
209-
Literal extractLaneUI8x16(uint8_t idx) const;
210-
Literal replaceLaneI8x16(const Literal& other, uint8_t idx) const;
208+
Literal extractLaneSI8x16(uint8_t index) const;
209+
Literal extractLaneUI8x16(uint8_t index) const;
210+
Literal replaceLaneI8x16(const Literal& other, uint8_t index) const;
211211
Literal splatI16x8() const;
212-
Literal extractLaneSI16x8(uint8_t idx) const;
213-
Literal extractLaneUI16x8(uint8_t idx) const;
214-
Literal replaceLaneI16x8(const Literal& other, uint8_t idx) const;
212+
Literal extractLaneSI16x8(uint8_t index) const;
213+
Literal extractLaneUI16x8(uint8_t index) const;
214+
Literal replaceLaneI16x8(const Literal& other, uint8_t index) const;
215215
Literal splatI32x4() const;
216-
Literal extractLaneI32x4(uint8_t idx) const;
217-
Literal replaceLaneI32x4(const Literal& other, uint8_t idx) const;
216+
Literal extractLaneI32x4(uint8_t index) const;
217+
Literal replaceLaneI32x4(const Literal& other, uint8_t index) const;
218218
Literal splatI64x2() const;
219-
Literal extractLaneI64x2(uint8_t idx) const;
220-
Literal replaceLaneI64x2(const Literal& other, uint8_t idx) const;
219+
Literal extractLaneI64x2(uint8_t index) const;
220+
Literal replaceLaneI64x2(const Literal& other, uint8_t index) const;
221221
Literal splatF32x4() const;
222-
Literal extractLaneF32x4(uint8_t idx) const;
223-
Literal replaceLaneF32x4(const Literal& other, uint8_t idx) const;
222+
Literal extractLaneF32x4(uint8_t index) const;
223+
Literal replaceLaneF32x4(const Literal& other, uint8_t index) const;
224224
Literal splatF64x2() const;
225-
Literal extractLaneF64x2(uint8_t idx) const;
226-
Literal replaceLaneF64x2(const Literal& other, uint8_t idx) const;
225+
Literal extractLaneF64x2(uint8_t index) const;
226+
Literal replaceLaneF64x2(const Literal& other, uint8_t index) const;
227227
Literal eqI8x16(const Literal& other) const;
228228
Literal neI8x16(const Literal& other) const;
229229
Literal ltSI8x16(const Literal& other) const;

‎src/passes/Print.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -246,7 +246,7 @@ struct PrintExpressionContents : public Visitor<PrintExpressionContents> {
246246
case ExtractLaneVecF32x4: o << "f32x4.extract_lane"; break;
247247
case ExtractLaneVecF64x2: o << "f64x2.extract_lane"; break;
248248
}
249-
o << " " << int(curr->idx);
249+
o << " " << int(curr->index);
250250
}
251251
void visitSIMDReplace(SIMDReplace* curr) {
252252
prepareColor(o);
@@ -258,7 +258,7 @@ struct PrintExpressionContents : public Visitor<PrintExpressionContents> {
258258
case ReplaceLaneVecF32x4: o << "f32x4.replace_lane"; break;
259259
case ReplaceLaneVecF64x2: o << "f64x2.replace_lane"; break;
260260
}
261-
o << " " << int(curr->idx);
261+
o << " " << int(curr->index);
262262
}
263263
void visitSIMDShuffle(SIMDShuffle* curr) {
264264
prepareColor(o);

‎src/tools/fuzzing.h‎

Lines changed: 14 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -1643,37 +1643,37 @@ class TranslateToFuzzReader {
16431643
case unreachable: WASM_UNREACHABLE();
16441644
}
16451645
Expression* vec = make(v128);
1646-
uint8_t idx = 0;
1646+
uint8_t index = 0;
16471647
switch (op) {
16481648
case ExtractLaneSVecI8x16:
1649-
case ExtractLaneUVecI8x16: idx = upTo(16); break;
1649+
case ExtractLaneUVecI8x16: index = upTo(16); break;
16501650
case ExtractLaneSVecI16x8:
1651-
case ExtractLaneUVecI16x8: idx = upTo(8); break;
1651+
case ExtractLaneUVecI16x8: index = upTo(8); break;
16521652
case ExtractLaneVecI32x4:
1653-
case ExtractLaneVecF32x4: idx = upTo(4); break;
1653+
case ExtractLaneVecF32x4: index = upTo(4); break;
16541654
case ExtractLaneVecI64x2:
1655-
case ExtractLaneVecF64x2: idx = upTo(2); break;
1655+
case ExtractLaneVecF64x2: index = upTo(2); break;
16561656
}
1657-
return builder.makeSIMDExtract(op, vec, idx);
1657+
return builder.makeSIMDExtract(op, vec, index);
16581658
}
16591659

16601660
Expression* makeSIMDReplace() {
16611661
SIMDReplaceOp op = pick(ReplaceLaneVecI8x16, ReplaceLaneVecI16x8, ReplaceLaneVecI32x4,
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ReplaceLaneVecI64x2, ReplaceLaneVecF32x4, ReplaceLaneVecF64x2);
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Expression* vec = make(v128);
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uint8_t idx;
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uint8_t index;
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Type lane_t;
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switch (op) {
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case ReplaceLaneVecI8x16: idx = upTo(16); lane_t = i32; break;
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case ReplaceLaneVecI16x8: idx = upTo(8); lane_t = i32; break;
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case ReplaceLaneVecI32x4: idx = upTo(4); lane_t = i32; break;
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case ReplaceLaneVecI64x2: idx = upTo(2); lane_t = i64; break;
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case ReplaceLaneVecF32x4: idx = upTo(4); lane_t = f32; break;
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case ReplaceLaneVecF64x2: idx = upTo(2); lane_t = f64; break;
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case ReplaceLaneVecI8x16: index = upTo(16); lane_t = i32; break;
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case ReplaceLaneVecI16x8: index = upTo(8); lane_t = i32; break;
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case ReplaceLaneVecI32x4: index = upTo(4); lane_t = i32; break;
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case ReplaceLaneVecI64x2: index = upTo(2); lane_t = i64; break;
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case ReplaceLaneVecF32x4: index = upTo(4); lane_t = f32; break;
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case ReplaceLaneVecF64x2: index = upTo(2); lane_t = f64; break;
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default: WASM_UNREACHABLE();
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}
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Expression* value = make(lane_t);
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return builder.makeSIMDReplace(op, vec, idx, value);
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return builder.makeSIMDReplace(op, vec, index, value);
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}
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Expression* makeSIMDShuffle() {

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