@@ -59,8 +59,7 @@ module quick_rs232 #(
5959 input wire [DEFAULT_BYTE_LEN- 1 :0 ] tx_data, // data that should be send trough RS232
6060 input wire tx_data_ready, // required: setting to 1 when new data is ready to send
6161 output reg tx_data_copied, // short pulse means that data was copied _--_____--______--___
62- output reg tx_busy, // tx notes that data is sending via RS232 or RS232 module awaiting flow-control synch
63- output reg [7 :0 ] debug_led_bus
62+ output reg tx_busy // tx notes that data is sending via RS232 or RS232 module awaiting flow-control synch
6463);
6564
6665localparam reg [3 :0 ] IDLE_EXCHANGE_STATE = 1 ;
@@ -90,7 +89,7 @@ reg tx_data_parity;
9089reg [DEFAULT_BYTE_LEN- 1 :0 ] rx_buffer;
9190wire rx_data_buffer_full;
9291reg [31 :0 ] rx_bit_counter;
93- reg [31 :0 ] rx_stop_bit_counter_limit;
92+ // reg [31:0] rx_stop_bit_counter_limit;
9493reg [31 :0 ] rx_timeout;
9594reg [3 :0 ] rx_data_bit_counter;
9695reg rx_data_parity;
@@ -117,7 +116,7 @@ begin
117116 rx_byte_received <= 1'b0 ;
118117 rx_buffer <= 0 ;
119118 rx_bit_counter <= 0 ;
120- rx_stop_bit_counter_limit <= 0 ;
119+ // rx_stop_bit_counter_limit <= 0;
121120 rx_data_bit_counter <= 0 ;
122121 rx_data_parity <= 1'b0 ;
123122 rx_err <= 1'b0 ;
@@ -126,7 +125,6 @@ begin
126125 j <= 0 ;
127126 TOTAL_RX_TIMEOUT <= 6400 ; // ~ 9600 bit/s
128127 rx_timeout <= 0 ;
129- debug_led_bus <= 8'b11111111 ;
130128 end
131129 else
132130 begin
@@ -213,7 +211,7 @@ begin
213211 if (rx_bit_counter == TICKS_PER_UART_BIT)
214212 begin
215213 rx_bit_counter <= 0 ;
216- rx_data_bit_counter <= rx_data_bit_counter + 1 ;
214+ rx_data_bit_counter <= rx_data_bit_counter + 4'b0001 ;
217215 end
218216 end
219217 end
@@ -419,7 +417,7 @@ begin
419417 if (tx_bit_counter == TICKS_PER_UART_BIT)
420418 begin
421419 tx_bit_counter <= 0 ;
422- tx_data_bit_counter <= tx_data_bit_counter + 1 ;
420+ tx_data_bit_counter <= tx_data_bit_counter + 4'b0001 ;
423421 end
424422 end
425423 end
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