[fix] JSL instruction

Fixes #17

Author: smokku

src/chips/w65c816s.h

@@ -1240,13 +1240,13 @@ uint64_t w65816_tick(w65816_t* c, uint64_t pins) {
     /* JSL a */
         case (0x22<<4)|0: _VPA();_SA(c->PC++);break;
         case (0x22<<4)|1: _VPA();_SA(c->PC++);c->AD=_GD();break;
-        case (0x22<<4)|2: _VDA(c->DBR);_SA((_GD()<<8)|c->AD);break;
-        case (0x22<<4)|3: _VDA(0);_SAD(_SP(_S(c)),c->PBR);_WR();break;
-        case (0x22<<4)|4: _SA(_SP(_S(c)--));c->AD=(_GD()<<8)|c->AD;break;
-        case (0x22<<4)|5: _VPA();_SA(c->PC++);break;
-        case (0x22<<4)|6: _VDA(0);c->PBR=_GD();_SAD(_SP(_S(c)--),c->PC>>8);_WR();break;
-        case (0x22<<4)|7: _VDA(0);_SAD(_SP(_S(c)--),c->PC);_WR();break;
-        case (0x22<<4)|8: c->PC=c->AD;_FETCH();break;
+        case (0x22<<4)|2: _VDA(0);c->AD=(_GD()<<8)|c->AD;_SAD(_SP(_S(c)),c->PBR);_WR();break;
+        case (0x22<<4)|3: _SA(_SP(_S(c)--));break;
+        case (0x22<<4)|4: _VPA();_SA(c->PC);break;
+        case (0x22<<4)|5: _VDA(0);c->PBR=_GD();_SAD(_SP(_S(c)--),c->PC>>8);_WR();break;
+        case (0x22<<4)|6: _VDA(0);_SAD(_SP(_S(c)--),c->PC);_WR();break;
+        case (0x22<<4)|7: c->PC=c->AD;_FETCH();break;
+        case (0x22<<4)|8: assert(false);break;
     /* AND d,s */
         case (0x23<<4)|0: _VPA();_SA(c->PC++);break;
         case (0x23<<4)|1: c->AD=_GD();break;

src/codegen/w65c816s_gen.py

@@ -731,11 +731,11 @@ def i_jsrx(o):
 def i_jsl(o):
     cmt(o,'JSL')
     # write Program Bank Register to stack
-    o.t('_VDA(0);_SAD(_SP(_S(c)),c->PBR);_WR();')
+    o.to('_VDA(0);c->AD=(_GD()<<8)|c->AD;_SAD(_SP(_S(c)),c->PBR);_WR();')
     # put SP on addr bus, next cycle is a junk read
-    o.t('_SA(_SP(_S(c)--));c->AD=(_GD()<<8)|c->AD;')
+    o.t('_SA(_SP(_S(c)--));')
     # read bank of target address
-    o.t('_VPA();_SA(c->PC++);')
+    o.t('_VPA();_SA(c->PC);')
     # write PC high byte to stack
     o.t('_VDA(0);c->PBR=_GD();_SAD(_SP(_S(c)--),c->PC>>8);_WR();')
     # write PC low byte to stack

src/tests/cputest.cpp

@@ -448,3 +448,70 @@ TEST_CASE("16 bit arithmetic carries") {
         }
     }
 }
+
+TEST_CASE("JSL jumps long") {
+    w65816_t cpu;
+    w65816_desc_t desc = {};
+    uint64_t pins = w65816_init(&cpu, &desc);
+
+    // skip RESET
+    pins &= ~(W65816_RW | W65816_RES);
+    cpu.PINS = pins;
+
+    // Test code: JSL $123456
+    uint8_t memory[] = {
+        0x22,
+        0x56,
+        0x34,
+        0x12,
+    };
+
+    // Set initial PC to 0x0000, PBR to 0x00
+    cpu.PC = 0x0000;
+    cpu.PBR = 0x00;
+    cpu.S = 0x01FF;  // Stack pointer
+    // CPU reads first instruction
+    pins |= W65816_RW | W65816_VPA | W65816_VDA;
+
+    static std::vector<uint8_t> stack;
+
+    int cycle = 0;
+
+    // Run for 8 cycles (JSL takes 8 cycles according to W65C816S datasheet)
+    while (cycle < 8) {
+        if (pins & W65816_RW) {
+            // memory read
+            uint32_t full_addr = W65816_GET_ADDR(pins);
+            uint8_t bank = (full_addr >> 16) & 0xFF;
+            uint16_t addr = full_addr & 0xFFFF;
+
+            if (bank == 0 && addr < sizeof(memory)) {
+                W65816_SET_DATA(pins, memory[addr]);
+            }
+            else {
+                W65816_SET_DATA(pins, 0xEA);  // NOP
+            }
+        }
+        else {
+            // writes push to the stack
+            stack.push_back((pins >> 16) & 0xFF);
+        }
+
+        pins = w65816_tick(&cpu, pins);
+        cycle++;
+    }
+
+    CAPTURE(stack.size());
+    CAPTURE(cpu.PBR);
+    CAPTURE(cpu.PC);
+    // After JSL $123456, we expect:
+    // - PBR = 0x12
+    // - PC = 0x3456
+    CHECK(cpu.PBR == 0x12);
+    CHECK(cpu.PC == 0x3456);
+    // and the return address (0x000003) is pushed to the stack
+    REQUIRE(stack.size() == 3);
+    CHECK(stack[0] == 0x00);  // PBR
+    CHECK(stack[1] == 0x00);  // PCH
+    CHECK(stack[2] == 0x03);  // PCL
+}