TDL: Edits for Embedded Software

Author: ryanvergel

Embedded_Software/Feature_Tutorials/01-user_managed_mode/README.md

@@ -6,54 +6,54 @@
  </tr>
 </table>
 
-***Version: Vitis 2023.2***
+# User Managed Mode in Vitis Unified Embedded IDE
 
-## User Managed Mode in Vitis Unified IDE
+***Version: Vitis 2023.2***
 
-This is a new feature with the Vitis Unified Embedded IDE, where users can add a makefile and argument that can be used to create custom builds. This allows the user more control over their project builds instead of letting the tools generate the components. 
+This is a new feature with the Vitis Unified Embedded IDE, where users can add a makefile and argument that can be used to create custom builds. This allows the user more control over their project builds instead of letting the tools generate the components.
 
-The big advantages of user managed mode are
+The biggest advantages of user managed mode are being able to do the following:
 
-1. Allowing user to quickly rebuild a Vitis Unified Workspace in the GUI
-2. Allowing user to quickly call makefile actions
+1. Quickly rebuild a Vitis Unified Workspace in the GUI.
+2. Quickly call makefile actions.
 
-In this tutorial, we shall discuss three use cases on how the **User Managed Mode** can be used
+This tutorial describes three use cases for the **User Managed Mode**.
 
-# Use Case 1 - Regenerate a previously created Vitis Unified Workspace using a Python Script
+## Use Case 1 - Regenerate a previously created Vitis Unified Workspace using a Python Script
 
-## Lets get started
+### Let’s get started
 
-Launch Vitis 2023.2 and select open_workspace and navigate to the <i>Vitis-Tutorials/Embedded_Software/Feature_Tutorials/01-user_managed_mode</i> directory
+Launch Vitis 2023.2, select **open_workspace**, and navigate to the `Vitis-Tutorials/Embedded_Software/Feature_Tutorials/01-user_managed_mode` directory
 
 Select the User Managed Mode
 
 ![](./images/user_managed_mode.PNG)
 
-## Generating Build Configuration
+### Generating Build Configuration
 
-In this use case, we shall be using the Python script introduced in the <i>04-vitis_scripting_flows</i> to build a workspace and with a simple Hello World application template. However, users can also utilize the Python script **logs/builder.py** that gets generated for every Vitis Unified IDE workspace.
+In this use case, we shall be using the Python script introduced in the *04-vitis_scripting_flows* to build a workspace and with a simple Hello World application template. However, users can also utilize the Python script `logs/builder.py` that gets generated for every Vitis Unified IDE workspace.
 
-Right click in the **Explorer** view, and select **Edit Build Configurations** and **New Build Configurations** and set as shown below:
+Right click in the **Explorer** view, right-click and select **Edit Build Configurations** and **New Build Configurations** and set as shown below:
 
 ![](./images/ws_build_config.PNG)
 
-## Running a Build Configuration
+### Running a Build Configuration
 
-To launch the build configuration, right click on the **Explorer** view, and select **Build**. 
+To launch the build configuration, right click on the **Explorer** view, and then select **Build**.
 
-**Note:** If there is only a single build configuration, then this will launch automatically. If there are more than one build configurations, then the user will be presented with a list to choose from. 
+**Note:** If there is only a single build configuration, then this will launch automatically. If there is more than one build configuration, a list is shown that you can choose from. 
 
 This will generate the Vitis Unified IDE workspace based on the XSA.
 
-## Deploying the application on the target
+### Deploying the application on the target
 
 Next, we can create a **Launch Configuration** to test the application created above on our hardware target.
 
 Right click in the **Explorer** view, and select **Edit Launch Configurations** and **New Launch Configurations** and select **Baremetal** and browse to your XSA file used to create the workspace above.
 
 ![](./images/create_launch_config.PNG)
 
-Here, we can add the FSBL (as this is for a Zynq Ultrascale Device)
+Here, we can add the FSBL (as this is for a Zynq UltraScale Device)
 
 ![](./images/launch_config.PNG)
 
@@ -65,15 +65,15 @@ Once the launch configuration is complete, users can select the **debug** icon t
 
 ![](./images/debug.PNG)
 
-The Debug view will be launched and users can debug as normal
+The Debug view will be launched, and users can debug as normal
 
 ![](./images/debug_view.PNG)
 
-# Use Case 2 - Running Platform Creation tutorials
+## Use Case 2 - Running Platform Creation tutorials
 
 In this use case, we can build the example given here [here](https://github.com/Xilinx/Vitis-Tutorials/tree/2023.2/Vitis_Platform_Creation/Design_Tutorials). In particular, we will build the **Edge-AI-ZCU104** Platform.
 
-## Lets get started
+### Lets get started
 
 Launch Vitis 2023.2 and select open_workspace and navigate to the <i>Vitis-Tutorials/Vitis_Embedded_Flows/Embedded_Flows/Next_Steps_Embedded/User_Managed_Mode</i> directory
 
@@ -83,17 +83,17 @@ Select the User Managed Mode
 
 ![](./images/user_managed_mode.PNG)
 
-## Generating Build Configuration
+### Generating Build Configuration
 
 In this use case, copy the **Makefile**, **export_xsa.tcl** and the **system_step1.tcl** from The Git repository above into the workspace.
 
 Right click in the **Explorer** view, and select **Edit Build Configurations** and **New Build Configurations** and set as shown below:
 
 ![](./images/zcu104.PNG)
 
-## Running a Build Configuration
+### Running a Build Configuration
 
-To launch the build configuration, right click on the **Explorer** view, and select **Build**. 
+To launch the build configuration, right click on the **Explorer** view and select **Build**. 
 
 **Note:** If there is only a single build configuration, then this will launch automatically. If there are more than one build configurations, then the user will be presented with a list to choose from. 
 
@@ -102,7 +102,7 @@ This will generate the XSA into the **Build** folder.
 Users can target these newly generated XSA filed in Vitis Unified IDE. Users can switch views **View** → **Vitis Components**, and target the platform for their development.
 
 
-# Use Case 3 - Generate and deploy u-boot from Git sources
+## Use Case 3 - Generate and deploy u-boot from Git sources
 
 In this demo I have a simple makefile to generate and deploy u-boot using the metadata extracted from the XSA file. The script will do the following
 
@@ -114,9 +114,9 @@ In this demo I have a simple makefile to generate and deploy u-boot using the me
 * Compile U-boot
 * Generate JTAG boot script
 
-Each section above can be built independantly. For example, if users want to make a change to the device-tree, then only the DT needs to be compiled and re-deployed on the board. This allows the users to speed up any u-boot debug or testing. 
+Each section above can be built independently. For example, if users want to make a change to the device-tree, then only the DT needs to be compiled and re-deployed on the board. This allows the users to speed up any u-boot debug or testing. 
 
-## Lets get started
+### Lets get started
 
 Launch Vitis 2023.2 and select open_workspace and navigate to the <i>Vitis-Tutorials/Vitis_Embedded_Flows/Embedded_Flows/Next_Steps_Embedded/User_Managed_Mode</i> directory
 
@@ -127,7 +127,7 @@ Select the User Managed Mode
 ![](./images/user_managed_mode.PNG)
 
 
-## Creating a Build Configuration
+### Creating a Build Configuration
 
 If users want to create a Build Configuration, then right click in Explorer view -> Edit Build Configurations, and select the + icon. Users will be presented with an empty Build Configuration. For example, if we wanted to created a build configuration to run the boot script in XSCT
 
@@ -141,24 +141,24 @@ Create the build configuration as follows
 ![](./images/jtag_boot_build_config.PNG)
 
 
-## Running a Build Configuration
+### Running a Build Configuration
 
 To run a build configuration, right click in Explorer View and select <i>Build</i> and select your build configuration from the list
 
 ![](./images/build_configs.PNG)
 
-## Running a Clean Configuration
+### Running a Clean Configuration
 
 Similarly, to run a clean configuration, right click in Explorer View and select <i>Clean</i> and select your Clean configuration from the list
 
 
-# Sharing Build Configurations.
+## Sharing Build Configurations.
 
 If users are using Git to maintain their work, then users may want to maintain or share the build configurations. This metadata is stored in the **_ide/.theia/build.json** file
 
-# Summary
+## Summary
 
-The examples above should act as an introduction to how to utilise the User Managed Mode for different design flows. However, Wether the users preference is to use the GUI or Command Line to build and maintain their Embedded System, they can still avail of all the debug features within Vitis Unified IDE with ease. 
+The examples above should act as an introduction to how to utilize the User Managed Mode for different design flows. However, whether the users preference is to use the GUI or Command Line to build and maintain their Embedded System, they can still avail of all the debug features within Vitis Unified IDE with ease. 
 
 <p class="sphinxhide" align="center"><sub>Copyright © 2020–2024 Advanced Micro Devices, Inc</sub></p>
 

Embedded_Software/Feature_Tutorials/02-Debugging/README.md

@@ -1,27 +1,36 @@
-# UG1515: Vitis Embedded Software Debugging Guide
+<table class="sphinxhide" width="100%">
+ <tr width="100%">
+    <td align="center"><img src="https://raw.githubusercontent.com/Xilinx/Image-Collateral/main/xilinx-logo.png" width="30%"/><h1>Vitis™ Embedded Software Tutorials</h1>
+    <a href="https://www.xilinx.com/products/design-tools/vitis.html">See Vitis™ Development Environment on xilinx.com</a> </td>
+ </tr>
+</table>
+
+# Vitis Embedded Software Debugging Guide (UG1515)
 
 ***Version: Vitis 2023.2***
 
-## Debugging Bare-Metal Applications
+## [Debugging Bare-Metal Applications](./1-debugging-bare-metal-applications/)
 
 This section showcases the different debugging features available in the AMD Vitis™ Embedded software development flow for bare-metal applications. Using an example application project with intentional bugs, the debug guide goes through each issue and leverages the different windows and features available in the application debug session to highlight the potential usage of debug features in a real world scenario.
 
-## Debugging Linux Applications
+## [Debugging Linux Applications](./2-debugging-linux-applications/)
 
 The Vitis IDE provides a familiar environment for debugging Linux applications for a target platform. This section covers the following Linux application debug features:
 
 - Setting breakpoints
 - Stepping through program execution
-- Viewing program variables, memory contents, and the stack 
+- Viewing program variables, memory contents, and the stack
 
-## Creating a Debuggable First Stage Boot Loader
+## [Creating a Debuggable First Stage Boot Loader](./3-debuggable-fsbl/)
 
 First Stage Boot Loader (FSBL) can initialize the SoC device, load the required application or data to memory, and launch applications on the target CPU core. FSBL is optimized for size because it needs to fit into OCM, which has limited space on the device. Size based optimization introduces some trouble if you wish to debug FSBL when you add customized code into FSBL. This chapter explains how you can use Vitis Unified IDE to debug FSBL step by step.
 
-## Cross Triggering in Vitis Unified Embedded IDE
+## [Cross Triggering in Vitis Unified Embedded IDE](./4-cross-triggering/)
 
 Embedded systems can be complex, that may contain multiple processors. You may also need to debug across software and hardware domains and can use PS-PL cross triggering. However, in this simple tutorial, we learn how to debug over multiple processors using cross triggering.
 
-<p class="sphinxhide" align="center"><sub>Copyright (C) 2020-2024, Advanced Micro Devices, Inc. All rights reserved. SPDX-License-Identifier: X11</sub></p>
+</hr class="sphinxhide">
+
+<p class="sphinxhide" align="center"><sub>Copyright © 2020–2024 Advanced Micro Devices, Inc</sub></p>
 
-<p class="sphinxhide" align="center"><sup><a href="https://www.amd.com/en/corporate/copyright">Terms and Conditions</a></sup></p>
+<p class="sphinxhide" align="center"><sup><a href="https://www.amd.com/en/corporate/copyright">Terms and Conditions</a></sup></p>

Embedded_Software/Feature_Tutorials/03-vitis_classic_to_unified_migration/README.md

@@ -7,7 +7,7 @@
 
 ***Version: Vitis 2023.2***
 
-# Migrating from classic Vitis IDE to Vitis Unified IDE
+# Vitis Classic to Unified Project Migration
 
 The methodology to pass the metadata from hardware from Vivado to Vitis IDE has changed. However, these changes will not affect the users as the AMD baremetal drivers, standalone bsp and libraries have been fully ported to this new methodology.