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Bhaskar VishnuVardhan Chebroluheeran-xilinx
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Update readme files in master branch (#413)
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cpp_kernels/README.md

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@@ -7,7 +7,7 @@ This section contains HLS C/C++ Kernel Examples.
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Example | Description | Key Concepts / Keywords
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[array_partition/][]|This is a simple example of matrix multiplication (Row x Col) to demonstrate how to achieve better performance by array partitioning, using HLS kernel in Vitis Environment.|__Key__ __Concepts__<br> - Kernel Optimization<br> - HLS C Kernel<br> - Array Partition<br>__Keywords__<br> - #pragma HLS ARRAY_PARTITION<br> - complete
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[bind_op_storage/][]|This is simple example of vector addition to describe how to use BIND OP for better implementation style.|__Key__ __Concepts__<br> - BIND OP and STORAGE<br>__Keywords__<br> - BIND OP<br> - impl<br> - op<br> - latency
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[bind_op_storage/][]|This is simple example of vector addition to describe how to use BIND OP and STORAGE for better implementation style.|__Key__ __Concepts__<br> - BIND OP<br> - BIND STORAGE<br>__Keywords__<br> - BIND_OP<br> - BIND_STORAGE<br> - impl<br> - op<br> - type<br> - latency
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[burst_rw/][]|This is simple example of using AXI4-master interface for burst read and write|__Key__ __Concepts__<br> - burst access<br>__Keywords__<br> - memcpy<br> - max_read_burst_length<br> - max_write_burst_length
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[critical_path/][]|This example shows a normal coding style which could lead to critical path issue and design will give degraded timing. Example also contains better coding style which can improve design timing.|__Key__ __Concepts__<br> - Critical Path handling<br> - Improve Timing<br>
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[custom_datatype/][]|This is simple example of RGB to HSV conversion to demonstrate Custom DATA Type usages in C Based Kernel. Xilinx HLS Compiler Supports Custom Data Type to use for operation as well as Memory Interface between Kernel and Global Memory.|__Key__ __Concepts__<br> - Custom Datatype<br>__Keywords__<br> - struct<br> - #pragma HLS LOOP_TRIPCOUNT

rtl_kernels/rtl_adder_streams/README.md

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src/ip/ip_3/src/krnl_output_stage_rtl_int.sv
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src/ip/ip_3/src/krnl_output_stage_rtl_register_slice.sv
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src/ip/ip_3/xgui/krnl_output_stage_rtl_v1_0.tcl
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src/kernel_adder_stage.xml
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src/kernel_input_stage.xml
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src/kernel_output_stage.xml
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```
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## COMMAND LINE ARGUMENTS

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